From nobody Fri Dec 19 07:24:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 56AAA34679D for ; Tue, 16 Dec 2025 14:46:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765896375; cv=none; b=ZZ2XFluBD8vRe7OC9sp0QaHRjqneup2bxFr2Rjpvaoknxp7jd2Z21orcwA4xFpvybdnxAMBaezUKjJhKNSH2A55UQGk5KhiDxrO/7gdu6G1u10DrtA6MFVt26ONoxDvVCeqmZDr6n5Im0p6dUEGXNszs47XbdKNNBSZ3TVQNQc4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765896375; c=relaxed/simple; bh=FtgpUqryn+VfcIDzrL/xlcw9+yf9sTYav4Mn0cj51io=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fg5C5W3+vbn8MGEJRmeuOMHPKoCxW2WZM5F6hV2CTScbTtCYfIzMpjoEbetk9Qqz2Mh/wjR1DtLQ8fa5lV1xFLjR6EDCEBNwTIkKDSDY859e5CSfbYO22ILuoHcVmg4EMFmb5WxBh9fS8a40nO5Med2LQpk7zNe5nQUVsIEGlss= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8917C1516; Tue, 16 Dec 2025 06:46:05 -0800 (PST) Received: from e125769.cambridge.arm.com (e125769.cambridge.arm.com [10.1.196.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3BD143F73F; Tue, 16 Dec 2025 06:46:11 -0800 (PST) From: Ryan Roberts To: Will Deacon , Ard Biesheuvel , Catalin Marinas , Mark Rutland , Linus Torvalds , Oliver Upton , Marc Zyngier , Dev Jain , Linu Cherian Cc: Ryan Roberts , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 01/13] arm64: mm: Re-implement the __tlbi_level macro as a C function Date: Tue, 16 Dec 2025 14:45:46 +0000 Message-ID: <20251216144601.2106412-2-ryan.roberts@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251216144601.2106412-1-ryan.roberts@arm.com> References: <20251216144601.2106412-1-ryan.roberts@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As part of efforts to reduce our reliance on complex preprocessor macros for TLB invalidation routines, convert the __tlbi_level macro to a C function for by-level TLB invalidation. Each specific tlbi level op is implemented as a C function and the appropriate function pointer is passed to __tlbi_level(). Since everything is declared inline and is statically resolvable, the compiler will convert the indirect function call to a direct inline execution. Suggested-by: Linus Torvalds Signed-off-by: Ryan Roberts --- arch/arm64/include/asm/tlbflush.h | 69 +++++++++++++++++++++++++------ 1 file changed, 56 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlb= flush.h index a2d65d7d6aae..13a59cf28943 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -105,19 +105,62 @@ static inline unsigned long get_trans_granule(void) =20 #define TLBI_TTL_UNKNOWN INT_MAX =20 -#define __tlbi_level(op, addr, level) do { \ - u64 arg =3D addr; \ - \ - if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) && \ - level >=3D 0 && level <=3D 3) { \ - u64 ttl =3D level & 3; \ - ttl |=3D get_trans_granule() << 2; \ - arg &=3D ~TLBI_TTL_MASK; \ - arg |=3D FIELD_PREP(TLBI_TTL_MASK, ttl); \ - } \ - \ - __tlbi(op, arg); \ -} while(0) +typedef void (*tlbi_op)(u64 arg); + +static __always_inline void vae1is(u64 arg) +{ + __tlbi(vae1is, arg); +} + +static __always_inline void vae2is(u64 arg) +{ + __tlbi(vae2is, arg); +} + +static __always_inline void vale1(u64 arg) +{ + __tlbi(vale1, arg); + __tlbi_user(vale1, arg); +} + +static __always_inline void vale1is(u64 arg) +{ + __tlbi(vale1is, arg); +} + +static __always_inline void vale2is(u64 arg) +{ + __tlbi(vale2is, arg); +} + +static __always_inline void vaale1is(u64 arg) +{ + __tlbi(vaale1is, arg); +} + +static __always_inline void ipas2e1(u64 arg) +{ + __tlbi(ipas2e1, arg); +} + +static __always_inline void ipas2e1is(u64 arg) +{ + __tlbi(ipas2e1is, arg); +} + +static __always_inline void __tlbi_level(tlbi_op op, u64 addr, u32 level) +{ + u64 arg =3D addr; + + if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) && level <=3D 3) { + u64 ttl =3D level | (get_trans_granule() << 2); + + arg &=3D ~TLBI_TTL_MASK; + arg |=3D FIELD_PREP(TLBI_TTL_MASK, ttl); + } + + op(arg); +} =20 #define __tlbi_user_level(op, arg, level) do { \ if (arm64_kernel_unmapped_at_el0()) \ --=20 2.43.0