From nobody Fri Dec 19 04:23:14 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30FA234F46E for ; Tue, 16 Dec 2025 12:34:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765888463; cv=none; b=SMj8JzwFY12bZ42tnQ+KdNvhPSbuRLc7ZL4xD5dIlLiCv4uzUlK0ml6YKkoqdqNgA4KY7F3tjgmU9HmeHYUaxxOiCxCYObCLpa2sHnzZO3ZZh+g+TdI+Nd9RQWLCTx+dlKEjLtoPoH4eoynBXxWKgKDz3iqC37eTGqS0yRZNtEo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765888463; c=relaxed/simple; bh=i2639ZOLjniSDAUA7lcZw4vCovuYLHUOYN3WA/OmZtA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uMMkICi4y1HM3EphsQfAUQIgCKt07W3ebhMkxUbTfr7dl1w0PUeYwlmG4HdEfbsSFxaqmFop8lUsmkwkx0QqQGDg4T0zvB/iVBhKDIQwcLL/nbgHA3OZi+4pu6LrOZ8pxxaeoZc+D61DIHGnkm/1qW0dzzibkKYP+4GRZQotb7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fHwwg9mM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fHwwg9mM" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0D499C4CEF1; Tue, 16 Dec 2025 12:34:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1765888463; bh=i2639ZOLjniSDAUA7lcZw4vCovuYLHUOYN3WA/OmZtA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fHwwg9mMq/on6C59JzzWmMJOwUbPfILq166nxHLqjCKVg4O5qfLRi+7/HWltlxsJd Y1cpwNOlRPeqebS7OtlL6pe0BmcpRTUnzVILdbaNJQuPJQxSofj9/Ej8A2DqrJba0z 7wFwok6T7C+rpIv1BGEYjhlo0yCNuC5aFJdGRW3SJrNgV7bFpDa8D8ktznsn8o3Hao lTKWH7PLA8/BSRD7llfHHVDKUGE2oOYqB4vA8H0q1qPvmW/D/w4W1ACdbnhd/+5Mc1 lXIrbKSwDSkRsJWOU5iul/Wau+CQc0Z+swqg1GSngQo6HgFrgQRmPNlYMBQ6GaRoNJ +YX0dFEz56WZg== From: "Mario Limonciello (AMD)" To: Yazen Ghannam , x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), Jean Delvare Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , linux-kernel@vger.kernel.org, "Mario Limonciello (AMD)" Subject: [PATCH v2 5/7] firmware: dmi: Add missing DMI entry types Date: Tue, 16 Dec 2025 06:33:52 -0600 Message-ID: <20251216123354.9219-6-superm1@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251216123354.9219-1-superm1@kernel.org> References: <20251216123354.9219-1-superm1@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Type 42 through type 46 entry types are missing from the definitions in the dmi_entry_type enum. Link: https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_= 3.7.1.pdf Suggested-by: Yazen Ghannam Signed-off-by: Mario Limonciello (AMD) --- include/linux/dmi.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/dmi.h b/include/linux/dmi.h index 3fc3d334b321d..b7d4fdc25bfde 100644 --- a/include/linux/dmi.h +++ b/include/linux/dmi.h @@ -71,6 +71,10 @@ enum dmi_entry_type { DMI_ENTRY_ADDITIONAL, DMI_ENTRY_ONBOARD_DEV_EXT, DMI_ENTRY_MGMT_CONTROLLER_HOST, + DMI_ENTRY_TPM_DEVICE, + DMI_ENTRY_PROCESSOR_ADDITIONAL, + DMI_ENTRY_FIRMWARE_INVENTORY, + DMI_ENTRY_STRING_PROPERTY, DMI_ENTRY_INACTIVE =3D 126, DMI_ENTRY_END_OF_TABLE =3D 127, }; --=20 2.43.0