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From: Langyan Ye <yelangyan@huaqin.corp-partner.google.com>
To: neil.armstrong@linaro.org,
	jesszhan0024@gmail.com,
	maarten.lankhorst@linux.intel.com,
	mripard@kernel.org,
	tzimmermann@suse.de,
	airlied@gmail.com,
	simona@ffwll.ch
Cc: dianders@chromium.org,
	dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org,
	Langyan Ye <yelangyan@huaqin.corp-partner.google.com>
Subject: [PATCH RESEND] drm/panel: ilitek-ili9882t: Switch Tianma TL121BVMS07
 to DSC 120Hz mode
Date: Tue, 16 Dec 2025 15:55:30 +0800
Message-Id: 
 <20251216075530.1966327-1-yelangyan@huaqin.corp-partner.google.com>
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Migrate the TL121BVMS07 panel from non-DSC 60 Hz to DSC-enabled 120 Hz,
including updated init sequence, DSC configuration, and display timings.

Signed-off-by: Langyan Ye <yelangyan@huaqin.corp-partner.google.com>
---
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 147 ++++++++++++++++--
 1 file changed, 136 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/dr=
m/panel/panel-ilitek-ili9882t.c
index c52f20863fc7..370424ddfc80 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -8,6 +8,8 @@
 #include <linux/of.h>
 #include <linux/regulator/consumer.h>
=20
+#include <drm/display/drm_dsc.h>
+#include <drm/display/drm_dsc_helper.h>
 #include <drm/drm_connector.h>
 #include <drm/drm_crtc.h>
 #include <drm/drm_mipi_dsi.h>
@@ -15,6 +17,8 @@
=20
 #include <video/mipi_display.h>
=20
+#define DSC_BPG_OFFSET(x)	((u8)((x) & DSC_RANGE_BPG_OFFSET_MASK))
+
 struct ili9882t;
=20
 /*
@@ -23,6 +27,7 @@ struct ili9882t;
  */
 struct panel_desc {
 	const struct drm_display_mode *modes;
+	const struct drm_dsc_config *dsc;
 	unsigned int bpc;
=20
 	/**
@@ -52,6 +57,8 @@ struct ili9882t {
 	struct regulator *avee;
 	struct regulator *avdd;
 	struct gpio_desc *enable_gpio;
+
+	struct drm_dsc_config dsc;
 };
=20
 /* ILI9882-specific commands, add new commands as you decode them */
@@ -68,6 +75,67 @@ struct ili9882t {
 	mipi_dsi_dcs_write_seq_multi(ctx, IL79900A_DCS_SWITCH_PAGE, \
 				     0x5a, 0xa5, (page))
=20
+static const struct drm_dsc_config tianma_il79900a_dsc =3D {
+	.dsc_version_major =3D 1,
+	.dsc_version_minor =3D 2,
+	.slice_height =3D 8,
+	.slice_width =3D 800,
+	.slice_count =3D 2,
+	.bits_per_component =3D 8,
+	.bits_per_pixel =3D 8 << 4,
+	.block_pred_enable =3D true,
+	.native_420 =3D false,
+	.native_422 =3D false,
+	.simple_422 =3D false,
+	.vbr_enable =3D false,
+	.rc_model_size =3D DSC_RC_MODEL_SIZE_CONST,
+	.pic_width =3D 1600,
+	.pic_height =3D 2560,
+	.convert_rgb =3D 0,
+	.vbr_enable =3D 0,
+	.rc_buf_thresh =3D {14, 28, 42, 56, 70, 84, 98, 105, 112, 119, 121, 123, =
125, 126},
+	.rc_model_size =3D DSC_RC_MODEL_SIZE_CONST,
+	.rc_edge_factor =3D DSC_RC_EDGE_FACTOR_CONST,
+	.rc_tgt_offset_high =3D DSC_RC_TGT_OFFSET_HI_CONST,
+	.rc_tgt_offset_low =3D DSC_RC_TGT_OFFSET_LO_CONST,
+	.mux_word_size =3D DSC_MUX_WORD_SIZE_8_10_BPC,
+	.line_buf_depth =3D 9,
+	.first_line_bpg_offset =3D 12,
+	.initial_xmit_delay =3D 512,
+	.initial_offset =3D 6144,
+	.rc_quant_incr_limit0 =3D 11,
+	.rc_quant_incr_limit1 =3D 11,
+	.nfl_bpg_offset =3D 1402,
+	.rc_range_params =3D {
+		{ 0,  4, DSC_BPG_OFFSET(2)},
+		{ 0,  4, DSC_BPG_OFFSET(0)},
+		{ 1,  5, DSC_BPG_OFFSET(0)},
+		{ 1,  6, DSC_BPG_OFFSET(-2)},
+		{ 3,  7, DSC_BPG_OFFSET(-4)},
+		{ 3,  7, DSC_BPG_OFFSET(-6)},
+		{ 3,  7, DSC_BPG_OFFSET(-8)},
+		{ 3,  8, DSC_BPG_OFFSET(-8)},
+		{ 3,  9, DSC_BPG_OFFSET(-8)},
+		{ 3, 10, DSC_BPG_OFFSET(-10)},
+		{ 5, 10, DSC_BPG_OFFSET(-10)},
+		{ 5, 11, DSC_BPG_OFFSET(-12)},
+		{ 5, 11, DSC_BPG_OFFSET(-12)},
+		{ 9, 12, DSC_BPG_OFFSET(-12)},
+		{12, 13, DSC_BPG_OFFSET(-12)},
+	},
+	.initial_scale_value =3D 32,
+	.slice_chunk_size =3D 800,
+	.initial_dec_delay =3D 657,
+	.final_offset =3D 4320,
+	.scale_increment_interval =3D 222,
+	.scale_decrement_interval =3D 11,
+	.initial_scale_value =3D 32,
+	.nfl_bpg_offset =3D 3511,
+	.slice_bpg_offset =3D 2179,
+	.flatness_max_qp =3D 12,
+	.flatness_min_qp =3D 3,
+};
+
 static int starry_ili9882t_init(struct ili9882t *ili)
 {
 	struct mipi_dsi_multi_context ctx =3D { .dsi =3D ili->dsi };
@@ -423,22 +491,72 @@ static int starry_ili9882t_init(struct ili9882t *ili)
 static int tianma_il79900a_init(struct ili9882t *ili)
 {
 	struct mipi_dsi_multi_context ctx =3D { .dsi =3D ili->dsi };
+	struct drm_dsc_picture_parameter_set pps;
=20
 	mipi_dsi_usleep_range(&ctx, 5000, 5100);
=20
 	il79900a_switch_page(&ctx, 0x06);
 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3e, 0x62);
=20
+	il79900a_switch_page(&ctx, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00);
+
 	il79900a_switch_page(&ctx, 0x02);
-	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x20);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x00);
 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5d, 0x00);
 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x40);
=20
+	il79900a_switch_page(&ctx, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0X9e, 0xe9);
+
 	il79900a_switch_page(&ctx, 0x07);
-	mipi_dsi_dcs_write_seq_multi(&ctx, 0X29, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0X29, 0x01);
+
+	il79900a_switch_page(&ctx, 0x17);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x=
12, 0x00,
+				     0x00, 0x89, 0x30, 0x80, 0x0a, 0x00, 0x06, 0x40, 0x00,
+				     0x08, 0x03, 0x20, 0x03, 0x20, 0x02, 0x00, 0x02, 0x91,
+				     0x00, 0x20, 0x00, 0xde, 0x00, 0x0b, 0x00, 0x0c, 0x0d,
+				     0xb7, 0x08, 0x83, 0x18, 0x00, 0x10, 0xe0, 0x03, 0x0c,
+				     0x20, 0x00, 0x06, 0x0b, 0x0b, 0x33, 0x0e, 0x1c, 0x2a,
+				     0x38, 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b,
+				     0x7d, 0x7e, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, 0x09,
+				     0xbe, 0x19, 0xfc, 0x19, 0xfa, 0x19, 0xf8, 0x1a, 0x38,
+				     0x1a, 0x78, 0x1a, 0xb6, 0x2a, 0xb6, 0x2a, 0xf4, 0x2a,
+				     0xf4, 0x4b, 0x34, 0x63, 0x74);
=20
 	il79900a_switch_page(&ctx, 0x06);
-	mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x91, 0x45);
+
+	il79900a_switch_page(&ctx, 0x16);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x4b);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x73);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0xdf);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x01);
+
+	il79900a_switch_page(&ctx, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x8c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x3c);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x3d);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0xfc);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x9d);
+
+	il79900a_switch_page(&ctx, 0x0e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x18);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x0e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0xcd);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x53);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x0e);
+
+	il79900a_switch_page(&ctx, 0x1e);
+	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x5c);
+
+	drm_dsc_pps_payload_pack(&pps, &tianma_il79900a_dsc);
+
+	mipi_dsi_picture_parameter_set_multi(&ctx, &pps);
+
+	mipi_dsi_compression_mode_ext_multi(&ctx, true,
+					    MIPI_DSI_COMPRESSION_DSC, 1);
=20
 	il79900a_switch_page(&ctx, 0x00);
 	mipi_dsi_dcs_exit_sleep_mode_multi(&ctx);
@@ -447,9 +565,9 @@ static int tianma_il79900a_init(struct ili9882t *ili)
=20
 	mipi_dsi_dcs_set_display_on_multi(&ctx);
=20
-	mipi_dsi_msleep(&ctx, 80);
+	mipi_dsi_msleep(&ctx, 20);
=20
-	return 0;
+	return ctx.accum_err;
 };
=20
 static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
@@ -569,15 +687,15 @@ static const struct drm_display_mode starry_ili9882t_=
default_mode =3D {
 };
=20
 static const struct drm_display_mode tianma_il79900a_default_mode =3D {
-	.clock =3D 264355,
+	.clock =3D 543850,
 	.hdisplay =3D 1600,
 	.hsync_start =3D 1600 + 20,
-	.hsync_end =3D 1600 + 20 + 4,
-	.htotal =3D 1600 + 20 + 4 + 20,
+	.hsync_end =3D 1600 + 20 + 2,
+	.htotal =3D 1600 + 20 + 2 + 20,
 	.vdisplay =3D 2560,
-	.vsync_start =3D 2560 + 82,
-	.vsync_end =3D 2560 + 82 + 2,
-	.vtotal =3D 2560 + 82 + 2 + 36,
+	.vsync_start =3D 2560 + 62,
+	.vsync_end =3D 2560 + 62 + 2,
+	.vtotal =3D 2560 + 62 + 2 + 136,
 	.type =3D DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
 };
=20
@@ -597,6 +715,7 @@ static const struct panel_desc starry_ili9882t_desc =3D=
 {
=20
 static const struct panel_desc tianma_tl121bvms07_desc =3D {
 	.modes =3D &tianma_il79900a_default_mode,
+	.dsc =3D &tianma_il79900a_dsc,
 	.bpc =3D 8,
 	.size =3D {
 		.width_mm =3D 163,
@@ -716,6 +835,12 @@ static int ili9882t_probe(struct mipi_dsi_device *dsi)
 	dsi->mode_flags =3D desc->mode_flags;
 	ili->desc =3D desc;
 	ili->dsi =3D dsi;
+
+	if (desc->dsc) {
+		ili->dsc =3D *desc->dsc;
+		dsi->dsc =3D &ili->dsc;
+	}
+
 	ret =3D ili9882t_add(ili);
 	if (ret < 0)
 		return ret;
--=20
2.34.1