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Tue, 16 Dec 2025 12:04:22 -0800 (PST) From: "Markus Schneider-Pargmann (TI.com)" Date: Tue, 16 Dec 2025 21:03:46 +0100 Subject: [PATCH v2 2/3] clocksource/drivers/timer-ti-dm: Add clocksource support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251216-topic-ti-dm-clkevt-v6-16-v2-2-bfd7dd085c19@baylibre.com> References: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> In-Reply-To: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> To: Daniel Lezcano , Thomas Gleixner Cc: Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Sebin Francis , Kendall Willis , Akashdeep Kaur , linux-kernel@vger.kernel.org, "Markus Schneider-Pargmann (TI.com)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6728; i=msp@baylibre.com; h=from:subject:message-id; bh=yEl4LfDTZS1Akz9aG6QGw1dhZ8ihOp1PMeuGnWf6VEY=; b=owGbwMvMwCXWejAsc4KoVzDjabUkhkzH3UZ2izrbg6y/H/ktd2TTWb5lIbxCToW9iwrcfl/i3 bTrgZ96RykLgxgXg6yYIktnYmjaf/mdx5IXLdsMM4eVCWQIAxenAEyk5zHDH76tO9/zTHZYv3oG y+bS3yvClpouf9jFsuRaVUL5sm2nGJ8x/K+ewWOi6/whNmDWg46otTNKz5lE/xYQjvT/HicXMOH xfR4A X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 Add support for using the TI Dual-Mode Timer as a clocksource. The driver automatically picks the first timer that is marked as always-on on with the "ti,timer-alwon" property to be the clocksource. The timer can then be used for CPU independent time keeping. Signed-off-by: Markus Schneider-Pargmann (TI.com) --- drivers/clocksource/timer-ti-dm.c | 137 ++++++++++++++++++++++++++++++++++= +++- 1 file changed, 136 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index 793e7cdcb1b16b58db3a81668e3c8144efc7baaf..9617bbe96209b91e58fabc2c275= 280703ce8af7c 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -20,6 +20,7 @@ =20 #include #include +#include #include #include #include @@ -27,8 +28,10 @@ #include #include #include +#include #include #include +#include =20 #include #include @@ -142,12 +145,23 @@ struct dmtimer { struct notifier_block nb; struct notifier_block fclk_nb; unsigned long fclk_rate; + + struct dmtimer_clocksource *clksrc; }; =20 static u32 omap_reserved_systimers; static LIST_HEAD(omap_timer_list); static DEFINE_SPINLOCK(dm_timer_lock); =20 +struct dmtimer_clocksource { + struct clocksource dev; + struct dmtimer *timer; + unsigned int loadval; +}; + +static resource_size_t omap_dm_timer_clocksource_base; +static void __iomem *omap_dm_timer_sched_clock_counter; + enum { REQUEST_ANY =3D 0, REQUEST_BY_ID, @@ -1185,6 +1199,107 @@ static const struct dev_pm_ops omap_dm_timer_pm_ops= =3D { =20 static const struct of_device_id omap_timer_match[]; =20 +static void omap_dm_timer_find_alwon(void) +{ + struct device_node *np; + + for_each_matching_node(np, omap_timer_match) { + struct resource res; + + if (!of_device_is_available(np)) + continue; + + if (!of_property_read_bool(np, "ti,timer-alwon")) + continue; + + if (of_address_to_resource(np, 0, &res)) + continue; + + omap_dm_timer_clocksource_base =3D res.start; + + of_node_put(np); + return; + } + + omap_dm_timer_clocksource_base =3D -1; +} + +static struct dmtimer_clocksource *omap_dm_timer_to_clocksource(struct clo= cksource *cs) +{ + return container_of(cs, struct dmtimer_clocksource, dev); +} + +static u64 omap_dm_timer_read_cycles(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + return (u64)__omap_dm_timer_read_counter(timer); +} + +static u64 notrace omap_dm_timer_read_sched_clock(void) +{ + /* Posted mode is not active here, so we can read directly */ + return readl_relaxed(omap_dm_timer_sched_clock_counter); +} + +static void omap_dm_timer_clocksource_suspend(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + clksrc->loadval =3D __omap_dm_timer_read_counter(timer); + __omap_dm_timer_stop(timer); +} + +static void omap_dm_timer_clocksource_resume(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, clksrc->loadval); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST | OMAP_TIMER= _CTRL_AR); +} + +static int omap_dm_timer_setup_clocksource(struct dmtimer *timer) +{ + struct device *dev =3D &timer->pdev->dev; + struct dmtimer_clocksource *clksrc; + int err; + + __omap_dm_timer_init_regs(timer); + + timer->reserved =3D 1; + + clksrc =3D devm_kzalloc(dev, sizeof(*clksrc), GFP_KERNEL); + if (!clksrc) + return -ENOMEM; + + clksrc->timer =3D timer; + timer->clksrc =3D clksrc; + + clksrc->dev.name =3D "omap_dm_timer"; + clksrc->dev.rating =3D 300; + clksrc->dev.read =3D omap_dm_timer_read_cycles; + clksrc->dev.mask =3D CLOCKSOURCE_MASK(32); + clksrc->dev.flags =3D CLOCK_SOURCE_IS_CONTINUOUS; + clksrc->dev.suspend =3D omap_dm_timer_clocksource_suspend; + clksrc->dev.resume =3D omap_dm_timer_clocksource_resume; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, 0); + dmtimer_write(timer, OMAP_TIMER_LOAD_REG, 0); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST | OMAP_TIMER= _CTRL_AR); + + omap_dm_timer_sched_clock_counter =3D timer->func_base + _OMAP_TIMER_COUN= TER_OFFSET; + sched_clock_register(omap_dm_timer_read_sched_clock, 32, timer->fclk_rate= ); + + err =3D clocksource_register_hz(&clksrc->dev, timer->fclk_rate); + if (err) + return dev_err_probe(dev, err, "Could not register as clocksource\n"); + + return 0; +} + /** * omap_dm_timer_probe - probe function called for every registered device * @pdev: pointer to current timer platform device @@ -1198,8 +1313,12 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) struct dmtimer *timer; struct device *dev =3D &pdev->dev; const struct dmtimer_platform_data *pdata; + struct resource *res; int ret; =20 + if (!omap_dm_timer_clocksource_base) + omap_dm_timer_find_alwon(); + pdata =3D of_device_get_match_data(dev); if (!pdata) pdata =3D dev_get_platdata(dev); @@ -1272,6 +1391,16 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) =20 timer->pdev =3D pdev; =20 + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (omap_dm_timer_clocksource_base && res && + res->start =3D=3D omap_dm_timer_clocksource_base && + !IS_ERR_OR_NULL(timer->fclk)) { + ret =3D omap_dm_timer_setup_clocksource(timer); + if (ret) + return ret; + } + pm_runtime_enable(dev); =20 if (!timer->reserved) { @@ -1299,6 +1428,9 @@ static int omap_dm_timer_probe(struct platform_device= *pdev) return 0; =20 err_disable: + if (timer->clksrc) + clocksource_unregister(&timer->clksrc->dev); + pm_runtime_disable(dev); return ret; } @@ -1313,10 +1445,13 @@ static int omap_dm_timer_probe(struct platform_devi= ce *pdev) */ static void omap_dm_timer_remove(struct platform_device *pdev) { - struct dmtimer *timer; + struct dmtimer *timer =3D dev_get_drvdata(&pdev->dev); unsigned long flags; int ret =3D -EINVAL; =20 + if (timer->clksrc) + clocksource_unregister(&timer->clksrc->dev); + spin_lock_irqsave(&dm_timer_lock, flags); list_for_each_entry(timer, &omap_timer_list, node) if (!strcmp(dev_name(&timer->pdev->dev), --=20 2.51.0