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Tue, 16 Dec 2025 12:04:20 -0800 (PST) From: "Markus Schneider-Pargmann (TI.com)" Date: Tue, 16 Dec 2025 21:03:45 +0100 Subject: [PATCH v2 1/3] clocksource/drivers/timer-ti-dm: Fix property name in comment Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251216-topic-ti-dm-clkevt-v6-16-v2-1-bfd7dd085c19@baylibre.com> References: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> In-Reply-To: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> To: Daniel Lezcano , Thomas Gleixner Cc: Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Sebin Francis , Kendall Willis , Akashdeep Kaur , linux-kernel@vger.kernel.org, "Markus Schneider-Pargmann (TI.com)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1234; i=msp@baylibre.com; h=from:subject:message-id; bh=mR6BSrW+zsMLOgB3nmVKaVeyLCCni/ENpyrJWNEK1fY=; b=owGbwMvMwCXWejAsc4KoVzDjabUkhkzH3dqWa4+KqD1oTt47yU1hyx8p7cCTjwT/LspknqjQZ vdUZt7vjlIWBjEuBlkxRZbOxNC0//I7jyUvWrYZZg4rE8gQBi5OAZiIeRDDf//995ye//2v/fCK VXD/2j/iq10qm3xe1LYt8j+5QmSBZzgjw3uDyW2pusGLyt5rL3AUWPH4Ojebo9/3n9dDMlolIjU ieQE= X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 ti,always-on property doesn't exist. ti,timer-alwon is meant here. Fix this minor bug in the comment. Signed-off-by: Markus Schneider-Pargmann (TI.com) --- drivers/clocksource/timer-ti-dm-systimer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-ti-dm-systimer.c b/drivers/clocksour= ce/timer-ti-dm-systimer.c index 985a6d08512b42f499b3e243eb69cc9674bc8e53..fb0a3cc23b5a35e2906a253d36c= cef2baccca50a 100644 --- a/drivers/clocksource/timer-ti-dm-systimer.c +++ b/drivers/clocksource/timer-ti-dm-systimer.c @@ -226,7 +226,7 @@ static bool __init dmtimer_is_preferred(struct device_n= ode *np) * Some omap3 boards with unreliable oscillator must not use the counter_3= 2k * or dmtimer1 with 32 KiHz source. Additionally, the boards with unreliab= le * oscillator should really set counter_32k as disabled, and delete dmtime= r1 - * ti,always-on property, but let's not count on it. For these quirky case= s, + * ti,timer-alwon property, but let's not count on it. For these quirky ca= ses, * we prefer using the always-on secure dmtimer12 with the internal 32 KiHz * clock as the clocksource, and any available dmtimer as clockevent. * --=20 2.51.0 From nobody Thu Dec 18 23:29:20 2025 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0AED8258ED7 for ; Tue, 16 Dec 2025 20:04:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765915467; cv=none; b=D0NRdsYi5oVP+sVqEGj3LZ6wczqbJKNZAEdSQYAg+cmnln/3WxCMSBpZAjmVgXJVUQLIF/DyWN9ZRauK5sP+93UcNqAvFjiSV0xQTPlq+R9Kly0QP7MzYRZpdbc3jo6KyoL3jvsFmFbZXyJohNyZJDiJmIlyuZnRLtTQ7PBA0yw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765915467; c=relaxed/simple; bh=yEl4LfDTZS1Akz9aG6QGw1dhZ8ihOp1PMeuGnWf6VEY=; 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Tue, 16 Dec 2025 12:04:23 -0800 (PST) Received: from localhost ([2001:4091:a246:86d6:2b1a:7262:ad08:3918]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-64b3f4f5a22sm361449a12.9.2025.12.16.12.04.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Dec 2025 12:04:22 -0800 (PST) From: "Markus Schneider-Pargmann (TI.com)" Date: Tue, 16 Dec 2025 21:03:46 +0100 Subject: [PATCH v2 2/3] clocksource/drivers/timer-ti-dm: Add clocksource support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251216-topic-ti-dm-clkevt-v6-16-v2-2-bfd7dd085c19@baylibre.com> References: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> In-Reply-To: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> To: Daniel Lezcano , Thomas Gleixner Cc: Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Sebin Francis , Kendall Willis , Akashdeep Kaur , linux-kernel@vger.kernel.org, "Markus Schneider-Pargmann (TI.com)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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The driver automatically picks the first timer that is marked as always-on on with the "ti,timer-alwon" property to be the clocksource. The timer can then be used for CPU independent time keeping. Signed-off-by: Markus Schneider-Pargmann (TI.com) --- drivers/clocksource/timer-ti-dm.c | 137 ++++++++++++++++++++++++++++++++++= +++- 1 file changed, 136 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index 793e7cdcb1b16b58db3a81668e3c8144efc7baaf..9617bbe96209b91e58fabc2c275= 280703ce8af7c 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -20,6 +20,7 @@ =20 #include #include +#include #include #include #include @@ -27,8 +28,10 @@ #include #include #include +#include #include #include +#include =20 #include #include @@ -142,12 +145,23 @@ struct dmtimer { struct notifier_block nb; struct notifier_block fclk_nb; unsigned long fclk_rate; + + struct dmtimer_clocksource *clksrc; }; =20 static u32 omap_reserved_systimers; static LIST_HEAD(omap_timer_list); static DEFINE_SPINLOCK(dm_timer_lock); =20 +struct dmtimer_clocksource { + struct clocksource dev; + struct dmtimer *timer; + unsigned int loadval; +}; + +static resource_size_t omap_dm_timer_clocksource_base; +static void __iomem *omap_dm_timer_sched_clock_counter; + enum { REQUEST_ANY =3D 0, REQUEST_BY_ID, @@ -1185,6 +1199,107 @@ static const struct dev_pm_ops omap_dm_timer_pm_ops= =3D { =20 static const struct of_device_id omap_timer_match[]; =20 +static void omap_dm_timer_find_alwon(void) +{ + struct device_node *np; + + for_each_matching_node(np, omap_timer_match) { + struct resource res; + + if (!of_device_is_available(np)) + continue; + + if (!of_property_read_bool(np, "ti,timer-alwon")) + continue; + + if (of_address_to_resource(np, 0, &res)) + continue; + + omap_dm_timer_clocksource_base =3D res.start; + + of_node_put(np); + return; + } + + omap_dm_timer_clocksource_base =3D -1; +} + +static struct dmtimer_clocksource *omap_dm_timer_to_clocksource(struct clo= cksource *cs) +{ + return container_of(cs, struct dmtimer_clocksource, dev); +} + +static u64 omap_dm_timer_read_cycles(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + return (u64)__omap_dm_timer_read_counter(timer); +} + +static u64 notrace omap_dm_timer_read_sched_clock(void) +{ + /* Posted mode is not active here, so we can read directly */ + return readl_relaxed(omap_dm_timer_sched_clock_counter); +} + +static void omap_dm_timer_clocksource_suspend(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + clksrc->loadval =3D __omap_dm_timer_read_counter(timer); + __omap_dm_timer_stop(timer); +} + +static void omap_dm_timer_clocksource_resume(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, clksrc->loadval); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST | OMAP_TIMER= _CTRL_AR); +} + +static int omap_dm_timer_setup_clocksource(struct dmtimer *timer) +{ + struct device *dev =3D &timer->pdev->dev; + struct dmtimer_clocksource *clksrc; + int err; + + __omap_dm_timer_init_regs(timer); + + timer->reserved =3D 1; + + clksrc =3D devm_kzalloc(dev, sizeof(*clksrc), GFP_KERNEL); + if (!clksrc) + return -ENOMEM; + + clksrc->timer =3D timer; + timer->clksrc =3D clksrc; + + clksrc->dev.name =3D "omap_dm_timer"; + clksrc->dev.rating =3D 300; + clksrc->dev.read =3D omap_dm_timer_read_cycles; + clksrc->dev.mask =3D CLOCKSOURCE_MASK(32); + clksrc->dev.flags =3D CLOCK_SOURCE_IS_CONTINUOUS; + clksrc->dev.suspend =3D omap_dm_timer_clocksource_suspend; + clksrc->dev.resume =3D omap_dm_timer_clocksource_resume; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, 0); + dmtimer_write(timer, OMAP_TIMER_LOAD_REG, 0); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST | OMAP_TIMER= _CTRL_AR); + + omap_dm_timer_sched_clock_counter =3D timer->func_base + _OMAP_TIMER_COUN= TER_OFFSET; + sched_clock_register(omap_dm_timer_read_sched_clock, 32, timer->fclk_rate= ); + + err =3D clocksource_register_hz(&clksrc->dev, timer->fclk_rate); + if (err) + return dev_err_probe(dev, err, "Could not register as clocksource\n"); + + return 0; +} + /** * omap_dm_timer_probe - probe function called for every registered device * @pdev: pointer to current timer platform device @@ -1198,8 +1313,12 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) struct dmtimer *timer; struct device *dev =3D &pdev->dev; const struct dmtimer_platform_data *pdata; + struct resource *res; int ret; =20 + if (!omap_dm_timer_clocksource_base) + omap_dm_timer_find_alwon(); + pdata =3D of_device_get_match_data(dev); if (!pdata) pdata =3D dev_get_platdata(dev); @@ -1272,6 +1391,16 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) =20 timer->pdev =3D pdev; =20 + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (omap_dm_timer_clocksource_base && res && + res->start =3D=3D omap_dm_timer_clocksource_base && + !IS_ERR_OR_NULL(timer->fclk)) { + ret =3D omap_dm_timer_setup_clocksource(timer); + if (ret) + return ret; + } + pm_runtime_enable(dev); =20 if (!timer->reserved) { @@ -1299,6 +1428,9 @@ static int omap_dm_timer_probe(struct platform_device= *pdev) return 0; =20 err_disable: + if (timer->clksrc) + clocksource_unregister(&timer->clksrc->dev); + pm_runtime_disable(dev); return ret; } @@ -1313,10 +1445,13 @@ static int omap_dm_timer_probe(struct platform_devi= ce *pdev) */ static void omap_dm_timer_remove(struct platform_device *pdev) { - struct dmtimer *timer; + struct dmtimer *timer =3D dev_get_drvdata(&pdev->dev); unsigned long flags; int ret =3D -EINVAL; =20 + if (timer->clksrc) + clocksource_unregister(&timer->clksrc->dev); + spin_lock_irqsave(&dm_timer_lock, flags); list_for_each_entry(timer, &omap_timer_list, node) if (!strcmp(dev_name(&timer->pdev->dev), --=20 2.51.0 From nobody Thu Dec 18 23:29:20 2025 Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D0DC2C3252 for ; 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Tue, 16 Dec 2025 12:04:25 -0800 (PST) Received: from localhost ([2001:4091:a246:86d6:2b1a:7262:ad08:3918]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-64b3f584800sm332294a12.30.2025.12.16.12.04.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Dec 2025 12:04:24 -0800 (PST) From: "Markus Schneider-Pargmann (TI.com)" Date: Tue, 16 Dec 2025 21:03:47 +0100 Subject: [PATCH v2 3/3] clocksource/drivers/timer-ti-dm: Add clockevent support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251216-topic-ti-dm-clkevt-v6-16-v2-3-bfd7dd085c19@baylibre.com> References: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> In-Reply-To: <20251216-topic-ti-dm-clkevt-v6-16-v2-0-bfd7dd085c19@baylibre.com> To: Daniel Lezcano , Thomas Gleixner Cc: Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Sebin Francis , Kendall Willis , Akashdeep Kaur , linux-kernel@vger.kernel.org, "Markus Schneider-Pargmann (TI.com)" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6667; i=msp@baylibre.com; h=from:subject:message-id; bh=JMgYaq8WQ1kszJyA/EA+8xzCsDM1CdpeYKJ5q2VZfqk=; b=owGbwMvMwCXWejAsc4KoVzDjabUkhkzH3ZZK1WUmTYI5EVt3O/MdmO/VdPic44WXHv6cDXNTo pqbn/h1lLIwiHExyIopsnQmhqb9l995LHnRss0wc1iZQIYwcHEKwETe6jMynLuiuIb1s5v5bAne U6zLnuybqNsmOvnH+bXa0+Rn6E24ms7IsDwvuqcw8gbH5cf6Hwr++e/KTvLh0wz8OH9W9QnNsth 57AA= X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 Add support for using the TI Dual-Mode Timer for clockevents. The second always on device with the "ti,timer-alwon" property is selected to be used for clockevents. The first one is used as clocksource. This allows clockevents to be setup independently of the CPU. Signed-off-by: Markus Schneider-Pargmann (TI.com) --- drivers/clocksource/timer-ti-dm.c | 138 ++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 133 insertions(+), 5 deletions(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index 9617bbe96209b91e58fabc2c275280703ce8af7c..fa2c7d19b9e53e3444a86f6b4f8= baafd7e669887 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -21,8 +21,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -159,7 +161,14 @@ struct dmtimer_clocksource { unsigned int loadval; }; =20 +struct omap_dm_timer_clockevent { + struct clock_event_device dev; + struct dmtimer *timer; + u32 period; +}; + static resource_size_t omap_dm_timer_clocksource_base; +static resource_size_t omap_dm_timer_clockevent_base; static void __iomem *omap_dm_timer_sched_clock_counter; =20 enum { @@ -1203,6 +1212,9 @@ static void omap_dm_timer_find_alwon(void) { struct device_node *np; =20 + if (omap_dm_timer_clocksource_base && omap_dm_timer_clockevent_base) + return; + for_each_matching_node(np, omap_timer_match) { struct resource res; =20 @@ -1215,13 +1227,22 @@ static void omap_dm_timer_find_alwon(void) if (of_address_to_resource(np, 0, &res)) continue; =20 - omap_dm_timer_clocksource_base =3D res.start; + if (!omap_dm_timer_clocksource_base) { + omap_dm_timer_clocksource_base =3D res.start; + continue; + } =20 - of_node_put(np); - return; + if (res.start !=3D omap_dm_timer_clocksource_base) { + omap_dm_timer_clockevent_base =3D res.start; + + of_node_put(np); + return; + } } =20 - omap_dm_timer_clocksource_base =3D -1; + if (!omap_dm_timer_clocksource_base) + omap_dm_timer_clocksource_base =3D -1; + omap_dm_timer_clockevent_base =3D -1; } =20 static struct dmtimer_clocksource *omap_dm_timer_to_clocksource(struct clo= cksource *cs) @@ -1300,6 +1321,105 @@ static int omap_dm_timer_setup_clocksource(struct d= mtimer *timer) return 0; } =20 +static struct omap_dm_timer_clockevent *to_dm_timer_clockevent(struct cloc= k_event_device *evt) +{ + return container_of(evt, struct omap_dm_timer_clockevent, dev); +} + +static int omap_dm_timer_evt_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, 0xffffffff - cycles); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST); + + return 0; +} + +static int omap_dm_timer_evt_shutdown(struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + __omap_dm_timer_stop(timer); + + return 0; +} + +static int omap_dm_timer_evt_set_periodic(struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + omap_dm_timer_evt_shutdown(evt); + + omap_dm_timer_set_load(&timer->cookie, clkevt->period); + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, clkevt->period); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST); + + return 0; +} + +static irqreturn_t omap_dm_timer_evt_interrupt(int irq, void *dev_id) +{ + struct omap_dm_timer_clockevent *clkevt =3D dev_id; + struct dmtimer *timer =3D clkevt->timer; + + __omap_dm_timer_write_status(timer, OMAP_TIMER_INT_OVERFLOW); + + clkevt->dev.event_handler(&clkevt->dev); + + return IRQ_HANDLED; +} + +static int omap_dm_timer_setup_clockevent(struct dmtimer *timer) +{ + struct device *dev =3D &timer->pdev->dev; + struct omap_dm_timer_clockevent *clkevt; + int ret; + + clkevt =3D devm_kzalloc(dev, sizeof(*clkevt), GFP_KERNEL); + if (!clkevt) + return -ENOMEM; + + timer->reserved =3D 1; + clkevt->timer =3D timer; + + clkevt->dev.name =3D "omap_dm_timer"; + clkevt->dev.features =3D CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; + clkevt->dev.rating =3D 300; + clkevt->dev.set_next_event =3D omap_dm_timer_evt_set_next_event; + clkevt->dev.set_state_shutdown =3D omap_dm_timer_evt_shutdown; + clkevt->dev.set_state_periodic =3D omap_dm_timer_evt_set_periodic; + clkevt->dev.set_state_oneshot =3D omap_dm_timer_evt_shutdown; + clkevt->dev.set_state_oneshot_stopped =3D omap_dm_timer_evt_shutdown; + clkevt->dev.tick_resume =3D omap_dm_timer_evt_shutdown; + clkevt->dev.cpumask =3D cpu_possible_mask; + clkevt->period =3D 0xffffffff - DIV_ROUND_CLOSEST(timer->fclk_rate, HZ); + + __omap_dm_timer_init_regs(timer); + __omap_dm_timer_stop(timer); + __omap_dm_timer_enable_posted(timer); + + ret =3D devm_request_irq(dev, timer->irq, omap_dm_timer_evt_interrupt, + IRQF_TIMER, "omap_dm_timer_clockevent", clkevt); + if (ret) { + dev_err(dev, "Failed to request interrupt: %d\n", ret); + return ret; + } + + __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW); + + clockevents_config_and_register(&clkevt->dev, timer->fclk_rate, + 3, + 0xffffffff); + + return 0; +} + /** * omap_dm_timer_probe - probe function called for every registered device * @pdev: pointer to current timer platform device @@ -1316,7 +1436,7 @@ static int omap_dm_timer_probe(struct platform_device= *pdev) struct resource *res; int ret; =20 - if (!omap_dm_timer_clocksource_base) + if (!omap_dm_timer_clocksource_base || !omap_dm_timer_clockevent_base) omap_dm_timer_find_alwon(); =20 pdata =3D of_device_get_match_data(dev); @@ -1393,6 +1513,14 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) =20 res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); =20 + if (omap_dm_timer_clockevent_base && res && + res->start =3D=3D omap_dm_timer_clockevent_base && + !IS_ERR_OR_NULL(timer->fclk)) { + ret =3D omap_dm_timer_setup_clockevent(timer); + if (ret) + return ret; + } + if (omap_dm_timer_clocksource_base && res && res->start =3D=3D omap_dm_timer_clocksource_base && !IS_ERR_OR_NULL(timer->fclk)) { --=20 2.51.0