From nobody Tue Dec 16 20:29:04 2025 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C701F326D6F for ; Mon, 15 Dec 2025 20:32:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765830722; cv=none; b=iE6NYaBmW0kt6+S9crdlD/ZcSTwjQC0bgM4zkqtb5sHuB8lDDb61G5I50Ux/rIUUhKpT2i4WlXjyyjmcnFNO6/RK5QqGXIZUKRuPZ9VCPY6F1txUh/4qpwNrkekY3YmCuD0gAauFFxbOkEAHKWkVLCuCT5nNeAS29ovl0FGu3S8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765830722; c=relaxed/simple; bh=1gxlbd+pvmIMUcT5ZU7Piy6pxWsGfkPklfKZxKwgr54=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XSr+MOIo1jP7gILnvj7iajJg2KhoWYyjlGtP7AHf51S4nXkZ1JUsaOBkCyrLNEA+PrmE8rt6gPurN4B8FJpTr993xET1miRj1335TP72WbZXymZx6/hzjvQWZhlonQa9RnUlMTN4GOjEcoxYHi5L8C5jkbtpYgE2N5gkwvPHRyY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=jQ2DAp9M; arc=none smtp.client-ip=170.10.129.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="jQ2DAp9M" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1765830719; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=opZ6yIttPOVGMwX1/MQZFcQn0kGWlUn0+srNUr1bgPQ=; b=jQ2DAp9M8dRf3tIEyeLn1x0K64q7XO5cJtcFTjUEsyspXJ/OLeRUjZvMtXvCKDgsmSwEsK vhX10cd8SthILwY2v+xEQFTI4E0RZRNMsZb9Ad7hciLPu0dRCLMvbTxIR5grM183Wj6wrP 1mdxcjz5fPaGIv79RLfYN4z3lqZJyYE= Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-321-7ce7iUgyPEW1KIc3R8rcDA-1; Mon, 15 Dec 2025 15:31:54 -0500 X-MC-Unique: 7ce7iUgyPEW1KIc3R8rcDA-1 X-Mimecast-MFC-AGG-ID: 7ce7iUgyPEW1KIc3R8rcDA_1765830710 Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 837501800245; Mon, 15 Dec 2025 20:31:50 +0000 (UTC) Received: from p16v.redhat.com (unknown [10.45.224.214]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1D09530001A8; Mon, 15 Dec 2025 20:31:40 +0000 (UTC) From: Ivan Vecera To: netdev@vger.kernel.org Cc: Alexander Lobakin , Andrew Lunn , Arkadiusz Kubalewski , Conor Dooley , "David S. Miller" , Eric Dumazet , Grzegorz Nitka , Jakub Kicinski , Jiri Pirko , Jonathan Lemon , Krzysztof Kozlowski , Leon Romanovsky , Mark Bloch , Michal Schmidt , Paolo Abeni , Petr Oros , Prathosh Satish , Przemek Kitszel , Richard Cochran , Rob Herring , Saeed Mahameed , Simon Horman , Stefan Wahren , Tariq Toukan , Tony Nguyen , Vadim Fedorenko , Willem de Bruijn , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, intel-wired-lan@lists.osuosl.org, linux-rdma@vger.kernel.org Subject: [PATCH RFC net-next v2 06/12] dpll: Support dynamic pin index allocation Date: Mon, 15 Dec 2025 21:30:31 +0100 Message-ID: <20251215203037.1324945-7-ivecera@redhat.com> In-Reply-To: <20251215203037.1324945-1-ivecera@redhat.com> References: <20251215203037.1324945-1-ivecera@redhat.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Content-Type: text/plain; charset="utf-8" Allow drivers to register DPLL pins without manually specifying a pin index. Currently, drivers must provide a unique pin index when calling dpll_pin_get(). This works well for hardware-mapped pins but creates friction for drivers handling virtual pins or those without a strict hardware indexing scheme. Introduce DPLL_PIN_IDX_UNSPEC (U32_MAX). When a driver passes this value as the pin index: 1. The core allocates a unique index using an IDA 2. The allocated index is mapped to a range starting above `INT_MAX` This separation ensures that dynamically allocated indices never collide with standard driver-provided hardware indices, which are assumed to be within the `0` to `INT_MAX` range. The index is automatically freed when the pin is released in dpll_pin_put(). Signed-off-by: Ivan Vecera --- drivers/dpll/dpll_core.c | 48 ++++++++++++++++++++++++++++++++++++++-- include/linux/dpll.h | 2 ++ 2 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c index 52f2ed888e46c..15a944553546f 100644 --- a/drivers/dpll/dpll_core.c +++ b/drivers/dpll/dpll_core.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include @@ -24,6 +25,7 @@ DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC); DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC); =20 static RAW_NOTIFIER_HEAD(dpll_notifier_chain); +static DEFINE_IDA(dpll_pin_idx_ida); =20 static u32 dpll_device_xa_id; static u32 dpll_pin_xa_id; @@ -468,6 +470,36 @@ void dpll_device_unregister(struct dpll_device *dpll, } EXPORT_SYMBOL_GPL(dpll_device_unregister); =20 +static int dpll_pin_idx_alloc(u32 *pin_idx) +{ + int ret; + + if (!pin_idx) + return -EINVAL; + + /* Alloc unique number from IDA. Number belongs to <0, INT_MAX> range */ + ret =3D ida_alloc(&dpll_pin_idx_ida, GFP_KERNEL); + if (ret < 0) + return ret; + + /* Map the value to dynamic pin index range */ + *pin_idx =3D (u32)ret + INT_MAX + 1; + + return 0; +} + +static void dpll_pin_idx_free(u32 pin_idx) +{ + if (pin_idx <=3D INT_MAX) + return; /* Not a dynamic pin index */ + + /* Map the index value from dynamic pin index range to IDA range and + * free it. + */ + pin_idx -=3D INT_MAX - 1; + ida_free(&dpll_pin_idx_ida, pin_idx); +} + static void dpll_pin_prop_free(struct dpll_pin_properties *prop) { kfree(prop->package_label); @@ -525,9 +557,18 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct modul= e *module, struct dpll_pin *pin; int ret; =20 + if (pin_idx =3D=3D DPLL_PIN_IDX_UNSPEC) { + ret =3D dpll_pin_idx_alloc(&pin_idx); + if (ret) + return ERR_PTR(ret); + } else if (pin_idx > INT_MAX) { + return ERR_PTR(-EINVAL); + } pin =3D kzalloc(sizeof(*pin), GFP_KERNEL); - if (!pin) - return ERR_PTR(-ENOMEM); + if (!pin) { + ret =3D -ENOMEM; + goto err_pin_alloc; + } pin->pin_idx =3D pin_idx; pin->clock_id =3D clock_id; pin->module =3D module; @@ -555,6 +596,8 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module= *module, dpll_pin_prop_free(&pin->prop); err_pin_prop: kfree(pin); +err_pin_alloc: + dpll_pin_idx_free(pin_idx); return ERR_PTR(ret); } =20 @@ -658,6 +701,7 @@ void dpll_pin_put(struct dpll_pin *pin) xa_destroy(&pin->ref_sync_pins); dpll_pin_prop_free(&pin->prop); fwnode_handle_put(pin->fwnode); + dpll_pin_idx_free(pin->pin_idx); kfree_rcu(pin, rcu); } mutex_unlock(&dpll_lock); diff --git a/include/linux/dpll.h b/include/linux/dpll.h index 34b005bb4df6f..a89a43aaea444 100644 --- a/include/linux/dpll.h +++ b/include/linux/dpll.h @@ -235,6 +235,8 @@ int dpll_device_register(struct dpll_device *dpll, enum= dpll_type type, void dpll_device_unregister(struct dpll_device *dpll, const struct dpll_device_ops *ops, void *priv); =20 +#define DPLL_PIN_IDX_UNSPEC U32_MAX + struct dpll_pin * dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module, const struct dpll_pin_properties *prop); --=20 2.51.2