From nobody Fri Dec 19 15:59:28 2025 Received: from mail-pj1-f74.google.com (mail-pj1-f74.google.com [209.85.216.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E1FA29B764 for ; Mon, 15 Dec 2025 19:25:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.74 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765826715; cv=none; b=oTJvxDTvwYWHhMBMK6GysmhR49Q3/Lw5ePYETU9XY65og06a63RuQD1GdA80cQ1kRwu8kpy0De+xWyueHLDidENRZf/rv2lAvy1OWjHegdUZtyfOUtzwkXBNpwoakwOhF+Qb34b41HtHomzHPfFFX1ygPlm9BVtMnsnm2HvmrrA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765826715; c=relaxed/simple; bh=0fclIdqUBdcgpzQEYAw1obUVgdqABAf6E/xc732decE=; h=Date:Mime-Version:Message-ID:Subject:From:To:Cc:Content-Type; b=A08QzPVak2GCNo+sZY4ar4Em2W9C+wTmz+cYQjLUyhn2V6Z+YcVGPES5ZZ5tM+4SJM7vUTA/xMrFQ+OYIUAADVkMNtn+IOvca9bIv6j1V2EpfnXhfmnMsclBJOHvGOTKQoGLT4+B8s9A/hLaLbv5/A5i89JaJmvi+LofJF88kKw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--chengkev.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=y8XV+4CK; arc=none smtp.client-ip=209.85.216.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--chengkev.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="y8XV+4CK" Received: by mail-pj1-f74.google.com with SMTP id 98e67ed59e1d1-34a8cdba421so5015180a91.2 for ; Mon, 15 Dec 2025 11:25:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1765826713; x=1766431513; darn=vger.kernel.org; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=Mw6Udw3xyK1jm/MjliE0wzhu/i34l1ZJcAQTPaQhsRI=; b=y8XV+4CKQxMphxp5mLir0ABNnrcr+PvrC5/8fd87UF5iKBvjo8T8zduDDD7EvIOGeH fuV6MumL9Np0lcq4RvBw5VmiXDTpp2G3czpyxvd8l9Eb06x1lGBo+FiS7+PD+n8T4acG W+cfcbFk8zvhWjyr6dQ/ulxcbQD0EtbyO5AakzRaMMSutKqanD6zdk8+m8nj2g5CRa5/ XMoQNenSrGgD4WogqtHzw8QtRdA1VeSs+DOx3skyMfjdDGBWqvvbrQviYVPFMAhMKrSE 1KWVqZ5EWk74CDMtNfdjoCVRTI42tw0gLX9PFMPIfCxNszbf4LFxP6efzMiuBnRbwzp8 +5+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765826713; x=1766431513; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=Mw6Udw3xyK1jm/MjliE0wzhu/i34l1ZJcAQTPaQhsRI=; b=SI+3XkUWDa9xuJqmp5gHwZ3nerTbZxU3kGvNa4zg6+LZ8xn2cT5K7f4qCrIctncpCo YeFbb3H9Z9YfGfCDI8/SekBB8cofOuJuumQdxHAodDAh/HeO1IBDJKxcqvsVW6xVNq5v ZRuzs/pO4/01+8YzfCbXHRkCUD7B6D2e+vVIKN33hzGszurzR0alt3K0qoAJxH2GtXtb pB9FKCiyuVCPRIRwYsTbM/CpZdoFJk+uKXQibZQ4AynOi4TnP+TWIXk6LhA9+zc6Cn33 bPEIwbwdsGwwzlZu6n8iyod+kXgjABDACAVZwOH/vw3JXgAaQbDp1BrrtEi/Dl7WhFNX 5E2A== X-Forwarded-Encrypted: i=1; AJvYcCVmFeeunBBLNLLm3ZpKMfm6RRQNBS/p3RrHhqh2IlL4zvRek6xleLjdpJZw3xuzMLtOD8U5qz5ofQLW32s=@vger.kernel.org X-Gm-Message-State: AOJu0YwJ1XbHUHfMwvPWiJH41o+TNNBJb+4nEfP8elIarbjgQeYmQ3t3 wY6xLBRZbCUhles4ZNqTEVsw7nV7mP+z8Ye64JxcW7/Np8SxRmeZ2otVSooTAevQUu8raleGLTT z5rmFYJCrfpnykg== X-Google-Smtp-Source: AGHT+IF8cbot5VvfqnTdcWU2OcVUgi1UF8pxXBKRfLH98glNSAmpbF3+jx0uZnw2NfwLVz7aAFOxE9M4KwwQ7A== X-Received: from pjtl21.prod.google.com ([2002:a17:90a:c595:b0:34a:bcb2:43ba]) (user=chengkev job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:1d04:b0:336:b60f:3936 with SMTP id 98e67ed59e1d1-34abd7be51cmr12086930a91.12.1765826713447; Mon, 15 Dec 2025 11:25:13 -0800 (PST) Date: Mon, 15 Dec 2025 19:25:10 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.52.0.239.gd5f0c6e74e-goog Message-ID: <20251215192510.2300816-1-chengkev@google.com> Subject: [PATCH v3] KVM: SVM: Don't allow L1 intercepts for instructions not advertised From: Kevin Cheng To: seanjc@google.com, pbonzini@redhat.com Cc: jmattson@google.com, yosry.ahmed@linux.dev, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kevin Cheng Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If a feature is not advertised in the guest's CPUID, prevent L1 from intercepting the unsupported instructions by clearing the corresponding intercept in KVM's cached vmcb12. When an L2 guest executes an instruction that is not advertised to L1, we expect a #UD exception to be injected by L0. However, the nested svm exit handler first checks if the instruction intercept is set in vmcb12, and if so, synthesizes an exit from L2 to L1 instead of a #UD exception. If a feature is not advertised, the L1 intercept should be ignored. While creating KVM's cached vmcb12, sanitize the intercepts for instructions that are not advertised in the guest CPUID. This effectively ignores the L1 intercept on nested vm exit handling. It also ignores the L1 intercept when computing the intercepts in vmcb02, so if L0 (for some reason) does not intercept the instruction, KVM won't intercept it at all. Signed-off-by: Kevin Cheng Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Reviewed-by: Yosry Ahmed --- v2 -> v3: - Edit commit message v2: https://lore.kernel.org/all/20251215160710.1768474-1-chengkev@google.co= m/ arch/x86/kvm/svm/nested.c | 19 +++++++++++++++++++ arch/x86/kvm/svm/svm.h | 35 +++++++++++++++++++++++++++-------- 2 files changed, 46 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c index c81005b245222..5ffc12a315ec7 100644 --- a/arch/x86/kvm/svm/nested.c +++ b/arch/x86/kvm/svm/nested.c @@ -403,6 +403,19 @@ static bool nested_vmcb_check_controls(struct kvm_vcpu= *vcpu) return __nested_vmcb_check_controls(vcpu, ctl); } +/* + * If a feature is not advertised to L1, clear the corresponding vmcb12 + * intercept. + */ +#define __nested_svm_sanitize_intercept(__vcpu, __control, fname, iname) \ +do { \ + if (!guest_cpu_cap_has(__vcpu, X86_FEATURE_##fname)) \ + vmcb12_clr_intercept(__control, INTERCEPT_##iname); \ +} while (0) + +#define nested_svm_sanitize_intercept(__vcpu, __control, name) \ + __nested_svm_sanitize_intercept(__vcpu, __control, name, name) + static void __nested_copy_vmcb_control_to_cache(struct kvm_vcpu *vcpu, struct vmcb_ctrl_area_cached *to, @@ -413,6 +426,12 @@ void __nested_copy_vmcb_control_to_cache(struct kvm_vc= pu *vcpu, for (i =3D 0; i < MAX_INTERCEPT; i++) to->intercepts[i] =3D from->intercepts[i]; + __nested_svm_sanitize_intercept(vcpu, to, XSAVE, XSETBV); + nested_svm_sanitize_intercept(vcpu, to, INVPCID); + nested_svm_sanitize_intercept(vcpu, to, RDTSCP); + nested_svm_sanitize_intercept(vcpu, to, SKINIT); + nested_svm_sanitize_intercept(vcpu, to, RDPRU); + to->iopm_base_pa =3D from->iopm_base_pa; to->msrpm_base_pa =3D from->msrpm_base_pa; to->tsc_offset =3D from->tsc_offset; diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index 9e151dbdef25d..7a8c92c4de2fb 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -434,28 +434,47 @@ static __always_inline struct vcpu_svm *to_svm(struct= kvm_vcpu *vcpu) */ #define SVM_REGS_LAZY_LOAD_SET (1 << VCPU_EXREG_PDPTR) -static inline void vmcb_set_intercept(struct vmcb_control_area *control, u= 32 bit) +static inline void __vmcb_set_intercept(unsigned long *intercepts, u32 bit) { WARN_ON_ONCE(bit >=3D 32 * MAX_INTERCEPT); - __set_bit(bit, (unsigned long *)&control->intercepts); + __set_bit(bit, intercepts); } -static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u= 32 bit) +static inline void __vmcb_clr_intercept(unsigned long *intercepts, u32 bit) { WARN_ON_ONCE(bit >=3D 32 * MAX_INTERCEPT); - __clear_bit(bit, (unsigned long *)&control->intercepts); + __clear_bit(bit, intercepts); } -static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u3= 2 bit) +static inline bool __vmcb_is_intercept(unsigned long *intercepts, u32 bit) { WARN_ON_ONCE(bit >=3D 32 * MAX_INTERCEPT); - return test_bit(bit, (unsigned long *)&control->intercepts); + return test_bit(bit, intercepts); +} + +static inline void vmcb_set_intercept(struct vmcb_control_area *control, u= 32 bit) +{ + __vmcb_set_intercept((unsigned long *)&control->intercepts, bit); +} + +static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u= 32 bit) +{ + __vmcb_clr_intercept((unsigned long *)&control->intercepts, bit); +} + +static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u3= 2 bit) +{ + return __vmcb_is_intercept((unsigned long *)&control->intercepts, bit); +} + +static inline void vmcb12_clr_intercept(struct vmcb_ctrl_area_cached *cont= rol, u32 bit) +{ + __vmcb_clr_intercept((unsigned long *)&control->intercepts, bit); } static inline bool vmcb12_is_intercept(struct vmcb_ctrl_area_cached *contr= ol, u32 bit) { - WARN_ON_ONCE(bit >=3D 32 * MAX_INTERCEPT); - return test_bit(bit, (unsigned long *)&control->intercepts); + return __vmcb_is_intercept((unsigned long *)&control->intercepts, bit); } static inline void set_exception_intercept(struct vcpu_svm *svm, u32 bit) -- 2.52.0.239.gd5f0c6e74e-goog