From nobody Mon Dec 15 23:21:20 2025 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AD9A32A3FB; Mon, 15 Dec 2025 08:43:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765788193; cv=none; b=EIpXKoiPV6Hxta2k6bQqo1GN00+6IMjyc7dytYFgq4Ci053Mxh9/b6r+u88cAPLos4mbAdgL5miCSeNVd/JkoxvyBZrm12KdK+8i7pqIH5n2mbD7GlN2G2Hig5TW07W6CipWIm8PFvNYMHqOffirUgeC0OuTawEV2j9YUzzaP5I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765788193; c=relaxed/simple; bh=gNNn0SRmoio4wuH8+Sxd8xlRMKwBWC18TaGdgZZgfKk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jm+0M3LL6L76keQK7RcoAOmMtujNxWdMNK7tKXmGRxjYQdPSsLr24UNqA27i+Ikzs1EhWYc0rUYXHCUI1SkJrkxvhbStLL6V3Ar5D4dCypMWqQVI24Mc6iKewjwO04Xe7F84WbAKTRp7gGiIuwNOFdKwZ/hZ+E/8v0+2mv9XnOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BBFFA20165A; Mon, 15 Dec 2025 09:43:04 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 86BE320132D; Mon, 15 Dec 2025 09:43:04 +0100 (CET) Received: from lsvm11u0000554.swis.ap-northeast-2.aws.nxp.com (lsvm11u0000554.swis.ap-northeast-2.aws.nxp.com [10.52.9.11]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 2B1E81800096; Mon, 15 Dec 2025 16:43:02 +0800 (+08) From: Yanan Yang Date: Mon, 15 Dec 2025 17:42:51 +0900 Subject: [PATCH v2 1/2] dt-bindings: arm: fsl: Add FRDM-IMX91S board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251215-imx91s-frdm-v2-1-87996bdaa59c@nxp.com> References: <20251215-imx91s-frdm-v2-0-87996bdaa59c@nxp.com> In-Reply-To: <20251215-imx91s-frdm-v2-0-87996bdaa59c@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, yanan.yang@nxp.com, qijian.guo@nxp.com, justin.jiang@nxp.com X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1765788179; l=1289; i=yanan.yang@nxp.com; s=20251205; h=from:subject:message-id; bh=gNNn0SRmoio4wuH8+Sxd8xlRMKwBWC18TaGdgZZgfKk=; b=KU+ZksGO+GHiB2rgQocr+jTgT5csc5yw0NfF6EUERYu2oltL6V5yOnSJ2MdXSkUZkZUUJQNbA y4FE79oOTpoDYUrfl2K4fTYyeKrPELp/+mySPfvlZKhaCodnewtGzcy X-Developer-Key: i=yanan.yang@nxp.com; a=ed25519; pk=d4hHTp5SW/PyyxexLEo/3c2RAaQDwym0zuYlifH95PI= X-Virus-Scanned: ClamAV using ClamSMTP Add DT compatible string for NXP FRDM-IMX91S board The FRDM-IMX91S is a low-cost, compact development board based on the i.MX91 applications processor. It is a cost-optimized variant of the FRDM-IMX91 board, with notable hardware differences requiring a separate DTS: - 512MB LPDDR4 (FRDM-IMX91 uses 1GB) - 256MB FlexSPI-NAND (FRDM-IMX91 uses 8GB eMMC) - Single GbE port (FRDM-IMX91 has dual GbE) - PMIC PF9453 (FRDM-IMX91 uses PCA9451A) Signed-off-by: Yanan Yang Acked-by: Krzysztof Kozlowski --- Changes in v2: - Correct author name: removed extra period in "Yanan.Yang" - Refined commit message to clarify board differences --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 68a2d5fecc43..82f28be401b8 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1412,6 +1412,7 @@ properties: items: - enum: - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board + - fsl,imx91-11x11-frdm-s # FRDM-IMX91S Board - const: fsl,imx91 =20 - description: i.MX93 based Boards --=20 2.43.0 From nobody Mon Dec 15 23:21:20 2025 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57C0832AAD8; Mon, 15 Dec 2025 08:43:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765788195; cv=none; b=NL1Zq26/xp2OW7EdSZuaeoIG1yVyjq5/Gy+YXp6waUjoLktDp6CYlbWH3XqaHgHSkUBVT3F5yYkrcDBN+TmBfl+JNCFmZP4IkN7sbfwok5C20Qvgb2cJSlB7mfHKQ3dyTAYqhUfT8oHzXnk/T3C+e0gX2BBtFSQy2TZ0oFpDI6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765788195; c=relaxed/simple; bh=TlyR5wb/Wcu0gGSgktUGpDSUKGGWa5xCmNpk66olbUM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k47AsJ2eVqm5QpGVfGKiYzXyJ0ePPgdrHmL1/EnpdOJJa9iJyLWNXshc4ZPrmwusvD5A9Wx1LCkdIyjCsoIIszlzH+ArNM7Ss9vDQ6BwsW3/8rvIaGCZ3EyHup8veUcZ74yW/LqSpJDJEgVZhloBzIO57jiqLk41gSMZsR6IEx8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 957B9201662; Mon, 15 Dec 2025 09:43:06 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 371F3201658; Mon, 15 Dec 2025 09:43:06 +0100 (CET) Received: from lsvm11u0000554.swis.ap-northeast-2.aws.nxp.com (lsvm11u0000554.swis.ap-northeast-2.aws.nxp.com [10.52.9.11]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 2F4F018000AF; Mon, 15 Dec 2025 16:43:04 +0800 (+08) From: Yanan Yang Date: Mon, 15 Dec 2025 17:42:52 +0900 Subject: [PATCH v2 2/2] arm64: dts: freescale: add NXP FRDM-IMX91S board support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251215-imx91s-frdm-v2-2-87996bdaa59c@nxp.com> References: <20251215-imx91s-frdm-v2-0-87996bdaa59c@nxp.com> In-Reply-To: <20251215-imx91s-frdm-v2-0-87996bdaa59c@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, yanan.yang@nxp.com, qijian.guo@nxp.com, justin.jiang@nxp.com, Lei Xu , Xiaofeng Wei X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1765788179; l=22218; i=yanan.yang@nxp.com; s=20251205; h=from:subject:message-id; bh=TlyR5wb/Wcu0gGSgktUGpDSUKGGWa5xCmNpk66olbUM=; b=ig8snwXKwez29jC7YiwcBZzSrMN3LZ4rKL+pag89z+vc0pw+BfU3bimsDlgFEivUs78EG8OkP Ygmt5qNatVaDA1ZqD6vJ7QCRnqU0FnMMMTVH5Xm1CffLMSnf+ugbfTf X-Developer-Key: i=yanan.yang@nxp.com; a=ed25519; pk=d4hHTp5SW/PyyxexLEo/3c2RAaQDwym0zuYlifH95PI= X-Virus-Scanned: ClamAV using ClamSMTP Add DeviceTree support for the NXP FRDM-IMX91S development board based on the i.MX91 SoC. FRDM-IMX91S is a cost-optimized variant of FRDM-IMX91 and differs in memory, storage, Ethernet, and PMIC configuration: - 512MB LPDDR4 (FRDM-IMX91 uses 1GB) - 256MB FlexSPI-NAND (FRDM-IMX91 uses 8GB eMMC) - Single GbE port (FRDM-IMX91 has dual GbE) - PMIC PF9453 (FRDM-IMX91 uses PCA9451A) This DT enables: - ADC1 - UART1 and UART5 - I2C bus and children nodes - USB and related nodes - uSDHC1 and uSDHC2 - FlexSPI NAND flash - Watchdog3 - Ethernet (eqos) - FlexCAN - MQS Link: https://www.nxp.com/design/design-center/development-boards-and-desig= ns/FRDM-IMX91S (FRDM-IMX91S board page) Link: https://www.nxp.com/design/design-center/development-boards-and-desig= ns/FRDM-IMX91 (FRDM-IMX91 board page) Co-developed-by: Lei Xu Signed-off-by: Lei Xu Co-developed-by: Xiaofeng Wei Signed-off-by: Xiaofeng Wei Signed-off-by: Yanan Yang --- Changes in v2: - Correct author name: removed extra period in "Yanan.Yang" - Removed aliases pointing to disabled nodes from DTS - Add "rtc0 =3D &pcf2131;" in aliases to make external RTC the primary devi= ce - Fix DT node name: change "usdhc1_pwrseq: usdhc1_pwrseq" to "usdhc1_pwrseq: usdhc1-pwrseq" - Renamed LED node from 'status' to 'led-0' to comply with gpio-leds binding - Replace regulator-based transceiver (reg_can_stby) with CAN PHY (nxp,tja1= 051) - Replaced 'xceiver-supply' property with 'phys' in flexcan1 node - Adjusted alignment in fsl,pins property: used spaces between pin names an= d values for proper DTS style. --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx91-11x11-frdm-s.dts | 677 +++++++++++++++++= ++++ 2 files changed, 678 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index f30d3fd724d0..927bf76a05f3 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -368,6 +368,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8qxp-tqma8xqps-mb-smarc-= 2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-9x9-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx91-11x11-evk.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx91-11x11-frdm-s.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx91-phyboard-segin.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx91-tqma9131-mba91xxca.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-9x9-qsb.dtb diff --git a/arch/arm64/boot/dts/freescale/imx91-11x11-frdm-s.dts b/arch/ar= m64/boot/dts/freescale/imx91-11x11-frdm-s.dts new file mode 100644 index 000000000000..9ab29d1b979e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx91-11x11-frdm-s.dts @@ -0,0 +1,677 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2025 NXP + */ + +/dts-v1/; + +#include +#include "imx91.dtsi" + +/ { + compatible =3D "fsl,imx91-11x11-frdm-s", "fsl,imx91"; + model =3D "NXP FRDM-IMX91S board"; + + aliases { + ethernet0 =3D &eqos; + gpio0 =3D &gpio1; + gpio1 =3D &gpio2; + gpio2 =3D &gpio3; + i2c0 =3D &lpi2c1; + i2c1 =3D &lpi2c2; + mmc0 =3D &usdhc1; + mmc1 =3D &usdhc2; + rtc0 =3D &pcf2131; + rtc1 =3D &bbnsm_rtc; + serial0 =3D &lpuart1; + serial4 =3D &lpuart5; + }; + + chosen { + stdout-path =3D &lpuart1; + }; + + flexcan1_phy: can-phy { + compatible =3D "nxp,tja1051"; + #phy-cells =3D <0>; + max-bitrate =3D <5000000>; + silent-gpios =3D <&gpio1 10 GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&pinctrl_gpio_key>; + pinctrl-names =3D "default"; + + button { + interrupt-parent =3D <&gpio3>; + interrupts =3D <26 IRQ_TYPE_EDGE_FALLING>; + gpios =3D <&gpio3 26 GPIO_PULL_UP>; + label =3D "User Button"; + linux,code =3D ; + }; + }; + + gpio-leds { + compatible =3D "gpio-leds"; + + led-0 { + default-state =3D "on"; + gpios =3D <&pcal6524 7 GPIO_ACTIVE_LOW>; + label =3D "green:status"; + }; + }; + + reg_vref_1v8: regulator-adc-vref { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "vref_1v8"; + }; + + reg_usdhc1_vmmc: regulator-usdhc1 { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "WLAN_EN"; + startup-delay-us =3D <20000>; + gpio =3D <&pcal6524 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible =3D "regulator-fixed"; + off-on-delay-us =3D <12000>; + pinctrl-0 =3D <&pinctrl_reg_usdhc2_vmmc>; + pinctrl-names =3D "default"; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "VSD_3V3"; + gpio =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_vbus: regulator-vbus { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <5000000>; + regulator-min-microvolt =3D <5000000>; + regulator-name =3D "USB_VBUS"; + gpio =3D <&pcal6524 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + linux,cma { + compatible =3D "shared-dma-pool"; + alloc-ranges =3D <0 0x80000000 0 0x20000000>; + reusable; + size =3D <0 0x2000000>; + linux,cma-default; + }; + }; + + sound-mqs { + compatible =3D "fsl,imx6sx-sdb-mqs", "fsl,imx-audio-mqs"; + audio-codec =3D <&mqs1>; + audio-cpu =3D <&sai1>; + model =3D "mqs-audio"; + }; + + usdhc1_pwrseq: usdhc1-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + reset-gpios =3D <&pcal6524 18 GPIO_ACTIVE_LOW>; + }; +}; + +&adc1 { + vref-supply =3D <®_vref_1v8>; + status =3D "okay"; +}; + +&eqos { + phy-handle =3D <ðphy1>; + phy-mode =3D "rgmii-id"; + pinctrl-0 =3D <&pinctrl_eqos>; + pinctrl-1 =3D <&pinctrl_eqos_sleep>; + pinctrl-names =3D "default", "sleep"; + status =3D "okay"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <5000000>; + + ethphy1: ethernet-phy@4 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <4>; + }; + }; +}; + +&flexcan1 { + phys =3D <&flexcan1_phy>; + pinctrl-0 =3D <&pinctrl_flexcan1>; + pinctrl-1 =3D <&pinctrl_flexcan1_sleep>; + pinctrl-names =3D "default", "sleep"; + status =3D "okay"; +}; + +&flexspi1 { + pinctrl-0 =3D <&pinctrl_flexspi1>; + pinctrl-names =3D "default"; + status =3D "okay"; + + flash@0 { + compatible =3D "spi-nand"; + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + spi-max-frequency =3D <104000000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + partition@0 { + reg =3D <0x000000 0x800000>; + label =3D "bootloader"; + }; + + partition@1 { + reg =3D <0x800000 0x800000>; + label =3D "env"; + }; + + partition@2 { + reg =3D <0x1000000 0x2800000>; + label =3D "kernel"; + }; + + partition@3 { + reg =3D <0x3800000 0x20000>; + label =3D "dtb"; + }; + + partition@4 { + reg =3D <0x3820000 0xc7e0000>; + label =3D "rootfs"; + linux,rootfs; + }; + }; + }; +}; + +&iomuxc { + pinctrl_eqos: eqosgrp { + fsl,pins =3D < + MX91_PAD_ENET1_MDC__ENET1_MDC 0x57e + MX91_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e + MX91_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e + MX91_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e + MX91_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e + MX91_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e + MX91_PAD_ENET1_RXC__ENET_QOS_RGMII_RXC 0x5fe + MX91_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e + MX91_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e + MX91_PAD_ENET1_TD1__ENET1_RGMII_TD1 0x57e + MX91_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e + MX91_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e + MX91_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe + MX91_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e + >; + }; + + pinctrl_eqos_sleep: eqossleepgrp { + fsl,pins =3D < + MX91_PAD_ENET1_MDC__GPIO4_IO0 0x31e + MX91_PAD_ENET1_MDIO__GPIO4_IO1 0x31e + MX91_PAD_ENET1_RD0__GPIO4_IO10 0x31e + MX91_PAD_ENET1_RD1__GPIO4_IO11 0x31e + MX91_PAD_ENET1_RD2__GPIO4_IO12 0x31e + MX91_PAD_ENET1_RD3__GPIO4_IO13 0x31e + MX91_PAD_ENET1_RXC__GPIO4_IO9 0x31e + MX91_PAD_ENET1_RX_CTL__GPIO4_IO8 0x31e + MX91_PAD_ENET1_TD0__GPIO4_IO5 0x31e + MX91_PAD_ENET1_TD1__GPIO4_IO4 0x31e + MX91_PAD_ENET1_TD2__GPIO4_IO3 0x31e + MX91_PAD_ENET1_TD3__GPIO4_IO2 0x31e + MX91_PAD_ENET1_TXC__GPIO4_IO7 0x31e + MX91_PAD_ENET1_TX_CTL__GPIO4_IO6 0x31e + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins =3D < + MX91_PAD_GPIO_IO28__CAN1_TX 0x139e + MX91_PAD_GPIO_IO29__CAN1_RX 0x139e + MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e + >; + }; + + pinctrl_flexcan1_sleep: flexcan1sleepgrp { + fsl,pins =3D < + MX91_PAD_GPIO_IO28__GPIO2_IO28 0x31e + MX91_PAD_GPIO_IO29__GPIO2_IO29 0x31e + MX91_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e + >; + }; + + pinctrl_flexspi1: flexspi1grp { + fsl,pins =3D < + MX91_PAD_SD3_CLK__FLEXSPI1_A_SCLK 0x3fe + MX91_PAD_SD3_CMD__FLEXSPI1_A_SS0_B 0x3fe + MX91_PAD_SD3_DATA0__FLEXSPI1_A_DATA0 0x3fe + MX91_PAD_SD3_DATA1__FLEXSPI1_A_DATA1 0x3fe + MX91_PAD_SD3_DATA2__FLEXSPI1_A_DATA2 0x3fe + MX91_PAD_SD3_DATA3__FLEXSPI1_A_DATA3 0x3fe + >; + }; + + pinctrl_gpio_key: gpiokeysgrp { + fsl,pins =3D < + MX91_PAD_CCM_CLKO1__GPIO3_IO26 0x31e + >; + }; + + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins =3D < + MX91_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e + MX91_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e + >; + }; + + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins =3D < + MX91_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e + MX91_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e + >; + }; + + pinctrl_mqs1: mqs1grp { + fsl,pins =3D < + MX91_PAD_PDM_CLK__MQS1_LEFT 0x31e + MX91_PAD_PDM_BIT_STREAM0__MQS1_RIGHT 0x31e + >; + }; + + pinctrl_pcal6524: pcal6524grp { + fsl,pins =3D < + MX91_PAD_CCM_CLKO2__GPIO3_IO27 0x31e + MX91_PAD_SD1_DATA5__GPIO3_IO15 0x31e + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { + fsl,pins =3D < + MX91_PAD_SD2_RESET_B__GPIO3_IO7 0x31e + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins =3D < + MX91_PAD_UART1_RXD__LPUART1_RX 0x31e + MX91_PAD_UART1_TXD__LPUART1_TX 0x31e + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins =3D < + MX91_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e + MX91_PAD_DAP_TDI__LPUART5_RX 0x31e + MX91_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e + MX91_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D < + MX91_PAD_SD1_CLK__USDHC1_CLK 0x1582 + MX91_PAD_SD1_CMD__USDHC1_CMD 0x1382 + MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x1382 + MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x1382 + MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x1382 + MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x1382 + MX91_PAD_SD1_DATA4__GPIO3_IO14 0x31e + MX91_PAD_SD1_STROBE__GPIO3_IO18 0x31e + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins =3D < + MX91_PAD_SD1_CLK__USDHC1_CLK 0x158e + MX91_PAD_SD1_CMD__USDHC1_CMD 0x138e + MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x138e + MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x138e + MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x138e + MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x138e + MX91_PAD_SD1_DATA4__GPIO3_IO14 0x31e + MX91_PAD_SD1_STROBE__GPIO3_IO18 0x31e + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins =3D < + MX91_PAD_SD1_CLK__USDHC1_CLK 0x15fe + MX91_PAD_SD1_CMD__USDHC1_CMD 0x13fe + MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe + MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe + MX91_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe + MX91_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe + MX91_PAD_SD1_DATA4__GPIO3_IO14 0x31e + MX91_PAD_SD1_STROBE__GPIO3_IO18 0x31e + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins =3D < + MX91_PAD_SD2_CD_B__GPIO3_IO0 0x31e + >; + }; + + pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp { + fsl,pins =3D < + MX91_PAD_SD2_CD_B__GPIO3_IO0 0x51e + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins =3D < + MX91_PAD_SD2_CLK__USDHC2_CLK 0x1582 + MX91_PAD_SD2_CMD__USDHC2_CMD 0x1382 + MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x1382 + MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x1382 + MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x1382 + MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x1382 + MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_sleep: usdhc2sleepgrp { + fsl,pins =3D < + MX91_PAD_SD2_CLK__GPIO3_IO1 0x51e + MX91_PAD_SD2_CMD__GPIO3_IO2 0x51e + MX91_PAD_SD2_DATA0__GPIO3_IO3 0x51e + MX91_PAD_SD2_DATA1__GPIO3_IO4 0x51e + MX91_PAD_SD2_DATA2__GPIO3_IO5 0x51e + MX91_PAD_SD2_DATA3__GPIO3_IO6 0x51e + MX91_PAD_SD2_VSELECT__GPIO3_IO19 0x51e + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins =3D < + MX91_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX91_PAD_SD2_CMD__USDHC2_CMD 0x138e + MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x138e + MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e + MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x138e + MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x138e + MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins =3D < + MX91_PAD_SD2_CLK__USDHC2_CLK 0x15fe + MX91_PAD_SD2_CMD__USDHC2_CMD 0x13fe + MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe + MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe + MX91_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe + MX91_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe + MX91_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins =3D < + MX91_PAD_WDOG_ANY__WDOG1_WDOG_ANY 0x31e + >; + }; +}; + +&lpi2c1 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_lpi2c1>; + pinctrl-names =3D "default"; + status =3D "okay"; + + pcf2131: rtc@53 { + compatible =3D "nxp,pcf2131"; + reg =3D <0x53>; + interrupt-parent =3D <&pcal6524>; + interrupts =3D <1 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&lpi2c2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_lpi2c2>; + pinctrl-names =3D "default"; + status =3D "okay"; + + pcal6524: gpio@22 { + compatible =3D "nxp,pcal6524"; + reg =3D <0x22>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&gpio3>; + interrupts =3D <27 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells =3D <2>; + gpio-controller; + pinctrl-0 =3D <&pinctrl_pcal6524>; + pinctrl-names =3D "default"; + reset-gpios =3D <&gpio3 15 GPIO_ACTIVE_LOW>; + }; + + pmic@32 { + compatible =3D "nxp,pf9453"; + reg =3D <0x32>; + interrupt-parent =3D <&pcal6524>; + interrupts =3D <10 IRQ_TYPE_EDGE_FALLING>; + + regulators { + buck1: BUCK1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3775000>; + regulator-min-microvolt =3D <600000>; + regulator-name =3D "BUCK1"; + }; + + buck2: BUCK2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <2187500>; + regulator-min-microvolt =3D <600000>; + regulator-name =3D "BUCK2"; + regulator-ramp-delay =3D <12500>; + }; + + buck3: BUCK3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3775000>; + regulator-min-microvolt =3D <600000>; + regulator-name =3D "BUCK3"; + }; + + buck4: BUCK4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3775000>; + regulator-min-microvolt =3D <600000>; + regulator-name =3D "BUCK4"; + }; + + ldo1: LDO1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <800000>; + regulator-name =3D "LDO1"; + }; + + ldo2: LDO2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1950000>; + regulator-min-microvolt =3D <500000>; + regulator-name =3D "LDO2"; + }; + + ldo_snvs: LDO-SNVS { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3400000>; + regulator-min-microvolt =3D <1200000>; + regulator-name =3D "LDO-SNVS"; + }; + }; + }; + + ptn5110: tcpc@52 { + compatible =3D "nxp,ptn5110", "tcpci"; + reg =3D <0x52>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <27 IRQ_TYPE_LEVEL_LOW>; + + typec1_con: connector { + compatible =3D "usb-c-connector"; + data-role =3D "dual"; + label =3D "USB-C"; + op-sink-microwatt =3D <15000000>; + power-role =3D "dual"; + self-powered; + sink-pdos =3D ; + source-pdos =3D ; + try-power-role =3D "sink"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + typec1_dr_sw: endpoint { + remote-endpoint =3D <&usb1_drd_sw>; + }; + }; + }; + }; + }; +}; + +&lpuart1 { + pinctrl-0 =3D <&pinctrl_uart1>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&lpuart5 { + pinctrl-0 =3D <&pinctrl_uart5>; + pinctrl-names =3D "default"; + status =3D "okay"; + + bluetooth { + compatible =3D "nxp,88w8987-bt"; + }; +}; + +&media_blk_ctrl { + status =3D "okay"; +}; + +&mqs1 { + clocks =3D <&clk IMX93_CLK_MQS1_GATE>; + clock-names =3D "mclk"; + pinctrl-0 =3D <&pinctrl_mqs1>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&sai1 { + clocks =3D <&clk IMX93_CLK_SAI1_IPG>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_DUMMY>, <&clk IMX93_CLK_AUDIO_PLL>; + clock-names =3D "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k"; + assigned-clocks =3D <&clk IMX93_CLK_SAI1>; + assigned-clock-parents =3D <&clk IMX93_CLK_AUDIO_PLL>; + assigned-clock-rates =3D <24576000>; + #sound-dai-cells =3D <0>; + fsl,sai-mclk-direction-output; + status =3D "okay"; +}; + +&usbotg1 { + adp-disable; + disable-over-current; + dr_mode =3D "otg"; + hnp-disable; + srp-disable; + usb-role-switch; + samsung,picophy-dc-vol-level-adjust =3D <7>; + samsung,picophy-pre-emp-curr-control =3D <3>; + status =3D "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint =3D <&typec1_dr_sw>; + }; + }; +}; + +&usbotg2 { + disable-over-current; + dr_mode =3D "host"; + vbus-supply =3D <®_usb_vbus>; + samsung,picophy-dc-vol-level-adjust =3D <7>; + samsung,picophy-pre-emp-curr-control =3D <3>; + status =3D "okay"; +}; + +&usdhc1 { + bus-width =3D <8>; + keep-power-in-suspend; + mmc-pwrseq =3D <&usdhc1_pwrseq>; + non-removable; + pinctrl-0 =3D <&pinctrl_usdhc1>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + vmmc-supply =3D <®_usdhc1_vmmc>; + wakeup-source; + status =3D "okay"; +}; + +&usdhc2 { + bus-width =3D <4>; + cd-gpios =3D <&gpio3 0 GPIO_ACTIVE_LOW>; + no-mmc; + no-sdio; + pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + vmmc-supply =3D <®_usdhc2_vmmc>; + status =3D "okay"; +}; + +&wdog3 { + pinctrl-0 =3D <&pinctrl_wdog>; + pinctrl-names =3D "default"; + fsl,ext-reset-output; + status =3D "okay"; +}; --=20 2.43.0