From nobody Tue Dec 16 08:52:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 364E02F2612; Mon, 15 Dec 2025 12:42:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765802546; cv=none; b=YZwrc6KsRfWMYk/r21ObwqtcBm2KVomhkue9ENLQehUV2KMGsk5+Np+wR0h2RjWfzjQupyuiyNt0A92cKz9psttfr+HCxEZ9GWshzp61U1x3gNNmIXH4zlheMziH+4caif1PYM2PVVCr5QHd+1nl3BPfPE+qDDw9MLnw/zdMKik= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765802546; c=relaxed/simple; bh=SswdeNJuwhwRqkWyCwIFOvgeJ5Df5E9p2mXKGfdy/x0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UiSEZsm78/2sU6fpKQB0BnLORXYu1UvcEgeLijZdpAUVHrIMaIjQ4PtQdZRfpaihQTQvqyR1ChqFamhc4Aj+6MhA6rm8GIpReKxLWEEg8uY87JQEvjngr6pu9U5wtVkjR3l0iKTEkvaqzxLFhbnGgFHcq4GVNgMQcrW2ZBZINUg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=F9Rrx4eA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="F9Rrx4eA" Received: by smtp.kernel.org (Postfix) with ESMTPS id BB685C2BC9E; Mon, 15 Dec 2025 12:42:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1765802545; bh=SswdeNJuwhwRqkWyCwIFOvgeJ5Df5E9p2mXKGfdy/x0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=F9Rrx4eAC4zZjSRGkCVletqjHLQASXTVJjOse6Fe8QqXHfm6qzZeCpl4CsWT9ZHG8 oIU0keDlQ7N1yGwxpaG+Z6DRM27z734QKyAzBUyeURLFWcWBtjh1wV3hB/j0O2bvQN 0Yh1dN/pSSEqhBcxaVZTpVy1knav4lWDqVvg8SiTeQQtkRHk6fmPOdeMIyL4gBVS81 pz5a9S4pLiCfyti4nH+fLMwVZwnRSm63a/jUnZeSzHXxsl09yANxZkqUGwMF+G++ii 2Sf+J+22GvJW4b0jlevJed3HNQPZDRlfElfbA4A0lw6zTOp2HF7hJagpUWlBTxd9nK pEXVsuB0HND5Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B51D0D5B172; Mon, 15 Dec 2025 12:42:25 +0000 (UTC) From: Xiangxu Yin via B4 Relay Date: Mon, 15 Dec 2025 20:42:03 +0800 Subject: [PATCH v8 07/12] phy: qcom: qmp-usbc: Move USB-only init to usb_power_on Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251215-add-displayport-support-for-qcs615-platform-v8-7-cbc72c88a44e@oss.qualcomm.com> References: <20251215-add-displayport-support-for-qcs615-platform-v8-0-cbc72c88a44e@oss.qualcomm.com> In-Reply-To: <20251215-add-displayport-support-for-qcs615-platform-v8-0-cbc72c88a44e@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, li.liu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Xiangxu Yin X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1765802542; l=2368; i=xiangxu.yin@oss.qualcomm.com; s=20241125; h=from:subject:message-id; bh=EXEfXs3Ivmqa5GeuWXsnLZUstEPdHV7WBjmZxvoHteo=; b=XELmoCp6GC+Uc9AFX3XoXuwoILTOE/MU7aTZEIMJPPBcJPkTpMiQBj/9RGpZ+2IKGeLJkAzOc Js8E2QzBdnhA8OfoKFSEwTtEd0/F4ZDz7SVjAd9qLDhQtLHzmslYy+I X-Developer-Key: i=xiangxu.yin@oss.qualcomm.com; a=ed25519; pk=F1TwipJzpywfbt3n/RPi4l/A4AVF+QC89XzCHgZYaOc= X-Endpoint-Received: by B4 Relay for xiangxu.yin@oss.qualcomm.com/20241125 with auth_id=542 X-Original-From: Xiangxu Yin Reply-To: xiangxu.yin@oss.qualcomm.com From: Xiangxu Yin The current implementation programs USB-specific registers in qmp_usbc_com_init(), which is shared by both USB and DP modes. This causes unnecessary configuration when the PHY is used for DP. Move USB-only register setup from com_init to qmp_usbc_usb_power_on, so it runs only for USB mode. Reviewed-by: Dmitry Baryshkov Signed-off-by: Xiangxu Yin --- drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcom= m/phy-qcom-qmp-usbc.c index a6431e6d5586..c8e0f9574ba6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c @@ -30,6 +30,8 @@ #include "phy-qcom-qmp-pcs-misc-v3.h" =20 #define PHY_INIT_COMPLETE_TIMEOUT 10000 +#define SW_PORTSELECT_VAL BIT(0) +#define SW_PORTSELECT_MUX BIT(1) =20 /* set of registers with offsets different per-PHY */ enum qphy_reg_layout { @@ -531,8 +533,6 @@ static int qmp_usbc_com_init(struct phy *phy) { struct qmp_usbc *qmp =3D phy_get_drvdata(phy); const struct qmp_phy_cfg *cfg =3D qmp->cfg; - void __iomem *pcs =3D qmp->pcs; - u32 val =3D 0; int ret; =20 ret =3D regulator_bulk_enable(cfg->num_vregs, qmp->vregs); @@ -557,16 +557,6 @@ static int qmp_usbc_com_init(struct phy *phy) if (ret) goto err_assert_reset; =20 - qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); - -#define SW_PORTSELECT_VAL BIT(0) -#define SW_PORTSELECT_MUX BIT(1) - /* Use software based port select and switch on typec orientation */ - val =3D SW_PORTSELECT_MUX; - if (qmp->orientation =3D=3D TYPEC_ORIENTATION_REVERSE) - val |=3D SW_PORTSELECT_VAL; - writel(val, qmp->pcs_misc); - return 0; =20 err_assert_reset: @@ -599,6 +589,14 @@ static int qmp_usbc_usb_power_on(struct phy *phy) unsigned int val; int ret; =20 + qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], SW_PWRDN); + + /* Use software based port select and switch on typec orientation */ + val =3D SW_PORTSELECT_MUX; + if (qmp->orientation =3D=3D TYPEC_ORIENTATION_REVERSE) + val |=3D SW_PORTSELECT_VAL; + writel(val, qmp->pcs_misc); + qmp_configure(qmp->dev, qmp->serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); =20 --=20 2.34.1