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Stavinskii" , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev, Yixun Lan Subject: [PATCH v2 2/3] dmaengine: dw-axi-dmac: Add support for CV1800B DMA Date: Mon, 15 Dec 2025 06:45:59 +0800 Message-ID: <20251214224601.598358-3-inochiama@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214224601.598358-1-inochiama@gmail.com> References: <20251214224601.598358-1-inochiama@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As the DMA controller on Sophgo CV1800 series SoC only has 8 channels, the SoC provides a dma multiplexer to reuse the DMA channel. However, the dma multiplexer also controls the DMA interrupt multiplexer, which means that the dma multiplexer needs to know the channel number. Allow the driver to use DMA phandle args as the channel number, so the DMA multiplexer can route the DMA interrupt correctly. Signed-off-by: Inochi Amaoto --- .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 26 ++++++++++++++++--- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 + 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/d= w-axi-dmac/dw-axi-dmac-platform.c index b23536645ff7..829aa6c05b5c 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -7,6 +7,7 @@ * Author: Eugeniy Paltsev */ =20 +#include "linux/stddef.h" #include #include #include @@ -50,6 +51,7 @@ #define AXI_DMA_FLAG_HAS_APB_REGS BIT(0) #define AXI_DMA_FLAG_HAS_RESETS BIT(1) #define AXI_DMA_FLAG_USE_CFG2 BIT(2) +#define AXI_DMA_FLAG_HANDSHAKE_AS_CHAN BIT(3) =20 static inline void axi_dma_iowrite32(struct axi_dma_chip *chip, u32 reg, u32 val) @@ -1360,16 +1362,27 @@ static int __maybe_unused axi_dma_runtime_resume(st= ruct device *dev) static struct dma_chan *dw_axi_dma_of_xlate(struct of_phandle_args *dma_sp= ec, struct of_dma *ofdma) { + unsigned int handshake =3D dma_spec->args[0]; struct dw_axi_dma *dw =3D ofdma->of_dma_data; - struct axi_dma_chan *chan; + struct axi_dma_chan *chan =3D NULL; struct dma_chan *dchan; =20 - dchan =3D dma_get_any_slave_channel(&dw->dma); + if (dw->hdata->use_handshake_as_channel_number) { + if (handshake >=3D dw->hdata->nr_channels) + return NULL; + + chan =3D &dw->chan[handshake]; + dchan =3D dma_get_slave_channel(&chan->vc.chan); + } else { + dchan =3D dma_get_any_slave_channel(&dw->dma); + } + if (!dchan) return NULL; =20 - chan =3D dchan_to_axi_dma_chan(dchan); - chan->hw_handshake_num =3D dma_spec->args[0]; + if (!chan) + chan =3D dchan_to_axi_dma_chan(dchan); + chan->hw_handshake_num =3D handshake; return dchan; } =20 @@ -1508,6 +1521,8 @@ static int dw_probe(struct platform_device *pdev) return ret; } =20 + chip->dw->hdata->use_handshake_as_channel_number =3D !!(flags & AXI_DMA_F= LAG_HANDSHAKE_AS_CHAN); + chip->dw->hdata->use_cfg2 =3D !!(flags & AXI_DMA_FLAG_USE_CFG2); =20 chip->core_clk =3D devm_clk_get(chip->dev, "core-clk"); @@ -1663,6 +1678,9 @@ static const struct of_device_id dw_dma_of_id_table[]= =3D { }, { .compatible =3D "intel,kmb-axi-dma", .data =3D (void *)AXI_DMA_FLAG_HAS_APB_REGS, + }, { + .compatible =3D "sophgo,cv1800b-axi-dma", + .data =3D (void *)AXI_DMA_FLAG_HANDSHAKE_AS_CHAN, }, { .compatible =3D "starfive,jh7110-axi-dma", .data =3D (void *)(AXI_DMA_FLAG_HAS_RESETS | AXI_DMA_FLAG_USE_CFG2), diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dma= c/dw-axi-dmac.h index b842e6a8d90d..67cc199e24d1 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -34,6 +34,7 @@ struct dw_axi_dma_hcfg { bool reg_map_8_channels; bool restrict_axi_burst_len; bool use_cfg2; + bool use_handshake_as_channel_number; }; =20 struct axi_dma_chan { --=20 2.52.0