From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0BA02DAFBA for ; Sun, 14 Dec 2025 16:35:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730150; cv=none; b=tQkzMbc1bwS8Q3Ud21lfxItHyPZYc9/LUFUCQrd85M5thxlzPics647OJltxmYJ1YexH164u+vEf+A4uAqa4PcKrkGOE0exbgG09vi/8MrO3Mgoh0a9jh8ZmUuZaABhpKYBUsLINzl3DSbcxuq3uePrZYOu5h18BI1Ct5clxQIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730150; c=relaxed/simple; bh=TBdUIziZzYn57JBzVZKpq91vrwab2KkoD2+h2KvN5+A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cPkI2k+/nQPuZy8pN2Q+w+r9/zEA1zA9SYdfO1uQJ03kXCW/4d/wxl7eJ2MiEEsWaU5ZLOTpSbPYzYKbZCfyqENOHfeEHasMxfG8+ve/51CmZWKMN+SnA6fwjsFlMsate/+LEAnvPyT06qC4Ims/lkOxdUVL1adEbBKQLHtBpsk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=IBn5j95L; arc=none smtp.client-ip=209.85.167.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IBn5j95L" Received: by mail-lf1-f51.google.com with SMTP id 2adb3069b0e04-597d712c0a7so3265056e87.0 for ; Sun, 14 Dec 2025 08:35:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730147; x=1766334947; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iYG0UzrVNvu+sJ+OoGaiC09VrdPSEEepGbXjW8i1wGU=; b=IBn5j95LsDo+QFYQJN3jy4CYt0d072oCw3Ofzv45OVR7OD7kEvp8O4ChEyul6UnXyx UDwHJPfGdoPBJjj5jYNdzKzKNLcaww++Otb0e9TZGRWQevlRilYVFYlqFCxpnpLZWJov IXv5AJT3PMQPMvo0//8uXP+/vADGSgilMLw27bMeS8aInByNqJ/DhzkLMcCRwDuCRj7g JomowR8T/rpAIcZpzqzcFiSHP7jJnthE2YsiCvrxKY0PV8kUY8TldGEVpMIfGHyMCnZl ggqlYzpBc7taJFAtdVJrK/VD0zp1o3GF5USobqyvv95MxmOtOd0s6NEHBJqU4U1K7Bke ymqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730147; x=1766334947; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=iYG0UzrVNvu+sJ+OoGaiC09VrdPSEEepGbXjW8i1wGU=; b=KeQaJzNNE0hmlsMpKILyhA1rvGCNnxP1WWDqI5L3lwf04Qdw3ZUKHlRYzXFqlt7HVF 1cuyl0lAQzXXAl0GJBVqSPc/Fd/L7CBP0QoRYDIbxBseaIXpn8joRi+ZKahdLT41wzTs Swmq+9df+zzca/JvUTX7Mrt7VlZIcrS5OKbW4BSK1DhO+1vuRmpBSC88IbxzXvIgbPTQ ONrgxzj5BQXLmIWgmznTCfZFEkZpY82FNumbtOLYN6LiaQGSOnaQtRKx1/TWw0H3seG/ V52gR74HH3GRMLD89Z7elVnTu5mW3Sy9w2k1jOAkWwfmANk+WPwAprqueWEPRo6TAHdr i+gQ== X-Forwarded-Encrypted: i=1; AJvYcCU+Do+pT0S29572Y7p4o71UQfsRimKe6/giMqflRHifHRXvGqoutZRCQz/KVu7zGXFc857TkmjyLICIhnM=@vger.kernel.org X-Gm-Message-State: AOJu0YzeDs/FKw3hCFSXzSg2SZx1zw6t8T3hIdG/nLh+ftLmC5e8GtNx 9VfABFFkbnPCwZr6N46aH7O2VqntmH61zdHGUaX2XfeqtcEhUiKo5jal X-Gm-Gg: AY/fxX7P4DbSvxSi2iN7yZXjIHXwXvk4UOeZggRD9DigO8oiQUC/O/Diba+2GhqCEuk VosHSCSMpy3no4v8qIENk+gEi27k+MsMkgGWQ/gSUD+7aU1MWrfxVx0wfqxBG8MrpcEh48HxBM/ OPKY6Npuh7XPH3czKnuMBK8smsgZ3WBxMe0dHmBzEwOdeQZM7Rmv0/85XNPhbzkLOjXMXB0NMpj Ljz/3UkZ1HZNN/tifuIwW/DbmOga0pJqr2zUTMMUSH2lwP5O8+KG7Ui8ubLMFgue3RuaYKVpBPp 4vgw1SUw3ojvAIe05Mv6uGi2KXml80MqVRwycAL+h2ZbTLuv5MPHHGorG8LKcdMZH4JVqSvV37t mT5hn63B9dMpEB7kK6+0NPFdPvLPcmZI5b1Xr/wgGmQqJu34a+I+UTO/UKffbM/JK6xIkb0aOQp 3n5g== X-Google-Smtp-Source: AGHT+IFa8YrKVxWZ8N5CZhPJ/l8DS6QHhWtXFyJ2Kk/ViapXJFN4nzGXTae+4TaN+8nHnP2k0U2DqA== X-Received: by 2002:a05:6512:3d23:b0:577:318a:a1c6 with SMTP id 2adb3069b0e04-598faa448aemr2580474e87.23.1765730146784; Sun, 14 Dec 2025 08:35:46 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:46 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich , Ilya Mamay Subject: [PATCH v5 1/9] riscv: ptrace: return ENODATA for inactive vector extension Date: Sun, 14 Dec 2025 19:35:05 +0300 Message-ID: <20251214163537.1054292-2-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ilya Mamay Currently, ptrace returns EINVAL when the vector extension is supported but not yet activated for the traced process. This error code is not always appropriate since the ptrace arguments may be valid. Debug tools like gdbserver expect ENODATA when the requested register set is not active, e.g. see [1]. This expectation seems to be more appropriate, so modify the vector ptrace implementation to return: - EINVAL when V extension is not supported - ENODATA when V extension is supported but not active [1] https://github.com/bminor/binutils-gdb/blob/637f25e88675fa47e47f9cc5e2c= f37384836b8a2/gdbserver/linux-low.cc#L5020 Signed-off-by: Ilya Mamay Signed-off-by: Sergey Matyukevich --- arch/riscv/kernel/ptrace.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index e6272d74572f..9d203fb84f5e 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -95,9 +95,12 @@ static int riscv_vr_get(struct task_struct *target, struct __riscv_v_ext_state *vstate =3D &target->thread.vstate; struct __riscv_v_regset_state ptrace_vstate; =20 - if (!riscv_v_vstate_query(task_pt_regs(target))) + if (!(has_vector() || has_xtheadvector())) return -EINVAL; =20 + if (!riscv_v_vstate_query(task_pt_regs(target))) + return -ENODATA; + /* * Ensure the vector registers have been saved to the memory before * copying them to membuf. @@ -130,9 +133,12 @@ static int riscv_vr_set(struct task_struct *target, struct __riscv_v_ext_state *vstate =3D &target->thread.vstate; struct __riscv_v_regset_state ptrace_vstate; =20 - if (!riscv_v_vstate_query(task_pt_regs(target))) + if (!(has_vector() || has_xtheadvector())) return -EINVAL; =20 + if (!riscv_v_vstate_query(task_pt_regs(target))) + return -ENODATA; + /* Copy rest of the vstate except datap */ ret =3D user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ptrace_vstate, 0, sizeof(struct __riscv_v_regset_state)); --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 567D32DE70D for ; Sun, 14 Dec 2025 16:35:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730152; cv=none; b=Y1yHVvXqCOlg0qyOIrz2SGi2KUM1CnvBJ+oo/G+UbixjmPlNJYmDJKx+mOXBkNsPSCEhKrrzBUPaRD910kQSHSCPLFQfSwEudoqj9p4pxIngr1yOtm0WsmzV47j96IfJ1a1yCDnjzL0KlUoQcBmHZrl+9u2QTNkznVG6oVH30m8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730152; c=relaxed/simple; bh=u4GRx7isGS6qqcvrlTr4xHwjuxkIkW+2PvgAhpYYI+U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dPtnPkMJhw7GdKG0zA/THmmUMermttdj6VkAcX/hBWijNxhN2Hv7S1zeq8MCGPd9qCcttOUYL8hKtwYobPRUvkvx+facbxCf1IeuWPo0mH8CWWYroNABm/xTNLWQHfKEUBR5k0FKjQbixAWsNvDW+1Qq1Kng+tfdbmqJ5ukS7yQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Y3DSRZMi; arc=none smtp.client-ip=209.85.167.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Y3DSRZMi" Received: by mail-lf1-f53.google.com with SMTP id 2adb3069b0e04-597de27b241so3377415e87.2 for ; Sun, 14 Dec 2025 08:35:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730148; x=1766334948; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dLn4MNRkDT1IUgV60n0qo0HeUjZmH78SLEbhEVR7tyI=; b=Y3DSRZMi9kujvscyef9hLqAd1IORKsLVIw7VXQcYdtdOPJiRJjKy5T4s4ec6J6UUv7 iA2UdsEC2hBIkpWAESLSGn/0i7TkSP0vjvKhXiKJkGDzUF2raBiLVJt/NSu0dxxWbR9k ocH843SYesEHeyp8rXXrvgj1uSS3eBdva5Oz+n/McPn+mQR7Bd0ipjfURvA8saIgke8Y I9OhUjc32kKCT3gcZGEIUx1V0o5hiKtTCrofj/n6oGUZFvjBUZ+KITqYTBtC7zCStINQ 1NwFtQcG49S0/hLyOFPuwlAE8g+mkOw1tsOE3yfCOiIsP+qCQnHW9zp5UGnaHiDaxajG JwpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730148; x=1766334948; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=dLn4MNRkDT1IUgV60n0qo0HeUjZmH78SLEbhEVR7tyI=; b=hl0vgPtTp+9ecV9TJeS19Pzsxh5Z7FM7QIn14wb+ZwLU1u/pCP07yyAk922kRDL07f OLX+mwUv/WEGEtQr0hAFiQ79pdPpkTV085nsvBL5eaFX1RTeonk8xVfdpFNUTBSDvyiD J8pocQSJOXLrBi/POone1aqcEvZuBflBtpYRxnuyA0VX2qMy4ERcGBg640khp/zHVNOb V/9P8HKyQeZiaSHPeUI0fzVEZ2hbP+OoJIcpeyf9w8EGINnshRjBNFL9740AelD4bQyc I2+efLvFWIAKLm4FdJ4BpIHZlZviFCn3eY8Qit/RTUeUiYTi7wl6dXlNdanLgFJa8+6z SdZw== X-Forwarded-Encrypted: i=1; AJvYcCW1hIgGB6WLLCh1LL+9ncbYuy2KVFLc50pHeJwWtPhm4KHCCtvKtb3irMrlMeQWdTVlGeeHomVinndjjZY=@vger.kernel.org X-Gm-Message-State: AOJu0YytLS1fbPa4l2MpDENB+wSH+MxWIqFkh+vLKPWz9wKx7Vp1IzYn csIuYZ3y8YXk9K5hIyyXV5ne0y9WxkXnfMS40iBaxc/Pp2qy6h+T5TlB X-Gm-Gg: AY/fxX4qiDyo0cZeCaRejbLbi+3qgmDXB4hk6rMkkjXmBt6qKUsl3csrd7tKG+WUm6J mCkG2lDZ1MQrxpBAATFUXrRgKw//mcixafqpc8P7QrY4UmP58SNdt9WxINerZ4yd+et+mIeVm9S JgROBnGDfyvOwzSXcQQHLlZQfHSFdT5uCeH6lRe8WDSKlHB6TxcmnOx5qhvcpyPl40a2/SmDnNz ZjU8yjWBeCBvv0+bICmdkjNTxZyUFgQ2ADStnD3Q2475lxI/HTfSUkaXRYbgvH6JReUNCPIE24X L9eLXvUjYF/9G4607EG4zI1nsKJO2iaHaTIAgIcpcU3ui4GwUpH8+V0rZTl/yVzZpCMcNMuf0ye 6BG785c8KaFZn04iKzpSd8WQWtjcrBiW1dRXiehPKNNaKogrU735S2NPvztRPuC9BOmjfxtvsGU Wx4kjzSxsi2jr6 X-Google-Smtp-Source: AGHT+IFh1nTDiB6bfb+d32bUKdxI+dMGC8og7D8jELF0KQuXTZE0v1XUdZ2F7715E8gk3xNrCq+2AA== X-Received: by 2002:ac2:4c47:0:b0:595:7f1c:29bb with SMTP id 2adb3069b0e04-598faa36a70mr2545740e87.22.1765730148316; Sun, 14 Dec 2025 08:35:48 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:47 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 2/9] riscv: vector: init vector context with proper vlenb Date: Sun, 14 Dec 2025 19:35:06 +0300 Message-ID: <20251214163537.1054292-3-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The vstate in thread_struct is zeroed when the vector context is initialized. That includes read-only register vlenb, which holds the vector register length in bytes. Zeroed state persists until mstatus.VS becomes 'dirty' and a context switch saves the actual hardware values. This can expose the zero vlenb value to the user-space in early debug scenarios, e.g. when ptrace attaches to a traced process early, before any vector instruction except the first one was executed. Fix this by specifying proper vlenb on vector context init. Signed-off-by: Sergey Matyukevich --- arch/riscv/kernel/vector.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/riscv/kernel/vector.c b/arch/riscv/kernel/vector.c index 3ed071dab9d8..b112166d51e9 100644 --- a/arch/riscv/kernel/vector.c +++ b/arch/riscv/kernel/vector.c @@ -111,8 +111,8 @@ bool insn_is_vector(u32 insn_buf) return false; } =20 -static int riscv_v_thread_zalloc(struct kmem_cache *cache, - struct __riscv_v_ext_state *ctx) +static int riscv_v_thread_ctx_alloc(struct kmem_cache *cache, + struct __riscv_v_ext_state *ctx) { void *datap; =20 @@ -122,13 +122,15 @@ static int riscv_v_thread_zalloc(struct kmem_cache *c= ache, =20 ctx->datap =3D datap; memset(ctx, 0, offsetof(struct __riscv_v_ext_state, datap)); + ctx->vlenb =3D riscv_v_vsize / 32; + return 0; } =20 void riscv_v_thread_alloc(struct task_struct *tsk) { #ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE - riscv_v_thread_zalloc(riscv_v_kernel_cachep, &tsk->thread.kernel_vstate); + riscv_v_thread_ctx_alloc(riscv_v_kernel_cachep, &tsk->thread.kernel_vstat= e); #endif } =20 @@ -214,12 +216,14 @@ bool riscv_v_first_use_handler(struct pt_regs *regs) * context where VS has been off. So, try to allocate the user's V * context and resume execution. */ - if (riscv_v_thread_zalloc(riscv_v_user_cachep, ¤t->thread.vstate)) { + if (riscv_v_thread_ctx_alloc(riscv_v_user_cachep, ¤t->thread.vstate= )) { force_sig(SIGBUS); return true; } + riscv_v_vstate_on(regs); riscv_v_vstate_set_restore(current, regs); + return true; } =20 --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D746D266B6B for ; Sun, 14 Dec 2025 16:35:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730153; cv=none; b=mBjAYlKzsbhMBSuDbh+5OVnnX+/R3ryAjDdUJ3YL2mRdtRKB4AF5GenZiYgymJh8JvDKgHWA0tO3reivpFWAJ0v1W34mQ28Ew2qKYSRjApqysNMxb0lrL1yLR3HHLqXVuBupLlwhbTWv42p1nbCZ2Xxud0TjYF1ux5EwHMmebF8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730153; c=relaxed/simple; bh=XDQQaARGK40hFuueUlB/TBErHoYg3YAnnNfm11ShX2c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fx9oNm1fV2sw9VABjEGOq1uYqRU40tjY3jVMgtGhlC9tCKaX9byt47h7/4MusHRI1S1KbP3bWjiSm1XJVwzwZBA6hDvpKJ7daaxes/C4D7iFr9PJgW+SDO7HwoJNv6eGUKazJZTVOQhlqkEiIMeLfPNu1B/QyFWZo5EWzLtetIg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=h9hrJun6; arc=none smtp.client-ip=209.85.167.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="h9hrJun6" Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-598efcf3a89so2615098e87.1 for ; Sun, 14 Dec 2025 08:35:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730150; x=1766334950; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HSza8k/VWcFFoMSfwlhWsVuvw7zo5x41+rEafb2iuhE=; b=h9hrJun62HeUhpQKDsOaQD2IO2tq+IU/Hpzi3JrnPHxU+ecBWYt5C33quixITGa/p2 4co0qdFIQKSCCzbSrTwXO4yA8qAbYjzkdXv6g8RYi78TH9VCTBQQVQZ/F9y3H5x3kgIK o+mrKJnLR9rUPwjCRRwYzsE1uwkp6OzIOeq0+7S3GZ27746uo07tYFCMogzXsA+t9ZSV KQtMPeR4mw7n5E2doRBV6fLDL8Tk5k9txjZ8KnwqEpF6W9J0tYuEFxxUTTRMtG0vjaRB 8H5/+7v9BxTk/m+m8j5ixxIgFfUAmQqI58a7aqXYkTUAviSY6hadLhbM/Tk8lvEPVwxC mpmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730150; x=1766334950; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=HSza8k/VWcFFoMSfwlhWsVuvw7zo5x41+rEafb2iuhE=; b=jUuwdtFVgtqqzLi+QI/unhMj/1WN7AW/JoalLISYmcRJhewf8zFOmFjk8PiID3d2DX QGtqG+iUC10ytZ07G/cMbRdKMWMaTfd1f1Qyq9q8uPC6Pgtq/ULvgkh1GPzF7oF9XJod H3ASo10Kxsrdm6+UwoeKPEUxZmXqL36NGqMMs+r5RDKFjDbry5D4mYXARbYt7vvRcQLs WRS2KKlHuwKSO2fcxCRLM6XpTbS84OdULixyFqyn2g/4AgZHD2Fc/o1NxszBnQ7FMCyj sspxCg52AiwmiaR05QGf2opLHVCifF4AgZ6ehdjmPVICYJSv06GAL5/endv46c2jRx8G am0g== X-Forwarded-Encrypted: i=1; AJvYcCXn2uR/oVA/p65NplGVacn2GtUJaTyfyTumO5RyWuun3qFZudnaAtlyAbuIS3byze1d3y7WVF2rfqUW3RA=@vger.kernel.org X-Gm-Message-State: AOJu0YzLGSn75XZ1I4bboASEOy1DPzVWTeO/w2e9y8JGD74McYihact+ jGAW85GL3yhz2byyv//0h5SWqew7DdEg9y4TlwFNtUxoBS38YijZRutD X-Gm-Gg: AY/fxX7ttUe14qY/QU8OV8kNhih4pc7liGXerfEW75aKUJWsCQqCodmzS8Ij0UoVunl 5KADZgSOFPtXo4MNctn59CsTexjPn28PsOQkb1eVTOtdrsbSqTNziWvoB+TP9hVuRpFL8rt4IHZ 3vH9w7DQzQUeeDzhO1PsD7LY+ByEhCayIBsSKzG4AMUA2f/vBIqOUd0qSNSqu/Wk5mg6ycmiSRD zOEHZOE2qRnVwbAWivfmDikuZ+d9Ws13Q+17hCMTQ2gRCmX5dfNua8VCwWer26FrDscqKvRIDLP zBx9zPgUUdVeaJYtvlNJEcJ1fkS/yEYWhVRDT1wd2Q5qy7RlDH8GSqgV50+Bk0ToC3NUHvVwjZU zwCMfqyjDeUmvGaFFpny/1HO3PaSGsS5eFbTNXzMKMjjcl4Qf61zKmmUjEy5Mfm9yPURxlFgzyH bE3A== X-Google-Smtp-Source: AGHT+IHboafEprMTLQwXHxj0Id+1cWDu6+3jBn6YkXp7nlFJBpxpKVNyj1NgGkyCkOnkNopnc1J00w== X-Received: by 2002:a05:6512:a8c:b0:598:e92f:7ec9 with SMTP id 2adb3069b0e04-598faa36090mr2426928e87.6.1765730149812; Sun, 14 Dec 2025 08:35:49 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:49 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 3/9] riscv: csr: define vtype register elements Date: Sun, 14 Dec 2025 19:35:07 +0300 Message-ID: <20251214163537.1054292-4-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Define masks and shifts for vtype CSR according to the vector specs: - v0.7.1 used in early T-Head cores, known as xtheadvector in the kernel - v1.0 Signed-off-by: Sergey Matyukevich --- arch/riscv/include/asm/csr.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 4a37a98398ad..38f16538b35c 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -444,6 +444,23 @@ #define CSR_VTYPE 0xc21 #define CSR_VLENB 0xc22 =20 +#define VTYPE_VLMUL _AC(7, UL) +#define VTYPE_VLMUL_FRAC _AC(4, UL) +#define VTYPE_VSEW_SHIFT 3 +#define VTYPE_VSEW (_AC(7, UL) << VTYPE_VSEW_SHIFT) +#define VTYPE_VTA_SHIFT 6 +#define VTYPE_VTA (_AC(1, UL) << VTYPE_VTA_SHIFT) +#define VTYPE_VMA_SHIFT 7 +#define VTYPE_VMA (_AC(1, UL) << VTYPE_VMA_SHIFT) +#define VTYPE_VILL_SHIFT (__riscv_xlen - 1) +#define VTYPE_VILL (_AC(1, UL) << VTYPE_VILL_SHIFT) + +#define VTYPE_VLMUL_THEAD _AC(3, UL) +#define VTYPE_VSEW_THEAD_SHIFT 2 +#define VTYPE_VSEW_THEAD (_AC(7, UL) << VTYPE_VSEW_THEAD_SHIFT) +#define VTYPE_VEDIV_THEAD_SHIFT 5 +#define VTYPE_VEDIV_THEAD (_AC(3, UL) << VTYPE_VEDIV_THEAD_SHIFT) + /* Scalar Crypto Extension - Entropy */ #define CSR_SEED 0x015 #define SEED_OPST_MASK _AC(0xC0000000, UL) --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7CB371E1E00 for ; Sun, 14 Dec 2025 16:35:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730155; cv=none; b=gHaKgCpWo8v/Q/1T9mrAgX8bvr6EvdIX/oomajhVfWhDWVG5/k9A1ORMxDCFHy2QN8oecf5+/Od+iGO2olFoJ1mFYwOioexSO0aS6kchoUAMI1J+cDJdnSavJj9oneEpDRQJEaUdzUQdpZpatdhSPia5VQkmcjxxoydU767r6vY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730155; c=relaxed/simple; bh=c2ITgKh/hX1hEC+RdjZYoXCbPi0eRRb5EFMAxzFiNZo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RRoaDv79vHUQ/Hkfk/dEf/iZ/iT2YDaubY+QL1GQAjD2/9coJ66wsdKzSKCMNcD39YUxnjeZ5hQHrqllZ2Ppj58msJIXeCF8wZOSjlFhOUGAxNR+TYPjcQX9gfDkDxzDKypUMHrsSM+hgLVSwytsN06XcEct83AjhcWcQJ0KTLc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=AGHYjmsv; arc=none smtp.client-ip=209.85.167.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="AGHYjmsv" Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-5958187fa55so2198250e87.3 for ; Sun, 14 Dec 2025 08:35:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730152; x=1766334952; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9ceN7tYN/gKBBlWayVud/16shc9bGATzOqOE1jrkBy4=; b=AGHYjmsv8k8gG5dSm5xBfCevbefCfZWl9V3Bhk2gGRoCcXm6MbfN9a7sU559Ph9kqb Uqtjj8wxRSwNokinW9YBeiN3s6yBNgJBEYLA1TTcQ2WNnYJfUC6kMCTupcc0+oEOmZkf MlEv4IeFnORLUiTIyskO6nb8920eBM+E0M/8y386abUWyTAuLWjALq4ShUv70ErMgw0H n59ehTIlsOInOHJXpSTfTgBKUaMY2VDE4txuPYRzE/+QN02KbPlL+ouAyCDG97Zr6Pea Svju8+9yzjPWFjtI2yYn2JzWp+ehwe2dYYeeXjDyzEXfb8oDCSFglyvA90kXDOzBE2im XUBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730152; x=1766334952; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=9ceN7tYN/gKBBlWayVud/16shc9bGATzOqOE1jrkBy4=; b=GZWiuHbXwjdLtTP7AgAzHASUDYynoPVAkVkeLzsTJVmXHB/yZcVjomSL7kP9fdttu9 jzEkz/8RK6HFngZZa+ywHKUtzmD92ORSfNgm8UZaZ4NIM1WheEyjewGZGuje4w+sJOio rwmTrIeV832ImQYXSu4hJyzxAJMmfTwZarp0x3dgGoALizD1sxSt13+fJo695Cr6hW8k eNg/cwdWOp3LPGUE0KExdQ/SP6vqlt6AP8uTxydJV57g1IASPA8uMI6C6VadadHVJK1K 7yXXKsSWYt3q+qfl8XAtQV0uQ78ed2/TLf3A+oBtqQcvG3GyxFCnZeJu56zVF/OkLuxB aj5g== X-Forwarded-Encrypted: i=1; AJvYcCWYlmX8lvbn50UBYmWSTTBeDmnNfdSNiEpUpWRGFWT29RN/3BxSkrwqNi352K96b2y8moekegSLlIsngbs=@vger.kernel.org X-Gm-Message-State: AOJu0YxLUm+6XlXTaR1XUtcWGH/aYLLyATgycKyy9LAeDk5KNXInMMgl gGnPrazqCvtBqJC60/oxiwMvlo6n7D4GrTky39cfaZmj7zEEo3q9MBh2 X-Gm-Gg: AY/fxX42WwNELJg3jbo3RPV2VW63RUDOsEOeQgD6vAUh9WjLwQSd/n2XkqKaw44eSRU mZ47dJBArphTd1gy9xIQQSlQ9U5Pjri/n5ThYkSTNj1QarCd3ALIHabttwrTlj1aVXvfI7EtiXJ Y/0sPjUvJvak9zAdpEIG/5RHJk/auyx9XYV4aeyJwCFbliPBdMkYBepkGkXIx9by2vgFXxUaoOB wjMWt5hVeZmMteucJMyZiMZf1V5iiyBl5poUxCqe9dMR5gIkPnuDsxnZxFU9/Y5p+UEo2wH+PIV Hmecjxmlh/MrTR6u82HpGCXoco+km2t1sgMT/HyFKgNupuxLPNKE/gc0wdAIhQzecj395Xfuoy7 wVY/qZ0PIguFj/TmuXuvAmHr5YsxkaWYFk9QBNNRxYAKjl8o6H1HrUpFOQu9vArsvFGoPnCrFFI nREw== X-Google-Smtp-Source: AGHT+IE7dE3l70YGYPB3y3zq32vN+TmUO6rInc0cqfa6GCb0iUkaJd/dRh0REzAP8I/RflxLSnRQhw== X-Received: by 2002:a05:6512:1390:b0:598:e9f9:bdd with SMTP id 2adb3069b0e04-598faa805e5mr2916040e87.27.1765730151386; Sun, 14 Dec 2025 08:35:51 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:50 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 4/9] riscv: ptrace: validate input vector csr registers Date: Sun, 14 Dec 2025 19:35:08 +0300 Message-ID: <20251214163537.1054292-5-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add strict validation for vector csr registers when setting them via ptrace: - reject attempts to set reserved bits or invalid field combinations - enforce strict VL checks against calculated VLMAX values Vector specs 0.7.1 and 1.0 allow normal applications to set candidate VL values and read back the hardware-adjusted results, see section 6 for details. Disallow such flexibility in vector ptrace operations and strictly enforce valid VL input. The traced process may not update its saved vector context if no vector instructions execute between breakpoints. So the purpose of the strict ptrace approach is to make sure that debuggers maintain an accurate view of the tracee's vector context across multiple halt/resume debug cycles. Signed-off-by: Sergey Matyukevich --- arch/riscv/kernel/ptrace.c | 88 +++++++++++++++++++++++++++++++++++++- 1 file changed, 87 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 9d203fb84f5e..5d18fe241697 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -124,6 +124,92 @@ static int riscv_vr_get(struct task_struct *target, return membuf_write(&to, vstate->datap, riscv_v_vsize); } =20 +static int invalid_ptrace_v_csr(struct __riscv_v_ext_state *vstate, + struct __riscv_v_regset_state *ptrace) +{ + unsigned long vsew, vlmul, vfrac, vl; + unsigned long elen, vlen; + unsigned long sew, lmul; + unsigned long reserved; + + vlen =3D vstate->vlenb * 8; + if (vstate->vlenb !=3D ptrace->vlenb) + return 1; + + /* do not allow to set vcsr/vxrm/vxsat reserved bits */ + reserved =3D ~(CSR_VXSAT_MASK | (CSR_VXRM_MASK << CSR_VXRM_SHIFT)); + if (ptrace->vcsr & reserved) + return 1; + + if (has_vector()) { + /* do not allow to set vtype reserved bits and vill bit */ + reserved =3D ~(VTYPE_VSEW | VTYPE_VLMUL | VTYPE_VMA | VTYPE_VTA); + if (ptrace->vtype & reserved) + return 1; + + elen =3D riscv_has_extension_unlikely(RISCV_ISA_EXT_ZVE64X) ? 64 : 32; + vsew =3D (ptrace->vtype & VTYPE_VSEW) >> VTYPE_VSEW_SHIFT; + sew =3D 8 << vsew; + + if (sew > elen) + return 1; + + vfrac =3D (ptrace->vtype & VTYPE_VLMUL_FRAC); + vlmul =3D (ptrace->vtype & VTYPE_VLMUL); + + /* RVV 1.0 spec 3.4.2: VLMUL(0x4) reserved */ + if (vlmul =3D=3D 4) + return 1; + + /* RVV 1.0 spec 3.4.2: (LMUL < SEW_min / ELEN) reserved */ + if (vlmul =3D=3D 5 && elen =3D=3D 32) + return 1; + + /* for zero vl verify that at least one element is possible */ + vl =3D ptrace->vl ? ptrace->vl : 1; + + if (vfrac) { + /* integer 1/LMUL: VL =3D< VLMAX =3D VLEN / SEW / LMUL */ + lmul =3D 2 << (3 - (vlmul - vfrac)); + if (vlen < vl * sew * lmul) + return 1; + } else { + /* integer LMUL: VL =3D< VLMAX =3D LMUL * VLEN / SEW */ + lmul =3D 1 << vlmul; + if (vl * sew > lmul * vlen) + return 1; + } + } + + if (has_xtheadvector()) { + /* do not allow to set vtype reserved bits and vill bit */ + reserved =3D ~(VTYPE_VSEW_THEAD | VTYPE_VLMUL_THEAD | VTYPE_VEDIV_THEAD); + if (ptrace->vtype & reserved) + return 1; + + /* + * THead ISA Extension spec chapter 16: + * divided element extension ('Zvediv') is not part of XTheadVector + */ + if (ptrace->vtype & VTYPE_VEDIV_THEAD) + return 1; + + vsew =3D (ptrace->vtype & VTYPE_VSEW_THEAD) >> VTYPE_VSEW_THEAD_SHIFT; + sew =3D 8 << vsew; + + vlmul =3D (ptrace->vtype & VTYPE_VLMUL_THEAD); + lmul =3D 1 << vlmul; + + /* for zero vl verify that at least one element is possible */ + vl =3D ptrace->vl ? ptrace->vl : 1; + + if (vl * sew > lmul * vlen) + return 1; + } + + return 0; +} + static int riscv_vr_set(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, @@ -145,7 +231,7 @@ static int riscv_vr_set(struct task_struct *target, if (unlikely(ret)) return ret; =20 - if (vstate->vlenb !=3D ptrace_vstate.vlenb) + if (invalid_ptrace_v_csr(vstate, &ptrace_vstate)) return -EINVAL; =20 vstate->vstart =3D ptrace_vstate.vstart; --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97782281503 for ; Sun, 14 Dec 2025 16:35:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730159; cv=none; b=n7Lwfg1FIlLxlJy/x7O5C8syhV0RZqV+C0qP0UE3UzsLodK1QS73+sfHYS7t5SYM/42CRbzXkNeYwUqFJW3vqpl4BsYTJN8KHciBxghjBhoi5SAAF5hVK1mPe7EkobPZvHugcOHnu6YtXuOpZJ4YicDyI2+A7NXq8EzwnLgY21U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730159; c=relaxed/simple; bh=AX9Bi49c6VOIjDClUXqxhL4fzFAElwP2HRI9TAjl2yA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KgE9bqPCjM1QSO42wV9GNOSmuZ6GajtaYtZKMcMaF9a/E9yA3Tb61qpKZZ1N+zKs9QxHsuFMPchlRA1SC/E7vw6ihND/cwCqpKqfHk0bidg7S+7O8O3yNXUkMTLqoUbZ3k2aOPISqYnqmoXLQYNfgr5DnInIQWHOHwsd//TJDbQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FRdA2VhZ; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FRdA2VhZ" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-595819064cdso4353678e87.0 for ; Sun, 14 Dec 2025 08:35:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730156; x=1766334956; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MzjkaycuriVDIslkX4nv+fXBvUrot6f7f5pS4rb9nTI=; b=FRdA2VhZgW6YB+rRUGRK26DjyMuRiNAfMXM/2IlEIry1tO5dPxxuRfANBGnmvs6MGz KX/0RHgAREa2Gu65u/KZcK4auHXJ24LNXDMqvkM43mYTo7H9vW+e2nbmGbNU7idLRce7 RvQQWg6smUZgaXIHA6XUEIF1kdCUzlyH/Ier3mLZ+AgjUmQYnmukOkYT6jZ/KSwzDP6h fT6tswv1PxTBTAGjRIBcgh44l+gcqHv7+WS+xNnz2J3s5LuoIKy4iHjxQ5JG5M1L2jZp b2Xo87dDE43uEpa0mM5o2H3QDpLMquagV0Zj15RTk43pTyDOXSDxgoEfppXsRKaFtskR KeZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730156; x=1766334956; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=MzjkaycuriVDIslkX4nv+fXBvUrot6f7f5pS4rb9nTI=; b=LBsdM2bjD1zSMHd0+jSbcifMCTJ+y76Z0AqfKSOrbpwtNDNlacUMG5cI9i53Uxc4rR ZoJbjM0P6refRLSjsc4+yupid3lkZTGXXyZXToQ5KvXCI0XR4BYl2QCVal0n0kyFUtH3 AO9qN9AnkIsCZgT9HMQ4Ix5vm/89mQOpG9agFXiSfI1lVnxR37q5Ria/ksmP98sliHb1 fSv7Y0/MEuFNxaEZj388WRvb41GGUP9Y5amavEaCJwzn+okoi0wBf+E4ggbJT/KdEpED MnYulwJoe9PJJZzhOYxWQ6R/s/UHzY5Zpw3SI/qInaZA3u8noBBrCblKuKI1Mi35DdQ3 JUmg== X-Forwarded-Encrypted: i=1; AJvYcCVJwgecdEim73jBpIAn0810I8N9CSoFsnwvr8hj2ZXRi1awSvFDZ7tr1xDKf5DSXA1Bnl9F3JnjNA0sykw=@vger.kernel.org X-Gm-Message-State: AOJu0YyjjrKNRX88Z/DeMGts1SQYZwu4Hte661efIX2C5TNVa8m/qZWH Eox8DXH8ELur/Jx9KoRZReBpCJUd2xv21/LypmqmE5umcg9OmXOER9aT X-Gm-Gg: AY/fxX6yNtFW6XEOMgeEHYn63HwHa5a97cxtse7W4BcJ6mWZNnqnIP1u/pjP7KSMbTA faYY/4MLgNaJCbntOXj3cqBoZydYclSRPPUbcMZW6KPUKevs2bvVGfAlu2bKmdI/BtMd48ysoEq BijfDvl5N0npgz97KbeFabdt11ADqEhPBT5cAX8Df8nP9xE3yMgYwdmpcxCT71Amc7xRcCr4PNQ gA7j2H1rnf7m+11O64/8CKjxGtM+166kVM+8as6jcwBS2AZx9k3x6r6aGX0ikFYaYui9KvvjSiC rNB6WOeknIMqizeOKBAJfVLxyzxKAUYtcHqNvdtKRsxoBQoozh1ektIGnvbB52t7WaPGnI1ZpQt mSRz9AFfg9FNeOk9mbbgqqYtrwXzRJgkS6cJqckxYN8qx6pXnkb3QQPhefhuUKQirj/Dh8ZlBFP kFtw== X-Google-Smtp-Source: AGHT+IFEo7YnyX/RrmJbiSGf+H84hqlpjB1NYRQJ0t5IGQa+lkiCRASkjTEgJgxSlpqyoasVp+264w== X-Received: by 2002:a05:6512:3c8f:b0:596:9cf0:fb85 with SMTP id 2adb3069b0e04-598f3bb013emr3764095e87.4.1765730155530; Sun, 14 Dec 2025 08:35:55 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:53 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 5/9] selftests: riscv: test ptrace vector interface Date: Sun, 14 Dec 2025 19:35:09 +0300 Message-ID: <20251214163537.1054292-6-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test case to check ptrace behavior in the case when vector extension is supported by the system, but vector context is not yet enabled for the traced process. Signed-off-by: Sergey Matyukevich Reviewed-by: Andy Chiu --- .../testing/selftests/riscv/vector/.gitignore | 2 + tools/testing/selftests/riscv/vector/Makefile | 10 ++- .../selftests/riscv/vector/v_helpers.c | 23 ++++++ .../selftests/riscv/vector/v_helpers.h | 2 + .../riscv/vector/validate_v_ptrace.c | 80 +++++++++++++++++++ 5 files changed, 116 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/riscv/vector/validate_v_ptrace.c diff --git a/tools/testing/selftests/riscv/vector/.gitignore b/tools/testin= g/selftests/riscv/vector/.gitignore index 7d9c87cd0649..40a82baf364f 100644 --- a/tools/testing/selftests/riscv/vector/.gitignore +++ b/tools/testing/selftests/riscv/vector/.gitignore @@ -2,3 +2,5 @@ vstate_exec_nolibc vstate_prctl v_initval v_exec_initval_nolibc +vstate_ptrace +validate_v_ptrace diff --git a/tools/testing/selftests/riscv/vector/Makefile b/tools/testing/= selftests/riscv/vector/Makefile index 2c2a33fc083e..326dafd739bf 100644 --- a/tools/testing/selftests/riscv/vector/Makefile +++ b/tools/testing/selftests/riscv/vector/Makefile @@ -2,11 +2,14 @@ # Copyright (C) 2021 ARM Limited # Originally tools/testing/arm64/abi/Makefile =20 -TEST_GEN_PROGS :=3D v_initval vstate_prctl vstate_ptrace +TEST_GEN_PROGS :=3D v_initval vstate_prctl vstate_ptrace validate_v_ptrace TEST_GEN_PROGS_EXTENDED :=3D vstate_exec_nolibc v_exec_initval_nolibc +TEST_GEN_LIBS :=3D v_helpers.c sys_hwprobe.c =20 include ../../lib.mk =20 +TEST_GEN_OBJ :=3D $(patsubst %.c, $(OUTPUT)/%.o, $(TEST_GEN_LIBS)) + $(OUTPUT)/sys_hwprobe.o: ../hwprobe/sys_hwprobe.S $(CC) -static -c -o$@ $(CFLAGS) $^ =20 @@ -29,3 +32,8 @@ $(OUTPUT)/v_exec_initval_nolibc: v_exec_initval_nolibc.c =20 $(OUTPUT)/vstate_ptrace: vstate_ptrace.c $(OUTPUT)/sys_hwprobe.o $(OUTPUT)= /v_helpers.o $(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^ + +$(OUTPUT)/validate_v_ptrace: validate_v_ptrace.c $(OUTPUT)/sys_hwprobe.o $= (OUTPUT)/v_helpers.o + $(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^ + +EXTRA_CLEAN +=3D $(TEST_GEN_OBJ) diff --git a/tools/testing/selftests/riscv/vector/v_helpers.c b/tools/testi= ng/selftests/riscv/vector/v_helpers.c index 01a8799dcb78..de6da7c8d2f1 100644 --- a/tools/testing/selftests/riscv/vector/v_helpers.c +++ b/tools/testing/selftests/riscv/vector/v_helpers.c @@ -26,6 +26,29 @@ bool is_vector_supported(void) return pair.value & RISCV_HWPROBE_EXT_ZVE32X; } =20 +unsigned long get_vr_len(void) +{ + unsigned long vlenb; + + if (is_vector_supported()) { + asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=3Dr"(vlenb)); + return vlenb; + } + + if (is_xtheadvector_supported()) { + asm volatile ( + // 0 | zimm[10:0] | rs1 | 1 1 1 | rd | 1010111 | vsetvli + // vsetvli t4, x0, e8, m1, d1 + ".4byte 0b00000000000000000111111011010111\n\t" + "mv %[vlenb], t4\n\t" + : [vlenb] "=3Dr"(vlenb) : : "memory", "t4"); + return vlenb; + } + + printf("WARNING: vector not supported\n"); + return 0; +} + int launch_test(char *next_program, int test_inherit, int xtheadvector) { char *exec_argv[4], *exec_envp[1]; diff --git a/tools/testing/selftests/riscv/vector/v_helpers.h b/tools/testi= ng/selftests/riscv/vector/v_helpers.h index 763cddfe26da..c538077f1195 100644 --- a/tools/testing/selftests/riscv/vector/v_helpers.h +++ b/tools/testing/selftests/riscv/vector/v_helpers.h @@ -5,4 +5,6 @@ bool is_xtheadvector_supported(void); =20 bool is_vector_supported(void); =20 +unsigned long get_vr_len(void); + int launch_test(char *next_program, int test_inherit, int xtheadvector); diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/too= ls/testing/selftests/riscv/vector/validate_v_ptrace.c new file mode 100644 index 000000000000..b64986b42270 --- /dev/null +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "kselftest_harness.h" +#include "v_helpers.h" + +volatile unsigned long chld_lock; + +TEST(ptrace_v_not_enabled) +{ + pid_t pid; + + if (!(is_vector_supported() || is_xtheadvector_supported())) + SKIP(return, "Vector not supported"); + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + asm volatile ("ebreak" : : : ); + } else { + struct __riscv_v_regset_state *regset_data; + unsigned long vlenb =3D get_vr_len(); + size_t regset_size; + struct iovec iov; + int status; + int ret; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* try to read vector registers from the tracee */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + /* V extension is available, but not yet enabled for the tracee */ + + errno =3D 0; + ret =3D ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov); + ASSERT_EQ(ENODATA, errno); + ASSERT_EQ(-1, ret); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + +TEST_HARNESS_MAIN --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 384DB261B98 for ; Sun, 14 Dec 2025 16:35:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730162; cv=none; b=r0N6sYKewzQvNPxqyA0Y420tJQf3FB0m5BdzxQtRYRC+bHlYXGV7Jl7WXG6x9SRorPWjnWjKKw52jqMNWPqiUkMMl4am9yHbYXOAJcggagHn4yDBcHfyoCU+m+tSk00V2Hv/ZRfqM1HPSatAnVKyJhc43LE6Mq41TGyt5fSR3pM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730162; c=relaxed/simple; bh=mu890xecCRo8W5w6MXFE4GMZMj6+R534p0jPUqy6CZU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=H6OZn0TQ7CbLNyvyH+Jw7C5msWaI5sTlk9F8jb73Pf6KnrAIWQIOz+XYv/OBFYXPcqWw4VKvNiJ4G+BR6nakYDuI9ncsTgoXfqqXS4bi8a49WCcEO4BXNUgr+M5gheCjYpXCxrway//wMI4DRB690QkL7I9AU7AM7+fwYc6txLE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=P704Pcd5; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="P704Pcd5" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-597de27b241so3377474e87.2 for ; Sun, 14 Dec 2025 08:35:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730157; x=1766334957; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rCjNPmJLrpJn3Ut2d1Tu4Faw1b2CRzQ8noRKY714zGA=; b=P704Pcd5R1dqJ36EvnqtexDcJM61QlHqvI7N/E7TmQoE6cPnQpvcYndmr3LZx/WiF1 CJl1Tm4LGi6HFEvHXAVlDR3jIPQp8VTb2uwATvHn/qlhAj9XQxAZQISGAPOhUdk09oDl QiqTyVftjpviBmE7Hktsf/1EXh0uBAJerg1YZMhCLlCQnxE0H9Jv17N9Vgr2rSISFNrv JCAie7fakhfx4JjFq8U0M6qTPuTlQBdvhJ+oqMN92/C80Jr7BupmKeTlDcp0OevEnH0I OVHfppItn33SZKgXornf3er2HmIi8t05Avm+gY1ZbxpJxMZ01qtufSMEunM0bJkPZMk0 /OsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730157; x=1766334957; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=rCjNPmJLrpJn3Ut2d1Tu4Faw1b2CRzQ8noRKY714zGA=; b=YiZnp0eftZOiBsWSwQmR9Xpd+/a29C/vDdBHigRYwtzxh2JP4khNPvnkYB/icRYCRL 4T1sCVzwT3sP9Fnv/UtlJj9h2Wcf+pKT8VzCqJA/3CQQTNGRHImKpUiVDeyagfdrWuAp Z+RNrCW6cKQ4RMRdYFr8caQNlJ+RWlLjr/K9AUSWtvX6oP2DcUPouLESWWUxcFj092uf ahrHcw0qOtmzqiU3DlyYuT5pgP6BPFoHS2vhiRGwsMdf8ZOqd7ejfGTHxusA0bqly1Qp MLF/I14TnnqmpnNjJgESOb+XppC/64hmslLtRZ2m6t+E05hExX34VNasyF2RPbXiVG0N 7ToQ== X-Forwarded-Encrypted: i=1; AJvYcCUoIR7UTiQQZ/b4syGm25rZgCtS3Z1tY5MRx0c56FYtJtq3+T1IDDgB3FPnC7qa7hhw8uwArOhoaAc0ZtY=@vger.kernel.org X-Gm-Message-State: AOJu0YxkQJRwiRbmBSCemQOVLoEMwwCWiBwwy5DlG7FS5kZD2kovDqEK AS9sYmqtj5aJ88Z5BaLPY6h7EjPG7vPBSIgJ9vYstPB11fPyS0ALS/oQ X-Gm-Gg: AY/fxX4qW7CptwSGJDJY3aGNz8zhBoZRdjZNDk3/2eZnQBipCiBJ2EgsH+wxY5p2g2s qqo4jB89mjufd+idrVVTZM/rqXNqG6frHdRbpGDWxqPnOUA79qpNjzAr0Z6RPAegbFYe4o6dvyn aIbdURC+vn9l1p6WwiPEqWsHevQxXgMHIIbnU8xWeBSrinwW3Qg+DUSxDYyB9V1K1lGVMM/OKdm uEPJ/gfPal7Vkk/LgOzMiFoDFe+333oFXxypYp8U12IndLr5ItAfTe73pLJi7aPMIDaEfDpn1WR XbOyHT4Zy0zYbede7+9rw/X7jnrG8Sll5wdHxx2kN99NZRpxrwu04UFVHaGJq99Mme0MRE2eyHn GU21lulM2DVfHEVYruT/8YRGhXqjQi1byFPrKLdIv2na7pfL8dET+DhJf1iPaFjAFn5Kd9nmtfV zMjw== X-Google-Smtp-Source: AGHT+IGRHdWeURxKMpbmL/T6K5rtF0X2VXcD24R+7mw/s+BE8VCrIbvP8MMR8nJUBe8utmaTLEJ33Q== X-Received: by 2002:a05:6512:3f26:b0:595:9195:3390 with SMTP id 2adb3069b0e04-598faa1499bmr2813865e87.5.1765730157035; Sun, 14 Dec 2025 08:35:57 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:56 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 6/9] selftests: riscv: verify initial vector state with ptrace Date: Sun, 14 Dec 2025 19:35:10 +0300 Message-ID: <20251214163537.1054292-7-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test case that attaches to a traced process immediately after its first executed vector instructions to verify the initial vector context. Signed-off-by: Sergey Matyukevich --- .../riscv/vector/validate_v_ptrace.c | 135 ++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/too= ls/testing/selftests/riscv/vector/validate_v_ptrace.c index b64986b42270..a8d64d351edd 100644 --- a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -13,6 +13,9 @@ #include "kselftest_harness.h" #include "v_helpers.h" =20 +#define SR_FS_DIRTY 0x00006000UL +#define CSR_VXRM_SHIFT 1 + volatile unsigned long chld_lock; =20 TEST(ptrace_v_not_enabled) @@ -77,4 +80,136 @@ TEST(ptrace_v_not_enabled) } } =20 +TEST(ptrace_v_early_debug) +{ + static volatile unsigned long vstart; + static volatile unsigned long vtype; + static volatile unsigned long vlenb; + static volatile unsigned long vcsr; + static volatile unsigned long vl; + bool xtheadvector; + pid_t pid; + + if (!(is_vector_supported() || is_xtheadvector_supported())) + SKIP(return, "Vector not supported"); + + xtheadvector =3D is_xtheadvector_supported(); + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + unsigned long vxsat, vxrm; + + vlenb =3D get_vr_len(); + + while (chld_lock =3D=3D 1) + asm volatile ("" : : "g"(chld_lock) : "memory"); + + asm volatile ( + "csrr %[vstart], vstart\n" + "csrr %[vtype], vtype\n" + "csrr %[vl], vl\n" + : [vtype] "=3Dr"(vtype), [vstart] "=3Dr"(vstart), [vl] "=3Dr"(vl) + : + : "memory"); + + /* no 'is_xtheadvector_supported()' here to avoid clobbering v-state by = syscall */ + if (xtheadvector) { + asm volatile ( + "csrs sstatus, %[bit]\n" + "csrr %[vxsat], vxsat\n" + "csrr %[vxrm], vxrm\n" + : [vxsat] "=3Dr"(vxsat), [vxrm] "=3Dr"(vxrm) + : [bit] "r" (SR_FS_DIRTY) + : "memory"); + vcsr =3D vxsat | vxrm << CSR_VXRM_SHIFT; + } else { + asm volatile ( + "csrr %[vcsr], vcsr\n" + : [vcsr] "=3Dr"(vcsr) + : + : "memory"); + } + + asm volatile ( + ".option push\n" + ".option norvc\n" + "ebreak\n" + ".option pop\n"); + } else { + struct __riscv_v_regset_state *regset_data; + unsigned long vstart_csr; + unsigned long vlenb_csr; + unsigned long vtype_csr; + unsigned long vcsr_csr; + unsigned long vl_csr; + size_t regset_size; + struct iovec iov; + int status; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace PEEKDATA */ + + errno =3D 0; + vstart_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vstart, NULL); + ASSERT_FALSE((errno !=3D 0) && (vstart_csr =3D=3D -1)); + + errno =3D 0; + vl_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vl, NULL); + ASSERT_FALSE((errno !=3D 0) && (vl_csr =3D=3D -1)); + + errno =3D 0; + vtype_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vtype, NULL); + ASSERT_FALSE((errno !=3D 0) && (vtype_csr =3D=3D -1)); + + errno =3D 0; + vcsr_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vcsr, NULL); + ASSERT_FALSE((errno !=3D 0) && (vcsr_csr =3D=3D -1)); + + errno =3D 0; + vlenb_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vlenb, NULL); + ASSERT_FALSE((errno !=3D 0) && (vlenb_csr =3D=3D -1)); + + /* read tracee csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb_csr * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* compare */ + + EXPECT_EQ(vstart_csr, regset_data->vstart); + EXPECT_EQ(vtype_csr, regset_data->vtype); + EXPECT_EQ(vlenb_csr, regset_data->vlenb); + EXPECT_EQ(vcsr_csr, regset_data->vcsr); + EXPECT_EQ(vl_csr, regset_data->vl); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA0562DAFBA for ; Sun, 14 Dec 2025 16:36:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730163; cv=none; b=vDHRm97EGM2+LIxCgP/IvpgXyt9oHqBmvaOE8Oj1KYRzCbdeqPLPhBtNFjbH3HzDEeuAA3O+WokLOmgNEbOE/59tNMoDFpqtOqDOwh2svdX519+bRMyvgVPWJoOM6zOK/ssGyLnOWNimKry5kxg+20t6Yi+pfCGDpEUWPrccJeo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730163; c=relaxed/simple; bh=2eEQZz/X3mmmeyYnUcAby+qiIw75bPh119bXdDlu4Ck=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Zkt8yeEdUMPWieZOlnAkdHt+436Jyh7X7Y4PMzSshkKCxYzZdEiu7RajgTCMSnn7llL+v+85epff3AIiXm9L9FHlDl6fVfqU3pqlEweL2+2mQ9RHckuTDFWFHOfDvE2Ru97JO1BBqtJFANGjdIGZ1bJ0zY6kT4So4ib+7mRnOFo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=iotPhTzD; arc=none smtp.client-ip=209.85.167.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iotPhTzD" Received: by mail-lf1-f44.google.com with SMTP id 2adb3069b0e04-5958931c9c7so3330296e87.2 for ; Sun, 14 Dec 2025 08:36:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730159; x=1766334959; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hLvTGAt1jf9FADXLFeMcoHBdGn1FeJvj5K58j/U4zDM=; b=iotPhTzDf6MQuvwre0i6+IZP3EbswUC92I3I4P5hwxugQMw1wECKpRqrC9zBO4cMtR IGjWuS8de3PUp3LZykeA/+/ygs4qCwtrc4oKDoyu1UgktOzo2fpnPB04+wGqMmb780rU IwWaaNDAiJFDlAo9FHWB1abSPxxrl8d9BCIqSaDJG7KKo+ax/SI+Z9JNDFVkK1krvbLT TqMisstm1ZU2zi0h3JZE/E3ix6x4u+E3YK4DVgFWyHK0n0kNpCErBD3ymDi6thRu9iLa fNJ839guX3MVVJ8amHAfAWR1XwLnXnWhZar4ZqEPtcy+4+tX0Tzmw5FBscR8lIzBj/CU fRqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730159; x=1766334959; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hLvTGAt1jf9FADXLFeMcoHBdGn1FeJvj5K58j/U4zDM=; b=EjpfKXskF5db5/7aYdI6FcQe4v9FunK/0Y8svXvAGVCxnQL9ykeB5VhSwJjT4SSu8I NRX6PVm8wHE7BwbBf0ENp3eThxtmI3keCqPxJpbQ2zVV0lS9P1UF6DkZEoKnwyJ/sET9 rNEWhESJxciqFS5b7RLgLVYG02R6gPZlfJ7TL/aa+VQc7Q8STO+7L/AJNJwty3cseJuf 2389xIdUo4nQ3OKs9XTwvVxPZma6ioAu+2T+ep3Xl5JZtIpIlXm9Jfz8tNzj6/pQi9Ii R/lm5U4JS9ha3DD6VXGMiOD4Mnb6JG8vu003D+C529zUboXR8umpe6ysffRWP7jFV1fM jhAQ== X-Forwarded-Encrypted: i=1; AJvYcCVeqQFW87b7+S90b+lQFgcSGIk3pdHhRH96wwDRyB8ifrWiR8WZHb1ex5U/wSsnXqGmiru/K11L6qJs6G8=@vger.kernel.org X-Gm-Message-State: AOJu0Yy9Y+J/t0y1m7ph6FaQ/UluapbVhAfll84HYINHbVpgptPP0Ed/ 8XJCdGCXmefo3M62NR+r7MW5c8VrDaX78ncd2cWFpCjIXP6v1LFZ9xtj X-Gm-Gg: AY/fxX5rxroX5xGEbKR/0ITLoB3z8ifwNZ1EUHJyrmDeRdOUOdfdUjZtcH90oWYfSm4 eWFp+JN1h/wEAaDkbhOEnovGmqJST9+9K85LSXlrGTMbyICUoVMhnbGdGaX3D3WhtvrLwWosBVU aIdaT1HX916WzYO7ovG4mk3mPW3vWFLfqwev1ikUhdKIxU0THS1Y/Y6hvoPT//H0O8MeDLT2nWe 8hM6Eb4RhDCWzU2xcyWxoaZSm08+rxPPmM5/Y+4zvL6ehBCBj1df/kTch6i40RmPzJmqaSwxdLw 3AYWiUqpcWhFyyAok7GK7jnO0yZo2cIDOn66sOwe8KGnpeZZi9qMpx3eZ0NfWf10jCc6fWnkGQO LuD2/q9mv6GM4az9ye0bYv/irM1OzSeeBlzOayIGrjZKMeUwLio76EPvOhyE7JOShaI5S2Ze1qE A02A== X-Google-Smtp-Source: AGHT+IEMgxSe+xOjvGBPNy2ALsapXgkNGgurTBHru15sXVWXKkYyH3kcS5UntnGJK/O/jOAOqloXjQ== X-Received: by 2002:a05:6512:1329:b0:594:522d:68f4 with SMTP id 2adb3069b0e04-598faa80f60mr2571650e87.28.1765730158483; Sun, 14 Dec 2025 08:35:58 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:57 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 7/9] selftests: riscv: verify syscalls discard vector context Date: Sun, 14 Dec 2025 19:35:11 +0300 Message-ID: <20251214163537.1054292-8-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test to v_ptrace test suite to verify that vector csr registers are clobbered on syscalls. Signed-off-by: Sergey Matyukevich --- .../riscv/vector/validate_v_ptrace.c | 124 ++++++++++++++++++ 1 file changed, 124 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/too= ls/testing/selftests/riscv/vector/validate_v_ptrace.c index a8d64d351edd..2dd0c727e520 100644 --- a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -212,4 +212,128 @@ TEST(ptrace_v_early_debug) } } =20 +TEST(ptrace_v_syscall_clobbering) +{ + pid_t pid; + + if (!is_vector_supported() && !is_xtheadvector_supported()) + SKIP(return, "Vector not supported"); + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + unsigned long vl; + + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + if (is_xtheadvector_supported()) { + asm volatile ( + // 0 | zimm[10:0] | rs1 | 1 1 1 | rd |1010111| vsetvli + // vsetvli t4, x0, e16, m2, d1 + ".4byte 0b00000000010100000111111011010111\n" + "mv %[new_vl], t4\n" + : [new_vl] "=3Dr" (vl) : : "t4"); + } else { + asm volatile ( + ".option push\n" + ".option arch, +zve32x\n" + "vsetvli %[new_vl], x0, e16, m2, tu, mu\n" + ".option pop\n" + : [new_vl] "=3Dr"(vl) : : ); + } + + while (1) { + asm volatile ( + ".option push\n" + ".option norvc\n" + "ebreak\n" + ".option pop\n"); + + sleep(0); + } + } else { + struct __riscv_v_regset_state *regset_data; + unsigned long vlenb =3D get_vr_len(); + struct user_regs_struct regs; + size_t regset_size; + struct iovec iov; + int status; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for the 1st ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify initial vsetvli settings */ + + if (is_xtheadvector_supported()) { + EXPECT_EQ(5UL, regset_data->vtype); + } else { + EXPECT_EQ(9UL, regset_data->vtype); + } + + EXPECT_EQ(regset_data->vlenb, regset_data->vl); + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(0UL, regset_data->vcsr); + + /* skip 1st ebreak, then resume and wait for the 2nd ebreak */ + + iov.iov_base =3D ®s; + iov.iov_len =3D sizeof(regs); + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)); + regs.pc +=3D 4; + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_PRSTATUS, &iov)); + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vtype using ptrace GETREGSET */ + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify that V state is illegal after syscall */ + + EXPECT_EQ((1UL << (__riscv_xlen - 1)), regset_data->vtype); + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(0UL, regset_data->vcsr); + EXPECT_EQ(0UL, regset_data->vl); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f50.google.com (mail-lf1-f50.google.com [209.85.167.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3977F2DBF45 for ; Sun, 14 Dec 2025 16:36:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730164; cv=none; b=p1l5ptli9xbYx6VW4Xz0fwV01Cts3XGOKXHT6jH1vJ155BnMRPE2s4GWxmJiTfg4RUPKD/fIIcYgy7kH9EdMSIO898Pr8TVIZh5BxLvoGAcsuugOQwPD8PUTrEv83EXs1OwH70NNjhxHXDBtuILZwslzdTCy7GnQdH9wvPo/k5Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730164; c=relaxed/simple; bh=uXBuV/Kp+/M1EvWrPQoks2W0wdPS5OvR+/7rNty1p0M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hFZCdHDOo0D3MRPrlk17EdUUaqJVwQH3BW46tHkgRmFv8XjFx+nU/luldLSAEsmWd2ARZeveFI7uSE3q8aXuCSbyGlOj52mpZaVCdIzF2zOSHuvEFr7fv/VEpm2sJ370l7KW/cRxxalV5ezuIihiPuye01lEkN82c5wJdpUwJpQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=QZ32tbVo; arc=none smtp.client-ip=209.85.167.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QZ32tbVo" Received: by mail-lf1-f50.google.com with SMTP id 2adb3069b0e04-5957c929a5eso3980218e87.1 for ; Sun, 14 Dec 2025 08:36:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730160; x=1766334960; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sQaSn0DLqOFOsA8M/K0su83gKd9Tn+v/MOGwCqXayKA=; b=QZ32tbVoRha+l52J30fqXRNw+iqvdU4NOyKrv98pV4cWgMgC2se4bdykDqDDesoWeI HDUTfpSMGOZ/pfvPgwu6eRVduNWd/rYhMBa0apA8gZIaL0VP8SFrKUoC2MsRAI/OzuOW TanWmTTOYSdAkmFoZZdyipQp5vhE7ZvBQKtCPHcfDHlZkKwUWmJb7dlNFNRu+BYJwULO NgSEpkfEjxPO27vJIY1DowASPKbJxZzMwKvznGaiAJSvgVlsWilkcHYOYWN0zlv4f1IU 2sF1TjlWSnHuupCuZBL08p9PMK79cImqGoYEkeFE1nf7aEXWVYm5h8OCTu4LApB6lDbf 4P/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730160; x=1766334960; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sQaSn0DLqOFOsA8M/K0su83gKd9Tn+v/MOGwCqXayKA=; b=DnASukcbQzSUYXhhin/9C9o/+DEw4b4iUfkxuDgzOchucPt6kGwetARDfomLvoZ0Ak 3qukcw6pTBTY8lROcqvnm8MNkATPHx7su9HYohMGsPz5/V8zOkjvY9z+rwOtAjEpztdu fWCC7b/sLRlN/jkTuwrRTtf+LNRcaxucnoG+J8WiHlU6aQHFN7mJGKgxCnhnFhKRVVa1 8dg+LeD5cvEbvEs9kxBpx2MBmXZ04FMQ3dp1gbzgIu0q8oZnO77ddNzAXTHarR6eHcCO d3vsDwx9mloe6Fc3dzsA2PRq1p/iF3OrG1B7wZBh4UOm/6pynZSiquEVyReK5ag8Mv7/ pNyA== X-Forwarded-Encrypted: i=1; AJvYcCUHJ6/ZftpEORmHEYsubC1wLGUY4nKeNkZVtOlGFJnNG1OoMX0Osq2uEfx0MDUq7Wf6dwK8IF+fmkCypPY=@vger.kernel.org X-Gm-Message-State: AOJu0YxlmK9wAZ5jHv4P2FRFoMYCuDGbqisilRRc7iIw3vq5uqLQwM1/ DC4ZoP2r2xirIniXmf9J8LH3kJEdnqcOxHsvuilMXrld+JeFsI9y/r1JTDf5P0ZV X-Gm-Gg: AY/fxX4Li/nhHj/ofPUkUGZF3rMxTp3mjLfynTCRJf0E7fr7tve9Ipawn2yDuAHzL3V bFyrx+WCd4Yo0f5Ap/J9ccBF4EJV1vEm+4zChyPcGlzGDFL6v3VP7MbiC48UdjxWwxibGJvN8J5 QDPJ4vz9Oq24ObnHbQKUTq4IUB2nqtAwjNpwIFDjyIbzdU8kWiSA9H/Q7sYGPGDAJHwV+Al8n+4 rTGc5OFWbcGu0RLn/oI1RmRT3syl3yCm/gyAnpVp7/7tTnUYHmrDSlqY80x4QpSDlKt/JJd8A18 X8UkCnbBleeKZ6MqtpqrLKXYsV+ADOOvOroVYWWavWAp3DyPvNMGtXY+PZ98w0umyEPh0NG+nBg P69/GCVOcJ34lCHJNln8rZM9Vau68XjqOwFt8TXe84Hzx0vmrC1UvEDD9EyTuNRhfNMDXEbeSMo tZaQ== X-Google-Smtp-Source: AGHT+IF2w7XngXI0Qr5uEUjrppLH+KRGrVaFiuWS6ITxuOpJgvkDn9nUFBqzNj2KkczyUIhqPar1hQ== X-Received: by 2002:a05:6512:3c95:b0:594:2a0f:916f with SMTP id 2adb3069b0e04-598faa9299amr2673562e87.43.1765730159952; Sun, 14 Dec 2025 08:35:59 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.35.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:35:59 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 8/9] selftests: riscv: verify ptrace rejects invalid vector csr inputs Date: Sun, 14 Dec 2025 19:35:12 +0300 Message-ID: <20251214163537.1054292-9-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test to v_ptrace test suite to verify that ptrace rejects the invalid input combinations of vector csr registers. Use kselftest fixture variants to create multiple invalid inputs for the test. Signed-off-by: Sergey Matyukevich --- .../riscv/vector/validate_v_ptrace.c | 318 ++++++++++++++++++ 1 file changed, 318 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/too= ls/testing/selftests/riscv/vector/validate_v_ptrace.c index 2dd0c727e520..623b13e7582e 100644 --- a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -336,4 +336,322 @@ TEST(ptrace_v_syscall_clobbering) } } =20 +FIXTURE(v_csr_invalid) +{ +}; + +FIXTURE_SETUP(v_csr_invalid) +{ +} + +FIXTURE_TEARDOWN(v_csr_invalid) +{ +} + +#define VECTOR_1_0 (1UL << 0) +#define XTHEAD_VECTOR_0_7 (1UL << 1) + +#define vector_test(x) ((x) & VECTOR_1_0) +#define xthead_test(x) ((x) & XTHEAD_VECTOR_0_7) + +/* modifications of the initial vsetvli settings */ +FIXTURE_VARIANT(v_csr_invalid) +{ + unsigned long vstart; + unsigned long vl; + unsigned long vtype; + unsigned long vcsr; + unsigned long vlenb_mul; + unsigned long vlenb_min; + unsigned long vlenb_max; + unsigned long spec; +}; + +/* unexpected vlenb value */ +FIXTURE_VARIANT_ADD(v_csr_invalid, new_vlenb) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x2, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0 | XTHEAD_VECTOR_0_7, +}; + +/* invalid reserved bits in vcsr */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vcsr_invalid_reserved_bits) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x3, + .vcsr =3D 0x1UL << 8, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0 | XTHEAD_VECTOR_0_7, +}; + +/* invalid reserved bits in vtype */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vtype_invalid_reserved_bits) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D (0x1UL << 8) | 0x3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0 | XTHEAD_VECTOR_0_7, +}; + +/* set vill bit */ +FIXTURE_VARIANT_ADD(v_csr_invalid, invalid_vill_bit) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D (0x1UL << (__riscv_xlen - 1)) | 0x3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0 | XTHEAD_VECTOR_0_7, +}; + +/* reserved vsew value: vsew > 3 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, reserved_vsew) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x4UL << 3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0, +}; + +/* XTheadVector: unsupported non-zero VEDIV value */ +FIXTURE_VARIANT_ADD(v_csr_invalid, reserved_vediv) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x3UL << 5, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D XTHEAD_VECTOR_0_7, +}; + +/* reserved vlmul value: vlmul =3D=3D 4 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, reserved_vlmul) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x4, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0, +}; + +/* invalid fractional LMUL for VLEN <=3D 256: LMUL=3D 1/8, SEW =3D 64 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, frac_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x1d, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x20, + .spec =3D VECTOR_1_0, +}; + +/* invalid integral LMUL for VLEN <=3D 16: LMUL=3D 2, SEW =3D 64 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, int_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x19, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x2, + .spec =3D VECTOR_1_0, +}; + +/* XTheadVector: invalid integral LMUL for VLEN <=3D 16: LMUL=3D 2, SEW = =3D 64 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, int_lmul2) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0xd, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x2, + .spec =3D XTHEAD_VECTOR_0_7, +}; + +/* invalid VL for VLEN <=3D 128: LMUL=3D 2, SEW =3D 64, VL =3D 8 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vl1) +{ + .vstart =3D 0x0, + .vl =3D 0x8, + .vtype =3D 0x19, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x10, + .spec =3D VECTOR_1_0, +}; + +/* XTheadVector: invalid VL for VLEN <=3D 128: LMUL=3D 2, SEW =3D 64, VL = =3D 8 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vl2) +{ + .vstart =3D 0x0, + .vl =3D 0x8, + .vtype =3D 0xd, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x10, + .spec =3D XTHEAD_VECTOR_0_7, +}; + +TEST_F(v_csr_invalid, ptrace_v_invalid_values) +{ + unsigned long vlenb; + pid_t pid; + + if (!is_vector_supported() && !is_xtheadvector_supported()) + SKIP(return, "Vectors not supported"); + + if (is_vector_supported() && !vector_test(variant->spec)) + SKIP(return, "Test not supported for Vector"); + + if (is_xtheadvector_supported() && !xthead_test(variant->spec)) + SKIP(return, "Test not supported for XTheadVector"); + + vlenb =3D get_vr_len(); + + if (variant->vlenb_min) { + if (vlenb < variant->vlenb_min) + SKIP(return, "This test does not support VLEN < %lu\n", + variant->vlenb_min * 8); + } + + if (variant->vlenb_max) { + if (vlenb > variant->vlenb_max) + SKIP(return, "This test does not support VLEN > %lu\n", + variant->vlenb_max * 8); + } + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + unsigned long vl; + + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + if (is_xtheadvector_supported()) { + asm volatile ( + // 0 | zimm[10:0] | rs1 | 1 1 1 | rd |1010111| vsetvli + // vsetvli t4, x0, e16, m2, d1 + ".4byte 0b00000000010100000111111011010111\n" + "mv %[new_vl], t4\n" + : [new_vl] "=3Dr" (vl) : : "t4"); + } else { + asm volatile ( + ".option push\n" + ".option arch, +zve32x\n" + "vsetvli %[new_vl], x0, e16, m2, tu, mu\n" + ".option pop\n" + : [new_vl] "=3Dr"(vl) : : ); + } + + while (1) { + asm volatile ( + ".option push\n" + ".option norvc\n" + "ebreak\n" + "nop\n" + ".option pop\n"); + } + } else { + struct __riscv_v_regset_state *regset_data; + size_t regset_size; + struct iovec iov; + int status; + int ret; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for the 1st ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify initial vsetvli settings */ + + if (is_xtheadvector_supported()) { + EXPECT_EQ(5UL, regset_data->vtype); + } else { + EXPECT_EQ(9UL, regset_data->vtype); + } + + EXPECT_EQ(regset_data->vlenb, regset_data->vl); + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(0UL, regset_data->vcsr); + + /* apply invalid settings from fixture variants */ + + regset_data->vlenb *=3D variant->vlenb_mul; + regset_data->vstart =3D variant->vstart; + regset_data->vtype =3D variant->vtype; + regset_data->vcsr =3D variant->vcsr; + regset_data->vl =3D variant->vl; + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + errno =3D 0; + ret =3D ptrace(PTRACE_SETREGSET, pid, NT_RISCV_VECTOR, &iov); + ASSERT_EQ(errno, EINVAL); + ASSERT_EQ(ret, -1); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.52.0 From nobody Tue Dec 16 07:33:20 2025 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98C6C2DFF19 for ; Sun, 14 Dec 2025 16:36:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730167; cv=none; b=cJvQiUbJVsRFI1MBfOlCDNdAec0HTSQEsbIAZg7eRM7NJ4ByAu6nKMl8ISRFiv4Duv3s8ECHwId9+VraYj0BPzMuan2fld9o838WGim+n3ebeFurhHaXv4psVDc5XU7G1LoT/AmtPafFyk9KNPzvNNSE+LW0YTPwoI61GcPDdaA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765730167; c=relaxed/simple; bh=Gydlh+iup8jO/aNYR3QKidyq5TZb43ybY4tjHG68HtI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gNHh+tHeVuWPUZmAH9Gey4Mto75EYWC8Hnfc0XG+7TVOq+l9YTnMw7gr0tf62N4ZlkaUOH2HVs8BlEYz1bdcCKo/iHYMsdoVeH2ftJmcvUvT2u0Aw19nfvN/2C4RYFbosLGU89+tz0QDGcWgm/PVWrhsTJtatsIvF5I21jojJHs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=R6szi1Mj; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R6szi1Mj" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-5943d20f352so3340181e87.0 for ; Sun, 14 Dec 2025 08:36:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1765730162; x=1766334962; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aH0zKZXb/Y5gUEGiokm3nZsvrljXzf5GckdYzZU3nLY=; b=R6szi1MjV1OHBCFh+l3noe1dFrVD+/r0+d80RXsLZsTdRqRDIXFSYsXUVt15UAfpCm jze/coo3wuviDGa4R9FNQIYF5jpn0a7BdpHC0h2Yp1MjQYWzzVtSjYyd+jrphklGvkIY tzzAyUh8PhjF4t4Oyq+HIss12WJWXdMC04m2sq+n7b5DzTarYGQTUNSXX/I6ffRlNTIT TqxAFCJYNMv+CUuTNZnVgy0R+THvW+2ZnOmPWrjfZVXPzxM6j6GwNAEe+6A7H0GCqwqA vDr8d1ZLNGx4mGsBkV9cnLg+DqfSmwru0MVzf20lK3Gt0FpotFAN6rHkkzUEmnlGzMpe Vzbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765730162; x=1766334962; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=aH0zKZXb/Y5gUEGiokm3nZsvrljXzf5GckdYzZU3nLY=; b=mRJrWkHp5NuD4bEz0itIRbv8jz7dbu4G5DWRcc+5wyWkDHYtmtzsbCBRRqI0+WKhgd ffQ1lw8iapCJ8uIDAQdQSMD7dFN9aLCE7gX/xk4yPRXjdJo88wIo38ykyAhSZ335X4A+ JiVNRhu1WVD+F7U2CjHtsXe62FxfNQpOiwDU1NKuqUaMafxV/V4OfrHhm/bSwPoQtBnh ny4NtxhjLR+1hXLoUtFWUZDs18ROcQm4LYt835GVxmecpHg/G8yGppPj0BaZPGvU2g+j E37Yd23/5rl5+HxyFxAiS1POScJ3D8StMA3Ny9wYkmkbDfZJeRpoBysvg2EYxwgIbZqS eKuQ== X-Forwarded-Encrypted: i=1; AJvYcCUEYrij6eZ3f4r1t0jIsymuM2pF8Qdmk+QGAD2Rk/KeSYIrxJkN+Oiag0NMC0i2/NrTu0ZHuyB6crvhLME=@vger.kernel.org X-Gm-Message-State: AOJu0YycXPORkhL+mrS1HhcPsHGlt2oprbmM+sY3PJYqZL22foIrno1H mlMLu+z58+3hbZHSmwVJKhV7pHqxHd+EofUbNRokpTqyy/m7FW2A+xJ+ X-Gm-Gg: AY/fxX5FJKsMOmfLK8JV3P6nNyyhUWVLqEypPWlb11EY7On0iVEeJThpaVvSAEiXZ5I 5tLC4DGme6QtaIQhRw7zETx3CI76qi3PckeO7hOcN4uJqpCyy5ExLE7yxVGvT95R/BkFByOwjWH hJVxkTxO0N728K/yvO8jSmnxQAThHL3bXZGBOzAObnG+vbh7WNlKNpJP2ib9QJuICeYl223ym/+ sJcQ03cJWbKIvt1PCXNw6wZkK1E0CgfytnOfrBPF9tTeVWssGLsVbmo12fFdkxu36wWdDrDcNqR fvf4dkjUQPky2FcR6NAjtD0V/aCcSaCumffYoS2vEb7qSPzczzdjnEOCUe4xfmpRp7EeDb/LCn1 il9SjaAKM4e3NjwDXk5HZf9dG2K9i4PfWLN6sdDeHbgy2T3taQHmZcmNwhktzvf9lpTufZVeQ8V 6tVa/EvmMNLLTl X-Google-Smtp-Source: AGHT+IGg2O6UbEA1J9//+XT5+Hs1atMO2Qc+sN+YnLd8rt1bcW3PK1V2c1Ri3kEauyeryHCL6gCzRg== X-Received: by 2002:a05:6512:3d05:b0:597:d5dc:b3e0 with SMTP id 2adb3069b0e04-598faa223bfmr2694122e87.10.1765730161456; Sun, 14 Dec 2025 08:36:01 -0800 (PST) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-598f7717b79sm3789618e87.60.2025.12.14.08.36.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Dec 2025 08:36:00 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Guo Ren , Sergey Matyukevich Subject: [PATCH v5 9/9] selftests: riscv: verify ptrace accepts valid vector csr values Date: Sun, 14 Dec 2025 19:35:13 +0300 Message-ID: <20251214163537.1054292-10-geomatsi@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251214163537.1054292-1-geomatsi@gmail.com> References: <20251214163537.1054292-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test to v_ptrace test suite to verify that ptrace accepts the valid input combinations of vector csr registers. Use kselftest fixture variants to create multiple inputs for the test. The test simulates a debug scenario with three breakpoints: 0. init: let the tracee set up its initial vector configuration 1. 1st bp: modify the tracee's vector csr registers from the debugger - resume the tracee to execute a block without vector instructions 2. 2nd bp: read back the tracees's vector csr registers from the debugger - compare with values set by the debugger - resume the tracee to execute a block with vector instructions 3. 3rd bp: read back the tracess's vector csr registers again - compare with values set by the debugger The last check helps to confirm that ptrace validation check for vector csr registers input values works properly and maintains an accurate view of the tracee's vector context in debugger. Signed-off-by: Sergey Matyukevich --- .../riscv/vector/validate_v_ptrace.c | 262 ++++++++++++++++++ 1 file changed, 262 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/too= ls/testing/selftests/riscv/vector/validate_v_ptrace.c index 623b13e7582e..c72533a331de 100644 --- a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -654,4 +654,266 @@ TEST_F(v_csr_invalid, ptrace_v_invalid_values) } } =20 +FIXTURE(v_csr_valid) +{ +}; + +FIXTURE_SETUP(v_csr_valid) +{ +} + +FIXTURE_TEARDOWN(v_csr_valid) +{ +} + +/* modifications of the initial vsetvli settings */ +FIXTURE_VARIANT(v_csr_valid) +{ + unsigned long vstart; + unsigned long vl; + unsigned long vtype; + unsigned long vcsr; + unsigned long vlenb_mul; + unsigned long vlenb_min; + unsigned long vlenb_max; + unsigned long spec; +}; + +/* valid for VLEN >=3D 128: LMUL=3D 1/4, SEW =3D 32 */ +FIXTURE_VARIANT_ADD(v_csr_valid, frac_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x16, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x10, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0, +}; + +/* valid for VLEN >=3D 16: LMUL=3D 2, SEW =3D 32 */ +FIXTURE_VARIANT_ADD(v_csr_valid, int_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x11, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x2, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0, +}; + +/* valid for XTheadVector VLEN >=3D 16: LMUL=3D 2, SEW =3D 32 */ +FIXTURE_VARIANT_ADD(v_csr_valid, int_lmul2) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x9, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x2, + .vlenb_max =3D 0x0, + .spec =3D XTHEAD_VECTOR_0_7, +}; + +/* valid for VLEN >=3D 32: LMUL=3D 2, SEW =3D 32, VL =3D 2 */ +FIXTURE_VARIANT_ADD(v_csr_valid, int_lmul3) +{ + .vstart =3D 0x0, + .vl =3D 0x2, + .vtype =3D 0x11, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x4, + .vlenb_max =3D 0x0, + .spec =3D VECTOR_1_0, +}; + +TEST_F(v_csr_valid, ptrace_v_valid_values) +{ + unsigned long vlenb; + pid_t pid; + + if (!is_vector_supported() && !is_xtheadvector_supported()) + SKIP(return, "Vectors not supported"); + + if (is_vector_supported() && !vector_test(variant->spec)) + SKIP(return, "Test not supported for Vector"); + + if (is_xtheadvector_supported() && !xthead_test(variant->spec)) + SKIP(return, "Test not supported for XTheadVector"); + + vlenb =3D get_vr_len(); + + if (variant->vlenb_min) { + if (vlenb < variant->vlenb_min) + SKIP(return, "This test does not support VLEN < %lu\n", + variant->vlenb_min * 8); + } + if (variant->vlenb_max) { + if (vlenb > variant->vlenb_max) + SKIP(return, "This test does not support VLEN > %lu\n", + variant->vlenb_max * 8); + } + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + unsigned long vl; + + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + if (is_xtheadvector_supported()) { + asm volatile ( + // 0 | zimm[10:0] | rs1 | 1 1 1 | rd |1010111| vsetvli + // vsetvli t4, x0, e16, m2, d1 + ".4byte 0b00000000010100000111111011010111\n" + "mv %[new_vl], t4\n" + : [new_vl] "=3Dr" (vl) : : "t4"); + } else { + asm volatile ( + ".option push\n" + ".option arch, +zve32x\n" + "vsetvli %[new_vl], x0, e16, m2, tu, mu\n" + ".option pop\n" + : [new_vl] "=3Dr"(vl) : : ); + } + + asm volatile ( + ".option push\n" + ".option norvc\n" + ".option arch, +zve32x\n" + "ebreak\n" /* breakpoint 1: apply new V state using ptrace */ + "nop\n" + "ebreak\n" /* breakpoint 2: V state clean - context will not be saved */ + "vmv.v.i v0, -1\n" + "ebreak\n" /* breakpoint 3: V state dirty - context will be saved */ + ".option pop\n"); + } else { + struct __riscv_v_regset_state *regset_data; + struct user_regs_struct regs; + size_t regset_size; + struct iovec iov; + int status; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for the 1st ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify initial vsetvli settings */ + + if (is_xtheadvector_supported()) { + EXPECT_EQ(5UL, regset_data->vtype); + } else { + EXPECT_EQ(9UL, regset_data->vtype); + } + + EXPECT_EQ(regset_data->vlenb, regset_data->vl); + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(0UL, regset_data->vcsr); + + /* apply valid settings from fixture variants */ + + regset_data->vlenb *=3D variant->vlenb_mul; + regset_data->vstart =3D variant->vstart; + regset_data->vtype =3D variant->vtype; + regset_data->vcsr =3D variant->vcsr; + regset_data->vl =3D variant->vl; + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* skip 1st ebreak, then resume and wait for the 2nd ebreak */ + + iov.iov_base =3D ®s; + iov.iov_len =3D sizeof(regs); + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)); + regs.pc +=3D 4; + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_PRSTATUS, &iov)); + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify vector csr regs from tracee context */ + + EXPECT_EQ(regset_data->vstart, variant->vstart); + EXPECT_EQ(regset_data->vtype, variant->vtype); + EXPECT_EQ(regset_data->vcsr, variant->vcsr); + EXPECT_EQ(regset_data->vl, variant->vl); + EXPECT_EQ(regset_data->vlenb, vlenb); + + /* skip 2nd ebreak, then resume and wait for the 3rd ebreak */ + + iov.iov_base =3D ®s; + iov.iov_len =3D sizeof(regs); + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)); + regs.pc +=3D 4; + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_PRSTATUS, &iov)); + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify vector csr regs from tracee context */ + + EXPECT_EQ(regset_data->vstart, variant->vstart); + EXPECT_EQ(regset_data->vtype, variant->vtype); + EXPECT_EQ(regset_data->vcsr, variant->vcsr); + EXPECT_EQ(regset_data->vl, variant->vl); + EXPECT_EQ(regset_data->vlenb, vlenb); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.52.0