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[72.48.10.44]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-65b35f4f923sm3899435eaf.7.2025.12.12.18.53.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Dec 2025 18:53:02 -0800 (PST) From: Ricky Ringler To: Chris Zankel , Max Filippov Cc: linux-kernel@vger.kernel.org, Ricky Ringler Subject: [PATCH] xtensa: align: validate user access in fast_load_store under MMU Date: Fri, 12 Dec 2025 20:52:51 -0600 Message-ID: <20251213025252.2574336-1-richard.rringler@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" fast_load_store aligns faulting address then reads two words with l32i. With CONFIG_MMU, bad user access can fault in this path. Replace arbitrary jump to .Linvalid_instruction with access_ok() to validate aligned address before loads and branch to .Linvalid_instruction on failure. a0: scratch. a2: sp. Matches existing usage in Xtensa entry.S. Tested-by: Ricky Ringler Testing: - Built Xtensa with CONFIG_MMU enabled - objdump before/after comparison and validated code path - Ran emulated Xtensa device with QEMU and manually triggered unaligned and aligned loads Signed-off-by: Ricky Ringler --- arch/xtensa/include/asm/asm-uaccess.h | 2 +- arch/xtensa/kernel/align.S | 9 ++++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/xtensa/include/asm/asm-uaccess.h b/arch/xtensa/include/as= m/asm-uaccess.h index 7cec869136e3..c5baa134d3d8 100644 --- a/arch/xtensa/include/asm/asm-uaccess.h +++ b/arch/xtensa/include/asm/asm-uaccess.h @@ -68,7 +68,7 @@ * register containing memory address * register containing memory size * temp register - * + * unused; ignored * label to branch to on error; implies fall-through * macro on success * On Exit: diff --git a/arch/xtensa/kernel/align.S b/arch/xtensa/kernel/align.S index ee97edce2300..808f9f843d33 100644 --- a/arch/xtensa/kernel/align.S +++ b/arch/xtensa/kernel/align.S @@ -21,6 +21,9 @@ #include #include #include +#ifdef CONFIG_MMU +#include +#endif =20 #if XCHAL_UNALIGNED_LOAD_EXCEPTION || defined CONFIG_XTENSA_LOAD_STORE #define LOAD_EXCEPTION_HANDLER @@ -178,15 +181,15 @@ ENTRY(fast_load_store) bbsi.l a4, OP1_SI_BIT + INSN_OP1, .Linvalid_instruction =20 1: - movi a3, ~3 + movi a3, ~3 and a3, a3, a8 # align memory address =20 __ssa8 a8 =20 #ifdef CONFIG_MMU /* l32e can't be used here even when it's available. */ - /* TODO access_ok(a3) could be used here */ - j .Linvalid_instruction + movi a5, 8 + access_ok a3, a5, a0, a2, .Linvalid_instruction #endif l32i a5, a3, 0 l32i a6, a3, 4 --=20 2.43.0