From nobody Sun Dec 14 11:18:45 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71B021CD15; Fri, 12 Dec 2025 01:56:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765504564; cv=none; b=EV9/QfMPqtrJTfDUeAdbpdrNhcNO4nYTFvkSetlw5xsH5/GuC9fFcddyxN8IeccqSdJ552B+EJziZaGx9OMsbfPEiZJNYVkDNzyJv4iNVSqRF1aiM/a99AT2KFcsbBMoqQ6NSmCyAVT3966+4mSOwftTqvuMJOz9qqrIOkWGXd4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765504564; c=relaxed/simple; bh=HBA0IM3ZKyr9TX+XP98IPKZlbKGhykUjQeFn1HuqFsc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=JzLN1blXwgiUMgnFioz8jqORm3CMlPYaWkOK9KFVqCQamyMDCa2mK0wGDojB9LuUGCEzCInP39eCiJkM3a8l3a67Ysr+FS7cT/WmNkctrQoYPycu0V4YZUYrn1mS5aXkdyjIa7iT53VNM0qjBejsjhqLZT3lxJG4XCDL2GIzU50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=GR7EyRlE; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="GR7EyRlE" X-UUID: b253a52ed6fd11f0b33aeb1e7f16c2b6-20251212 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sBN97zlc1zuJbM5gYgQtbCvVoaqupNsGh6L1SMzLNQ8=; b=GR7EyRlE8nISmr8py6N0xAJ1831LDIciJ1rCjat/BWYITJAckpe4nfSnupr+rZlH0CdMRAa8NdU0YGjcneQu6FxUAkqjzgY5VFXKtowH5zQXL3VAbwOJYXAIk1RXBzTE7g+uclWgqcKmaHnqHzAYA3AqewkHzEvYE+fIKJFtdBU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.6,REQID:f905e8d5-f738-4848-a1b0-87d9c83fb555,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:a9d874c,CLOUDID:68dead02-1fa9-44eb-b231-4afc61466396,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: b253a52ed6fd11f0b33aeb1e7f16c2b6-20251212 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 564307736; Fri, 12 Dec 2025 09:55:55 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.26; Fri, 12 Dec 2025 09:55:54 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1748.26 via Frontend Transport; Fri, 12 Dec 2025 09:55:53 +0800 From: Jianhua Lin To: , , , , , CC: , , , , , , , , , Jianhua Lin Subject: [PATCH 4/4] media: mediatek: jpeg: add compatible for MT8189 SoC Date: Fri, 12 Dec 2025 09:52:18 +0800 Message-ID: <20251212015218.4689-5-jianhua.lin@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20251212015218.4689-1-jianhua.lin@mediatek.com> References: <20251212015218.4689-1-jianhua.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" add jpeg decoder and encoder compatible for MT8189 SoC. Signed-off-by: Jianhua Lin --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index d08fe365cbb2..9ea8d8f56e9b 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1866,6 +1866,10 @@ static struct clk_bulk_data mt8173_jpeg_dec_clocks[]= =3D { { .id =3D "jpgdec" }, }; =20 +static struct clk_bulk_data mtk_jpeg_dec_clocks[] =3D { + { .id =3D "jpgdec" }, +}; + static const struct mtk_jpeg_variant mt8173_jpeg_drvdata =3D { .clks =3D mt8173_jpeg_dec_clocks, .num_clks =3D ARRAY_SIZE(mt8173_jpeg_dec_clocks), @@ -1897,6 +1901,38 @@ static const struct mtk_jpeg_variant mtk_jpeg_drvdat= a =3D { .multi_core =3D false, }; =20 +static const struct mtk_jpeg_variant mtk8189_jpegenc_drvdata =3D { + .clks =3D mtk_jpeg_clocks, + .num_clks =3D ARRAY_SIZE(mtk_jpeg_clocks), + .formats =3D mtk_jpeg_enc_formats, + .num_formats =3D MTK_JPEG_ENC_NUM_FORMATS, + .qops =3D &mtk_jpeg_enc_qops, + .irq_handler =3D mtk_jpeg_enc_irq, + .hw_reset =3D mtk_jpeg_enc_reset, + .m2m_ops =3D &mtk_jpeg_enc_m2m_ops, + .dev_name =3D "mtk-jpeg-enc", + .ioctl_ops =3D &mtk_jpeg_enc_ioctl_ops, + .out_q_default_fourcc =3D V4L2_PIX_FMT_YUYV, + .cap_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, + .support_34bit =3D true, +}; + +static const struct mtk_jpeg_variant mtk8189_jpegdec_drvdata =3D { + .clks =3D mtk_jpeg_dec_clocks, + .num_clks =3D ARRAY_SIZE(mtk_jpeg_dec_clocks), + .formats =3D mtk_jpeg_dec_formats, + .num_formats =3D MTK_JPEG_DEC_NUM_FORMATS, + .qops =3D &mtk_jpeg_dec_qops, + .irq_handler =3D mtk_jpeg_dec_irq, + .hw_reset =3D mtk_jpeg_dec_reset, + .m2m_ops =3D &mtk_jpeg_dec_m2m_ops, + .dev_name =3D "mtk-jpeg-dec", + .ioctl_ops =3D &mtk_jpeg_dec_ioctl_ops, + .out_q_default_fourcc =3D V4L2_PIX_FMT_JPEG, + .cap_q_default_fourcc =3D V4L2_PIX_FMT_YUV420M, + .support_34bit =3D true, +}; + static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata =3D { .formats =3D mtk_jpeg_enc_formats, .num_formats =3D MTK_JPEG_ENC_NUM_FORMATS, @@ -1936,6 +1972,14 @@ static const struct of_device_id mtk_jpeg_match[] = =3D { .compatible =3D "mediatek,mtk-jpgenc", .data =3D &mtk_jpeg_drvdata, }, + { + .compatible =3D "mediatek,mt8189-jpgenc", + .data =3D &mtk8189_jpegenc_drvdata, + }, + { + .compatible =3D "mediatek,mt8189-jpgdec", + .data =3D &mtk8189_jpegdec_drvdata, + }, { .compatible =3D "mediatek,mt8195-jpgenc", .data =3D &mtk8195_jpegenc_drvdata, --=20 2.45.2