From nobody Sun Dec 14 11:15:29 2025 Received: from SN4PR0501CU005.outbound.protection.outlook.com (mail-southcentralusazon11011019.outbound.protection.outlook.com [40.93.194.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A11C230FC13; Fri, 12 Dec 2025 07:59:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.194.19 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765526395; cv=fail; b=je45cj+1CPNG9U7VgWYoOzPZ74r158CxhAbtvg9/MlqXoLafrZ3/DVdgAabK/bkNatGl+REsr4DMfLkePBtTXLJWvoxGHvuZfxkaLfQG1js9emoIrHGNKOFC2gbgt+Rvj6BnlDTmQbrdtiPgMiMwxYQEjNPbaAMErh5XN+RUES0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765526395; c=relaxed/simple; bh=xAN4woqIXrhKqCpDsmtzoCL+uRodRN9h9QCPgxEdI+w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=JQGidB31SW7jBFL/0MfB0Ki4juq34EN0RFP+kGOKEB6TB31X8VToUWhUsIBc8agZkQZAWWX3UD1KNZ9umJUOFB8kfkJMCpZO6d+BVx+U969p6vHvTwNA/mYQTD+Vkxrbq4RtwVirj8ADqvWFaSr+iummBKQhG+VMEantDObyukI= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=duanIC9U; arc=fail smtp.client-ip=40.93.194.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="duanIC9U" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Y3WUs/+uCFQo5owC/jfJq5MV1PBKfiL7zIzrIjk0gHATviqGuyyXq+n9LEqMlsKTnt6jK+VmPtba2p0j+tCbDWKnKU6zTznyBs2r0hbPK8iM8qJQFdNJq9aJXCMpXPkhp6N3CthxPiH7qMOm9cSQl+0IF/putUOhZm9Lmqnq/yPsayvZIY/a5y0j8FIHOqWC2Iy7YiJe+SPMDO+Ggtr4fgn8IYaTT4cUamAnZIhf6FXPQYXAbTJ1TNDOWBfQ2iif/ZY8Vapr1VQwpekKbfyGOt+pEq5pCF1JgG0lhn2B5w0AnL21ZEbWWqfX9V96d2Nu2oMGtfLyPBynYwggNUWwOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=GLqaZNEUJAHGWqY4zDoGQZISBNThGLcN9aUGmxhxhms=; b=O4IWSJt7d+rqYU/OQDfQNa0NX16LxOtC6md+fasygo+YJBZENlNYmc5st3gv5tZj+eoXATDsGnz0SzCG/DdID/ou+pwJ6+Xf1CILxJseSA51NS5qz2+sPR2UCUi4mH2YR2zHVilOyK8Y5QFqQwTYRjpiUkxjnDumKXrtOl5u64N/2RcKUAjjS6u2RxQhbkP4G3F7LxUM1ceuovfPh3cbjOhH2Dp6trGqJhnxGZOHo+kW110wSE1hamL6LA6yNpA2V0nOFz0bG6RSeuaGvLDAFOwOFoxVOfh0dNqlfok67JvsJyE+ElKHrhjpek12VxWPW8VXaBvy7diNTjy1vS4rXw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=GLqaZNEUJAHGWqY4zDoGQZISBNThGLcN9aUGmxhxhms=; b=duanIC9UH4sQuyRNtcS6WuMww/8++bTJn0dR56LnU9800+q9idu+OTLMPvanHRX048c8lLAKauRdi6VycYYdZQkLiMMg2IbhZm8qRtN7jGeyv+sZRQP747fQCGS43yKn+PF5hsAaFKgzG1chjQ2Gi/ET6byWwe5nEF2vC+5xtUY= Received: from MN2PR04CA0010.namprd04.prod.outlook.com (2603:10b6:208:d4::23) by IA0PPFACF832414.namprd12.prod.outlook.com (2603:10b6:20f:fc04::bdf) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.10; Fri, 12 Dec 2025 07:59:48 +0000 Received: from BL02EPF00021F6E.namprd02.prod.outlook.com (2603:10b6:208:d4:cafe::12) by MN2PR04CA0010.outlook.office365.com (2603:10b6:208:d4::23) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9412.8 via Frontend Transport; Fri, 12 Dec 2025 07:59:47 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by BL02EPF00021F6E.mail.protection.outlook.com (10.167.249.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Fri, 12 Dec 2025 07:59:48 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Fri, 12 Dec 2025 01:59:45 -0600 From: "Yo-Jung Leo Lin (AMD)" Date: Fri, 12 Dec 2025 15:59:16 +0800 Subject: [PATCH v6 4/5] drm/amdgpu: add UMA allocation interfaces to sysfs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251212-vram-carveout-tuning-for-upstream-v6-4-50c02fd180c9@amd.com> References: <20251212-vram-carveout-tuning-for-upstream-v6-0-50c02fd180c9@amd.com> In-Reply-To: <20251212-vram-carveout-tuning-for-upstream-v6-0-50c02fd180c9@amd.com> To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet CC: , , , , "Tsao, Anson" , "Mario Limonciello (AMD) (kernel.org)" , "Yo-Jung Leo Lin (AMD)" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5664; i=Leo.Lin@amd.com; h=from:subject:message-id; bh=xAN4woqIXrhKqCpDsmtzoCL+uRodRN9h9QCPgxEdI+w=; b=owEBbQKS/ZANAwAKAV8XsZZKKe6GAcsmYgBpO8tiFHfJFYCqk2v9WfIHsqCQq3znPVsOFL5hR 8/PbeNZ8QaJAjMEAAEKAB0WIQQzqV4kW+yguuqHrw5fF7GWSinuhgUCaTvLYgAKCRBfF7GWSinu hvEiEACntsr5/3uB+25YKltcbnuwIDkij6DP1dZh1T5vftjaJnESQrvUW0p4MFpiyXf8LiPpW3d +dBevV9mzzHCox0kz8rEQNlCA7BWvZxnhMdXpuzJOLNoK2NuYewmcZIPeb4yWbYsCEgvY15mrfk QexqTyvfsMIcEGFQpCRIOhmo6VaAjzdJq3DO1aQn17PT62fx+NVCkF6irizIMtNmXvqidbI7rTi IYmgFaBYMj42ihVOC3xoB762BIbNOqaiMIaL8CsUQq6StUiaLSCGjFIV1qyVoyCZsFihOsKi77k pscgn91UTStg8UMBrvgFZvb+RHiWPqwjrkmkf3u+0Pra7VaZD4NbZP7PJQER1QY+w+HMGvCPUP1 W1kdcTD7VU4zw7FiWWC3KpeGUtue6YrNEUk9xBUxyAybKJIn0daTqrca+z7tao3kBT+Cmvsb8c5 IL+6ebC6gVSwDdUZUYl1a3exHyIkvhutOJyKI+KRsYN+wGZ8dHw24b0HJUVOKvWIvvBcuzREtoP k05jRODZVFLzwrGZ0Ctb+U/FimeZhpBKNqHISrjvCeNxZQo/h9dCWK451xMPt+fvc1ouh+2cU7F JUfgkP1OnC3yXYQKnIBqNT+0BZ5CjecZX6t/KYNPnjj46Qfc7jjQnW9x3HdvnR8FBcvI+rqG298 yqQppJDAz2OSCxQ== X-Developer-Key: i=Leo.Lin@amd.com; a=openpgp; fpr=33A95E245BECA0BAEA87AF0E5F17B1964A29EE86 X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6E:EE_|IA0PPFACF832414:EE_ X-MS-Office365-Filtering-Correlation-Id: 667a3a63-5343-4389-334f-08de39546c21 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|7416014|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?B?clA0QVNTUk4vdzJia2J0ejJzTzhTaEplaWgwaU9ZZFMxL25HeUFmQnhKWk9z?= =?utf-8?B?cnU3dGNXL0lJdVIzQWxMczhpUW9LOG9VdDVrTWRieWs1OTlDY2RqaEZwbzZm?= =?utf-8?B?WUxXenZCYk5RZGFhcDBBL3lRQXgxM0pibkJQWHFQbUZTcVlkWUxXZ0hTb3Qy?= =?utf-8?B?YVBsc0JtSjVjYk53QW1IcVFNZStKMDR4cjRSc2xabW9ZK3hhUy8zUTlwMnlN?= =?utf-8?B?RnZiTUIweDc1RXFFTjhnei8xMERTdCtnUzd2OXUvUnRoeEJnVUFYR1hqblNX?= =?utf-8?B?S1hmUGp4UGxzRWlEdmw5VzV0azFYdlFsUVJ1Q2xKeWduTjdoZDlEVEgzb0pm?= =?utf-8?B?Q1BqQzFKbzBRdjM5RHZ3Rk9BRjh4TkFiV1dnQ1RKQXhubTlsMTBDRmhjaFVE?= =?utf-8?B?aDBwbEI3UGFIbzhkTUg1WmZndVlCL3RjK25oU09qMjBzQ3ZSMm41dVEwT1N5?= =?utf-8?B?T1lsOFpyMmhhTXNreStTSURxNXdzYkVNekFYZzV1Zy9KOTNDWjQ4Y05GSUQ3?= =?utf-8?B?SGU0TzZXMXdqTFNIRWQxTU5BRjVScmNaQ1czUVg5KzNqazdMc3kwV1ZzTWE0?= =?utf-8?B?NEprdEVTWmNxTUdpNGVuL3crc0FoUHZ2Yll6MFc0R2lYRUd2Y01qU1J5ZVlY?= =?utf-8?B?U2xTWHV2SjZQZmJLWnR4NWc3b3A2UnU5N1hzdmF1YnJZMG5NYUxadUZqUnJm?= =?utf-8?B?UWJtcm5SR21wOTVhNkg3SFJQeWs2VXNkRTU4NXZGRFRJc2FVZWMyaUxGOTRa?= =?utf-8?B?cTdpUmxMYXpGa2pCQlJvQTJmOXR2K3hTV1dDaTVNbFZOUjcrcmJScWNGQ3Rs?= =?utf-8?B?bjhJRjlCS1NYVEtNeWdhL29FTGZjVjM3OHIwOElCeXRVNE51VXVsckMrTkJZ?= =?utf-8?B?NkVkWkRiWHZWME9oRjllRFlCSUxoWjZaSXR1cTl4SGNOVWJNWnNLWktqa1ND?= =?utf-8?B?YjlOZnBGZTlEZ1JUUFo2enRrUXcvQ0RjTXYxZERCV3NaSWZma0dmamZWWlgv?= =?utf-8?B?SzdHS3dCcWRLWGlxOWRvY2VZUWlUR2dlUWZrYlIrMktibGk4c3F6QVlxNzRB?= =?utf-8?B?SGtFQlBjNnZyOFB6UUE2M2YyL0Zha2d3Vi9XZTByZzdhMlZMV05yWEFES3hL?= =?utf-8?B?a1Y0emo1VHl6cjl5ZU1QQWV6RE9zTDZtYjE5TGtydFUvcG9peFVva0czdjJW?= =?utf-8?B?NkJZSS9QcW1qSUozUlJlbEkydXRXVjdseVJxcDk3WnpNNExPWVVrMzIyN3o3?= =?utf-8?B?aDVnYVZMMEU2blI5WWZiTlprWHZhblFFdXIzK1EzaFZDcUkrUlhUS2NGZ3pJ?= =?utf-8?B?djFaYWplclJEOVJmUnJsRmVxb0xNU0R2STZIZ2FlWThXOFdEWmJ4ZkU3ZS83?= =?utf-8?B?TTVsTlREVmpscGU1TW5ybHZteUl5S1lLKzJ0MVJvNTFtUG4zMHQwUk1tQW0y?= =?utf-8?B?bEJJQVp5YmlBa2xkRkNPZ0F6UXFFK1g4SG9tTmVROXRtM0xFM3VDNzN6emU5?= =?utf-8?B?dzIrUThqMmJQaFNvMXAxVHBJZjRrUUlteU03MWp0dlV3U3lQdXpEMmx2T0ky?= =?utf-8?B?d0tqdnRleXJWRkxKU1FXOTQ1M0tuci9wRjZZMHdVcTZPbWVlTTJsR3lNcno4?= =?utf-8?B?djBiRFJ5Ykl5QW1JRktnNFcxYmw2TVg3dzBNajZkZWk5Z1NDOXQ2a0x6dXBL?= =?utf-8?B?SDR5d1B5WUtOQU05NVpwSXh2ZHRrTnh0NXN6OHpaWTlVQUtoQWprazJGUGhp?= =?utf-8?B?SytucVBEV3U1U0F6Z1lzWFB1VSsrNDgzVFZ0dC9STElDVlMyM0lBRksrcFEy?= =?utf-8?B?RVJWV2V6RWNwRm9oUVA3bk9INjZGWDUzYnVCNWZqM2EyallGZ3N2OFJzZDhM?= =?utf-8?B?RTYyTW9CQWQwajFUbjJheXZFUUhPYWI3UGNWQW9mNzd1REtuRFBpeGJ2TWpq?= =?utf-8?B?MVFBc1BBemtrZENRc2g5RmsyVW5TLzZWNFBhMEcxeHpLNUtBM1kvVE9YeEs0?= =?utf-8?B?UDdxbGV6SWJ4cEd0RXo3dmtUTUZhb2FvcyttQXhXS1RWNnZIZi9sYURVUVhj?= =?utf-8?B?RGU4YkJJVmpybDJWZzRuRnNMMjJXVWRFeGVjSVVuU0pSVGVFUXNtNXprOThw?= =?utf-8?Q?PSVI=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(7416014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Dec 2025 07:59:48.6902 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 667a3a63-5343-4389-334f-08de39546c21 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PPFACF832414 Add a uma/ directory containing two sysfs files as interfaces to inspect or change UMA carveout size. These files are: - uma/carveout_options: a read-only file listing all the available UMA allocation options and their index. - uma/carveout: a file that is both readable and writable. On read, it shows the index of the current setting. Writing a valid index into this file allows users to change the UMA carveout size to that option on the next boot. Co-developed-by: Mario Limonciello (AMD) Signed-off-by: Mario Limonciello (AMD) Reviewed-by: Alex Deucher Signed-off-by: Yo-Jung Leo Lin (AMD) --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 143 +++++++++++++++++++++++++= ++++ 1 file changed, 143 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_device.c index 903c4706040d..e78e6982312c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -36,6 +36,7 @@ #include #include #include +#include =20 #include #include @@ -417,6 +418,146 @@ static const struct attribute_group amdgpu_board_attr= s_group =3D { .is_visible =3D amdgpu_board_attrs_is_visible }; =20 +static ssize_t carveout_options_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct drm_device *ddev =3D dev_get_drvdata(dev); + struct amdgpu_device *adev =3D drm_to_adev(ddev); + struct amdgpu_uma_carveout_info *uma_info =3D &adev->uma_info; + uint32_t memory_carved; + ssize_t size =3D 0; + + if (!uma_info || !uma_info->num_entries) + return -ENODEV; + + for (int i =3D 0; i < uma_info->num_entries; i++) { + memory_carved =3D uma_info->entries[i].memory_carved_mb; + if (memory_carved >=3D SZ_1G/SZ_1M) { + size +=3D sysfs_emit_at(buf, size, "%d: %s (%u GB)\n", + i, + uma_info->entries[i].name, + memory_carved >> 10); + } else { + size +=3D sysfs_emit_at(buf, size, "%d: %s (%u MB)\n", + i, + uma_info->entries[i].name, + memory_carved); + } + } + + return size; +} +static DEVICE_ATTR_RO(carveout_options); + +static ssize_t carveout_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct drm_device *ddev =3D dev_get_drvdata(dev); + struct amdgpu_device *adev =3D drm_to_adev(ddev); + + return sysfs_emit(buf, "%u\n", adev->uma_info.uma_option_index); +} + +static ssize_t carveout_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct drm_device *ddev =3D dev_get_drvdata(dev); + struct amdgpu_device *adev =3D drm_to_adev(ddev); + struct amdgpu_uma_carveout_info *uma_info =3D &adev->uma_info; + struct amdgpu_uma_carveout_option *opt; + unsigned long val; + uint8_t flags; + int r; + + r =3D kstrtoul(buf, 10, &val); + if (r) + return r; + + if (val >=3D uma_info->num_entries) + return -EINVAL; + + val =3D array_index_nospec(val, uma_info->num_entries); + opt =3D &uma_info->entries[val]; + + if (!(opt->flags & AMDGPU_UMA_FLAG_AUTO) && + !(opt->flags & AMDGPU_UMA_FLAG_CUSTOM)) { + drm_err_once(ddev, "Option %lu not supported due to lack of Custom/Auto = flag", val); + return -EINVAL; + } + + flags =3D opt->flags; + flags &=3D ~((flags & AMDGPU_UMA_FLAG_AUTO) >> 1); + + guard(mutex)(&uma_info->update_lock); + + r =3D amdgpu_acpi_set_uma_allocation_size(adev, val, flags); + if (r) + return r; + + uma_info->uma_option_index =3D val; + + return count; +} +static DEVICE_ATTR_RW(carveout); + +static struct attribute *amdgpu_uma_attrs[] =3D { + &dev_attr_carveout.attr, + &dev_attr_carveout_options.attr, + NULL +}; + +const struct attribute_group amdgpu_uma_attr_group =3D { + .name =3D "uma", + .attrs =3D amdgpu_uma_attrs +}; + +static void amdgpu_uma_sysfs_init(struct amdgpu_device *adev) +{ + int rc; + + if (!(adev->flags & AMD_IS_APU)) + return; + + if (!amdgpu_acpi_is_set_uma_allocation_size_supported()) + return; + + rc =3D amdgpu_atomfirmware_get_uma_carveout_info(adev, &adev->uma_info); + if (rc) { + drm_dbg(adev_to_drm(adev), + "Failed to parse UMA carveout info from VBIOS: %d\n", rc); + goto out_info; + } + + mutex_init(&adev->uma_info.update_lock); + + rc =3D devm_device_add_group(adev->dev, &amdgpu_uma_attr_group); + if (rc) { + drm_dbg(adev_to_drm(adev), "Failed to add UMA carveout sysfs interfaces = %d\n", rc); + goto out_attr; + } + + return; + +out_attr: + mutex_destroy(&adev->uma_info.update_lock); +out_info: + return; +} + +static void amdgpu_uma_sysfs_fini(struct amdgpu_device *adev) +{ + struct amdgpu_uma_carveout_info *uma_info =3D &adev->uma_info; + + if (!amdgpu_acpi_is_set_uma_allocation_size_supported()) + return; + + mutex_destroy(&uma_info->update_lock); + uma_info->num_entries =3D 0; +} + static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev); =20 /** @@ -4492,6 +4633,7 @@ static int amdgpu_device_sys_interface_init(struct am= dgpu_device *adev) amdgpu_fru_sysfs_init(adev); amdgpu_reg_state_sysfs_init(adev); amdgpu_xcp_sysfs_init(adev); + amdgpu_uma_sysfs_init(adev); =20 return r; } @@ -4507,6 +4649,7 @@ static void amdgpu_device_sys_interface_fini(struct a= mdgpu_device *adev) =20 amdgpu_reg_state_sysfs_fini(adev); amdgpu_xcp_sysfs_fini(adev); + amdgpu_uma_sysfs_fini(adev); } =20 /** --=20 2.43.0