From nobody Sun Feb 8 00:50:15 2026 Received: from mail-wm1-f73.google.com (mail-wm1-f73.google.com [209.85.128.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22A731FE44A for ; Thu, 11 Dec 2025 13:18:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765459129; cv=none; b=a8GQsWsigx40rUeLFf9Zih/deTesP6HL1Lke6Vu5OCabjqs/BKX4VxObHfmS/QHuKyvJ/aG+cK2sqMobF3zPgBYL4euvOLAs0AyKbpxgtrcDKU0eLuAc7PYLttgNtZuoadktaFi/oUo0AZAEYxpNowNXJ3XjzXwyE2FEv8N94SY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765459129; c=relaxed/simple; bh=ATQjRK+44UuDq3xcHATwC3hMr4lSUfXqatHKxvQB1pw=; h=Date:Mime-Version:Message-ID:Subject:From:To:Cc:Content-Type; b=R76hC4g5nTUv/n2DKZJHyqOhlUp3W19YwIKTstaTFAiCK0aRU5DWH2BrO9vXJae5z9Bna2cuDy3BNqSGd6NKLyqXLHe2162wfuVYATT2yx8HLzvBpNI7Bwbn2hHoYSij3P59Lfi55bPWfS0ZmutnAN1QV+34twrSbRsE1KoAD0w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=CpSsfupO; arc=none smtp.client-ip=209.85.128.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="CpSsfupO" Received: by mail-wm1-f73.google.com with SMTP id 5b1f17b1804b1-47775585257so601215e9.1 for ; Thu, 11 Dec 2025 05:18:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1765459126; x=1766063926; darn=vger.kernel.org; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=fCP4+P1Uat64E8FLxH7dgYB4wgA5K2BDbEnRT5pBDjU=; b=CpSsfupOhCH7eEVHl9g4s0F0qBHw1PpQ/NC1aU6px1V7UZYtNl70FqBz+4CWqC7J62 Sm4F2RDxFis/ziMHYTgrk/N0mXez2TiMDG6PrX0Vt3+PNzeoCbPf8azjUszg4ySvdwjB vCjpml6Im566iJw+T74ZfGTNnMLoAMFL6zHiR5Iobp0d+RHchyncRL4Zo2VgOJX0bQiX IZD3y6TPfeAejuteIkEArwVsvNiTERsloS5nAaf30ds7SBojqRnv03pWtd+Vzjzl1Y5d Qt7wiL8aU03uCxsDrjM1kv9E4/kFGhRAfcceVM74qVHnEYRWZ9B1QMz4pLGLEOMRE78O jYkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765459126; x=1766063926; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=fCP4+P1Uat64E8FLxH7dgYB4wgA5K2BDbEnRT5pBDjU=; b=UTw2Mlkb7lQ371sU0RjFBw+/fGyGTebVWZML+O9dfiQI58n5zatsipb85yRvXyIqcf 4zSWsEt8wJRGV2lNg4JzTXFUj/EJOhGzmh4VWe072CadMDhdKOSfqxcUUhmpeWrKesvS AOL5kIbieyRtYeawX/ptABuSd8DgWmEcx5tWXu5RlAnySMo6JGXz85lElj7fbPspUKET k7YwHGNN+uALtWbEiEXLZGETE9HsAP/lbEZ5HncrF3VVNrIiAu97WJ9o7LvM6YrJ+Ht3 5JBggahY680W74dAxvi9QYLjfgfU9XBGPbs1YfdY5SbHKweZGMbdFtQTfCosYVZY8hhd sQqg== X-Forwarded-Encrypted: i=1; AJvYcCVZIS/SfpZ1mpZXeL26KOT3sj6y/DqH1tQD/HpRhR8Pm4ZSq7XGADN3GeMhORQ1IH2eyLBWpHNZDjOSTsU=@vger.kernel.org X-Gm-Message-State: AOJu0Yzd2oPU2lzi3w7MWTPkcEWxi+vDTfqCgxUh1Tm+yd+oGGM2/VaA O7uoD6udAU2b95yMU/j26rXlwdm2okZnjs0I1xwcd8HMpJvBOqbG8FfWjWBf/0wwvaUmjWYs6pf v+H+n2n8U9q4KUw== X-Google-Smtp-Source: AGHT+IHxQzCKoPeh6QNrsoFvProfgVB+npSZJAPrg1Gr3F0q1Y23acQghLVWzGrQIXSd6SL6PIvTg2IKVEi2Kg== X-Received: from wmgp17.prod.google.com ([2002:a05:600c:2051:b0:477:9b36:954d]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:1389:b0:471:1765:839c with SMTP id 5b1f17b1804b1-47a8383c89amr54081315e9.20.1765459126513; Thu, 11 Dec 2025 05:18:46 -0800 (PST) Date: Thu, 11 Dec 2025 13:18:35 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.52.0.223.gf5cc29aaa4-goog Message-ID: <20251211131835.3267022-1-smostafa@google.com> Subject: [PATCH] iommu/arm-smmu-v3: Remove IAS From: Mostafa Saleh To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, Mostafa Saleh , Tomasz Nowicki Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The driver only supports AArch64 page tables where OAS =3D=3D IAS. Remove the extra IAS tracking for AArch32 as this feature was never implemented and that was creating BAD_STEs for SMMUv3 with stage-2 and OAS < 40. Further discussion on this in: https://lore.kernel.org/linux-iommu/20251130194506.593700-1-smostafa@google= .com/ Reported-by: Tomasz Nowicki Fixes: f0c453dbcce7 ("iommu/arm-smmu: Ensure IAS is set correctly for AArch= 32-capable SMMUs") Signed-off-by: Mostafa Saleh --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 +++++------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 -- 2 files changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index d16d35c78c06..019211db621d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2551,7 +2551,7 @@ static int arm_smmu_domain_finalise(struct arm_smmu_d= omain *smmu_domain, ARM_SMMU_FEAT_VAX) ? 52 : 48; =20 pgtbl_cfg.ias =3D min_t(unsigned long, ias, VA_BITS); - pgtbl_cfg.oas =3D smmu->ias; + pgtbl_cfg.oas =3D smmu->oas; if (enable_dirty) pgtbl_cfg.quirks |=3D IO_PGTABLE_QUIRK_ARM_HD; fmt =3D ARM_64_LPAE_S1; @@ -2561,7 +2561,7 @@ static int arm_smmu_domain_finalise(struct arm_smmu_d= omain *smmu_domain, case ARM_SMMU_DOMAIN_S2: if (enable_dirty) return -EOPNOTSUPP; - pgtbl_cfg.ias =3D smmu->ias; + pgtbl_cfg.ias =3D smmu->oas; pgtbl_cfg.oas =3D smmu->oas; fmt =3D ARM_64_LPAE_S2; finalise_stage_fn =3D arm_smmu_domain_finalise_s2; @@ -4395,13 +4395,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_= device *smmu) } =20 /* We only support the AArch64 table format at present */ - switch (FIELD_GET(IDR0_TTF, reg)) { - case IDR0_TTF_AARCH32_64: - smmu->ias =3D 40; - fallthrough; - case IDR0_TTF_AARCH64: - break; - default: + if (!(FIELD_GET(IDR0_TTF, reg) & IDR0_TTF_AARCH64)) { dev_err(smmu->dev, "AArch64 table format not supported!\n"); return -ENXIO; } @@ -4514,8 +4508,6 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_d= evice *smmu) dev_warn(smmu->dev, "failed to set DMA mask for table walker\n"); =20 - smmu->ias =3D max(smmu->ias, smmu->oas); - if ((smmu->features & ARM_SMMU_FEAT_TRANS_S1) && (smmu->features & ARM_SMMU_FEAT_TRANS_S2)) smmu->features |=3D ARM_SMMU_FEAT_NESTING; @@ -4525,8 +4517,8 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_d= evice *smmu) if (arm_smmu_sva_supported(smmu)) smmu->features |=3D ARM_SMMU_FEAT_SVA; =20 - dev_info(smmu->dev, "ias %lu-bit, oas %lu-bit (features 0x%08x)\n", - smmu->ias, smmu->oas, smmu->features); + dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", + smmu->oas, smmu->features); return 0; } =20 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index ae23aacc3840..0a5bb57dbdfe 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -43,7 +43,6 @@ struct arm_vsmmu; #define IDR0_COHACC (1 << 4) #define IDR0_TTF GENMASK(3, 2) #define IDR0_TTF_AARCH64 2 -#define IDR0_TTF_AARCH32_64 3 #define IDR0_S1P (1 << 1) #define IDR0_S2P (1 << 0) =20 @@ -784,7 +783,6 @@ struct arm_smmu_device { int gerr_irq; int combined_irq; =20 - unsigned long ias; /* IPA */ unsigned long oas; /* PA */ unsigned long pgsize_bitmap; =20 --=20 2.52.0.223.gf5cc29aaa4-goog