From nobody Tue Dec 16 18:20:40 2025 Received: from sg-1-100.ptr.blmpb.com (sg-1-100.ptr.blmpb.com [118.26.132.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 387771EDA3C for ; Thu, 11 Dec 2025 04:01:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=118.26.132.100 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765425679; cv=none; b=bNBsKcMjljNK0qeeIiWSFsD2CyAT1pyGm1C7ivtkuHHPoctKiBnNI35o2iCkJuPdnoV+7iUQxFMxEBAPLdU51LBNrvc2QpHvGctBXmHCtBOw1FTob/Z6Am+Sb5TxkYm6FHV2yqolK+UzG20mRbN+2I/4khbkktpPXitaJd30H98= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765425679; c=relaxed/simple; bh=YLYEDjr9BARQJKDs0AJ02wHXxDH/0e54bhQ5m3csN/8=; h=In-Reply-To:Message-Id:Content-Type:From:Date:Mime-Version:To: Subject:References:Cc; b=RAOzUTM+KfXL3CmKmAMh/KSRyunX/8ZG1aI2z5Spu7eQ0XLX/0BXttN5anyAqUpK1nKvb0lJq6mqsEGn30NeuMqzWEH/fnFVzvB1EDYcbb6HKUAnvy2gQabYfyQAf0h0UrbABhIvkIdU91K3H7urpRFpugx0+IYMrrlmCNZM6WU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com; spf=pass smtp.mailfrom=bytedance.com; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b=UAlCkc1R; arc=none smtp.client-ip=118.26.132.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bytedance.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b="UAlCkc1R" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=2212171451; d=bytedance.com; t=1765425670; h=from:subject: mime-version:from:date:message-id:subject:to:cc:reply-to:content-type: mime-version:in-reply-to:message-id; bh=Bq8ab0zHhsOjIIhAgkxl/qyhdnfVtDC5vvSoEbjEKfs=; b=UAlCkc1RDbWLn0ChE5aIB2QHxnWtIiEFCnvQlSZkvAIaoOd7RrnKw59sAsTdiyAMtxGxGf P0Qg0by+RyUA1xMilNkTirDRAlTLjx0RmmIvqvRARfDdS1LA2uNvXTb0yJKQRmE0sxuhb7 KeZrCa7GbXScz3B4pfJvwX26Ib96OXySwjManp4MO14kKSI+K0wu3ZuBj8jR29PiNsdYPs ef+JoOelhlMnuH5TL4hTs8UosHZLfJ7/Sjbw2e6lmrJAGot6u2YgCXfM+koRJ6cGG1btyp AKwHaTInzcn40ffYyPgDyEjhbXUK9Ng/NLFbA+E7v6bWNqxL4oxlXyHb1eBw/A== In-Reply-To: <20251211035946.2071-1-guojinhui.liam@bytedance.com> Content-Transfer-Encoding: quoted-printable Message-Id: <20251211035946.2071-2-guojinhui.liam@bytedance.com> X-Mailer: git-send-email 2.17.1 From: "Jinhui Guo" Date: Thu, 11 Dec 2025 11:59:45 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Original-From: Jinhui Guo To: , , , Subject: [PATCH v2 1/2] iommu/vt-d: Skip dev-iotlb flush for inaccessible PCIe device without scalable mode References: <20251211035946.2071-1-guojinhui.liam@bytedance.com> Cc: , , , X-Lms-Return-Path: Content-Type: text/plain; charset="utf-8" PCIe endpoints with ATS enabled and passed through to userspace (e.g., QEMU, DPDK) can hard-lock the host when their link drops, either by surprise removal or by a link fault. Commit 4fc82cd907ac ("iommu/vt-d: Don't issue ATS Invalidation request when device is disconnected") adds pci_dev_is_disconnected() to devtlb_invalidation_with_pasid() so ATS invalidation is skipped only when the device is being safely removed, but it applies only when Intel IOMMU scalable mode is enabled. With scalable mode disabled or unsupported, a system hard-lock occurs when a PCIe endpoint's link drops because the Intel IOMMU waits indefinitely for an ATS invalidation that cannot complete. Call Trace: qi_submit_sync qi_flush_dev_iotlb __context_flush_dev_iotlb.part.0 domain_context_clear_one_cb pci_for_each_dma_alias device_block_translation blocking_domain_attach_dev iommu_deinit_device __iommu_group_remove_device iommu_release_device iommu_bus_notifier blocking_notifier_call_chain bus_notify device_del pci_remove_bus_device pci_stop_and_remove_bus_device pciehp_unconfigure_device pciehp_disable_slot pciehp_handle_presence_or_link_change pciehp_ist Commit 81e921fd3216 ("iommu/vt-d: Fix NULL domain on device release") adds intel_pasid_teardown_sm_context() to intel_iommu_release_device(), which calls qi_flush_dev_iotlb() and can also hard-lock the system when a PCIe endpoint's link drops. Call Trace: qi_submit_sync qi_flush_dev_iotlb __context_flush_dev_iotlb.part.0 intel_context_flush_no_pasid device_pasid_table_teardown pci_pasid_table_teardown pci_for_each_dma_alias intel_pasid_teardown_sm_context intel_iommu_release_device iommu_deinit_device __iommu_group_remove_device iommu_release_device iommu_bus_notifier blocking_notifier_call_chain bus_notify device_del pci_remove_bus_device pci_stop_and_remove_bus_device pciehp_unconfigure_device pciehp_disable_slot pciehp_handle_presence_or_link_change pciehp_ist Sometimes the endpoint loses connection without a link-down event (e.g., due to a link fault); killing the process (virsh destroy) then hard-locks the host. Call Trace: qi_submit_sync qi_flush_dev_iotlb __context_flush_dev_iotlb.part.0 domain_context_clear_one_cb pci_for_each_dma_alias device_block_translation blocking_domain_attach_dev __iommu_attach_device __iommu_device_set_domain __iommu_group_set_domain_internal iommu_detach_group vfio_iommu_type1_detach_group vfio_group_detach_container vfio_group_fops_release __fput pci_dev_is_disconnected() only covers safe-removal paths; pci_device_is_present() tests accessibility by reading vendor/device IDs and internally calls pci_dev_is_disconnected(). On a ConnectX-5 (8 GT/s, x2) this costs ~70 =C2=B5s. Since __context_flush_dev_iotlb() is only called on {attach,release}_dev paths (not hot), add pci_device_is_present() there to skip inaccessible devices and avoid the hard-lock. Fixes: 37764b952e1b ("iommu/vt-d: Global devTLB flush when present context = entry changed") Fixes: 81e921fd3216 ("iommu/vt-d: Fix NULL domain on device release") Cc: stable@vger.kernel.org Signed-off-by: Jinhui Guo --- drivers/iommu/intel/pasid.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index 3e2255057079..a369690f5926 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -1102,6 +1102,15 @@ static void __context_flush_dev_iotlb(struct device_= domain_info *info) if (!info->ats_enabled) return; =20 + /* + * Skip dev-IOTLB flush for inaccessible PCIe devices to prevent the + * Intel IOMMU from waiting indefinitely for an ATS invalidation that + * cannot complete. + */ + if (dev_is_pci(info->dev) && + !pci_device_is_present(to_pci_dev(info->dev))) + return; + qi_flush_dev_iotlb(info->iommu, PCI_DEVID(info->bus, info->devfn), info->pfsid, info->ats_qdep, 0, MAX_AGAW_PFN_WIDTH); =20 --=20 2.20.1 From nobody Tue Dec 16 18:20:40 2025 Received: from sg-1-103.ptr.blmpb.com (sg-1-103.ptr.blmpb.com [118.26.132.103]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 475751A9B46 for ; Thu, 11 Dec 2025 04:01:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=118.26.132.103 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765425700; cv=none; b=AgioW32jpgPaLztNGZSqo1OoRvOQp3gQC+oTyBMis4VCU+Zl2xYcK+z7uNxXU3jq9E7WhtfbMY7DIAIkPWlv9aN2+EfDvCuos0lb7CN5J1/AE+hfOZsmXJkMBQkLNTo3Bex4deZz/hdGS6axnUeo0fNnvA8Q4SbKTUa33s6rytM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765425700; c=relaxed/simple; bh=4Q6NgeycfZthGEeAHFhDPjP2yvbchRqZ4whFCZCWnBg=; h=References:To:Cc:Subject:Date:Mime-Version:Message-Id:In-Reply-To: Content-Type:From; b=dcfV9uZD5SGVd0xgL3XcImnrQsZ1RrmJXgH9BCISnOpKtl1tMvOWr/N9cwIk4XziZYCEU0jL5xy2bjuMq8yW0MzlKn8Po5ddhLS2GKN/ES4rvjy4+dGlFubKy/ynYGgWJgdpzO7Ez0TwKJEQiRQuNRZB2/2NUc7S+rxBnhyGIVM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com; spf=pass smtp.mailfrom=bytedance.com; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b=j5xh8t2i; arc=none smtp.client-ip=118.26.132.103 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bytedance.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b="j5xh8t2i" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=2212171451; d=bytedance.com; t=1765425691; h=from:subject: mime-version:from:date:message-id:subject:to:cc:reply-to:content-type: mime-version:in-reply-to:message-id; bh=9UfJ9VIVOS38iGxyFptQJegd8mcO/MEORiq3nC7/r9Y=; b=j5xh8t2iNTYYp1IriO5eV6INcxfxegpTIEQCJ0G8/rfhyMTaZZqoXbpYR0uK1iYPAn2dAZ Td7NMVAdd5Jo9epajNyM5uacgDbuZNbi/ezrM/Rq4EWMP0kj0y6yZPpJNeTbbsMtMk0Jey ttCwiX6Ze8YGTZXEdw1P8nZtkd/JQDTD3l4XH0wbQzxA/67OTFSQHrbwAgysBbwS8G5LSk t1LiZR87/FhdofDjr24Qdjdm3uEidsnvNffXDJ/WdvOn+xVuenhMLNL+w+48Y0iYEYUP8p xTcdNBBNxXt8RIXS8x9WIJSNlyieeNIlaafxC39+QfDne2BFNKIQlrc456gurA== References: <20251211035946.2071-1-guojinhui.liam@bytedance.com> X-Lms-Return-Path: Content-Transfer-Encoding: quoted-printable To: , , , Cc: , , , Subject: [PATCH v2 2/2] iommu/vt-d: Flush dev-IOTLB only when PCIe device is accessible in scalable mode Date: Thu, 11 Dec 2025 11:59:46 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Original-From: Jinhui Guo Message-Id: <20251211035946.2071-3-guojinhui.liam@bytedance.com> In-Reply-To: <20251211035946.2071-1-guojinhui.liam@bytedance.com> From: "Jinhui Guo" X-Mailer: git-send-email 2.17.1 Content-Type: text/plain; charset="utf-8" Commit 4fc82cd907ac ("iommu/vt-d: Don't issue ATS Invalidation request when device is disconnected") relies on pci_dev_is_disconnected() to skip ATS invalidation for safely-removed devices, but it does not cover link-down caused by faults, which can still hard-lock the system. For example, if a VM fails to connect to the PCIe device, "virsh destroy" is executed to release resources and isolate the fault, but a hard-lockup occurs while releasing the group fd. Call Trace: qi_submit_sync qi_flush_dev_iotlb intel_pasid_tear_down_entry device_block_translation blocking_domain_attach_dev __iommu_attach_device __iommu_device_set_domain __iommu_group_set_domain_internal iommu_detach_group vfio_iommu_type1_detach_group vfio_group_detach_container vfio_group_fops_release __fput Although pci_device_is_present() is slower than pci_dev_is_disconnected(), it still takes only ~70 =C2=B5s on a ConnectX-5 (8 GT/s, x2) and becomes even faster as PCIe speed and width increase. Besides, devtlb_invalidation_with_pasid() is called only in the paths below, which are far less frequent than memory map/unmap. 1. mm-struct release 2. {attach,release}_dev 3. set/remove PASID 4. dirty-tracking setup The gain in system stability far outweighs the negligible cost of using pci_device_is_present() instead of pci_dev_is_disconnected() to decide when to skip ATS invalidation, especially under GDR high-load conditions. Fixes: 4fc82cd907ac ("iommu/vt-d: Don't issue ATS Invalidation request when= device is disconnected") Cc: stable@vger.kernel.org Signed-off-by: Jinhui Guo --- drivers/iommu/intel/pasid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index a369690f5926..e64d445de964 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -218,7 +218,7 @@ devtlb_invalidation_with_pasid(struct intel_iommu *iomm= u, if (!info || !info->ats_enabled) return; =20 - if (pci_dev_is_disconnected(to_pci_dev(dev))) + if (!pci_device_is_present(to_pci_dev(dev))) return; =20 sid =3D PCI_DEVID(info->bus, info->devfn); --=20 2.20.1