From nobody Sun Feb 8 10:06:55 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AD3D247291; Thu, 11 Dec 2025 16:39:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471188; cv=none; b=XB/3AldNjHcf2FEl4Vm5Y4V9wEEF1wNLI7Qdmzos8yh0D79UaiqoBtIYERhd7T88fbPWcfFtA0wwD4cVb6QZmYpGfPiWzlgDHt5ARxOBt/j0VoFuvH4mig5UN1kpTEX2cB3k7RUwNqdP2DmC3mB88BSGH9dNHhXJ3Xr96Kesxm0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471188; c=relaxed/simple; bh=NObLl9fDFrFZkTv9xsvJQK5vK4J1/jFJFVcI30Ygmfw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BCGMvc7RgHEAgLU9ZDeDo80GUILcUJsA5GM5gIRk1hIlTs6nJuhpxWaCviQL0NazzXIMeZr5mFhU82+S/Baarh4QDrzmZ06BZtVoTKi2Zz4fsxyPwOn3eN6NHXAEjCQAQf6pFiCJ3Y5K9f8FcRF132DCX+KO3DdC3Ai3PtRHlwA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=v8JdI36i; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="v8JdI36i" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 78EF11A20EF; Thu, 11 Dec 2025 16:39:44 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 448316072F; Thu, 11 Dec 2025 16:39:44 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4E439103C8C1E; Thu, 11 Dec 2025 17:39:40 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765471182; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=0CUr9ddV3oZ41q3/D/0z/oo3oYkxXbRVdv8SyL1wMI0=; b=v8JdI36i5NiGCTtV7pRC+dYkLOEumCiVmBUeSYFeog5xJ/9R6Tkxe5XREjXa9xRQ9nn6rJ DdJmMx4cOiMlm30Qast1XOcjPV4ccsDWdo7a6TiSk9LURCvPnfnrX67AHMP7U4QcxzfH4v Z+rNTxD+HEC1vmcL+aVPquApmzw3JpdaClouOXpWA6dvE3AAs/MhIGBIp1zR2KUEsIvHr5 +YYevkWQW7czReLQL3FGL4+5BnsV44wQhmAlm4ZAPxt8SLj2RPjhqcjO/iFJT8e3B/76fF Jq3PkwjTT5st0o+DKeM05jmifu9PJMWEIFO9zFq/pxUAKzjcak6P2KLnJQeEhA== From: "Kory Maincent (TI.com)" Date: Thu, 11 Dec 2025 17:38:45 +0100 Subject: [PATCH v2 01/20] dt-bindings: display: tilcdc: Convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251211-feature_tilcdc-v2-1-f48bac3cd33e@bootlin.com> References: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> In-Reply-To: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Convert the device tree binding documentation for tilcdc from plain text to DT binding schema. Signed-off-by: Kory Maincent (TI.com) --- .../devicetree/bindings/display/tilcdc/tilcdc.txt | 82 ------------------ .../devicetree/bindings/display/tilcdc/tilcdc.yaml | 96 ++++++++++++++++++= ++++ 2 files changed, 96 insertions(+), 82 deletions(-) diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt b/= Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt deleted file mode 100644 index 3b3d0bbfcfff4..0000000000000 --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt +++ /dev/null @@ -1,82 +0,0 @@ -Device-Tree bindings for tilcdc DRM driver - -Required properties: - - compatible: value should be one of the following: - - "ti,am33xx-tilcdc" for AM335x based boards - - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards - - interrupts: the interrupt number - - reg: base address and size of the LCDC device - -Recommended properties: - - ti,hwmods: Name of the hwmod associated to the LCDC - -Optional properties: - - max-bandwidth: The maximum pixels per second that the memory - interface / lcd controller combination can sustain - - max-width: The maximum horizontal pixel width supported by - the lcd controller. - - max-pixelclock: The maximum pixel clock that can be supported - by the lcd controller in KHz. - - blue-and-red-wiring: Recognized values "straight" or "crossed". - This property deals with the LCDC revision 2 (found on AM335x) - color errata [1]. - - "straight" indicates normal wiring that supports RGB565, - BGR888, and XBGR8888 color formats. - - "crossed" indicates wiring that has blue and red wires - crossed. This setup supports BGR565, RGB888 and XRGB8888 - formats. - - If the property is not present or its value is not recognized - the legacy mode is assumed. This configuration supports RGB565, - RGB888 and XRGB8888 formats. However, depending on wiring, the red - and blue colors are swapped in either 16 or 24-bit color modes. - -Optional nodes: - - - port/ports: to describe a connection to an external encoder. The - binding follows Documentation/devicetree/bindings/graph.txt and - supports a single port with a single endpoint. - - - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and - Documentation/devicetree/bindings/display/bridge/ti,tfp410.yaml for con= necting - tfp410 DVI encoder or lcd panel to lcdc - -[1] There is an errata about AM335x color wiring. For 16-bit color mode - the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]), - but for 24 bit color modes the wiring of blue and red components is - crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is - for Blue[3-7]. For more details see section 3.1.1 in AM335x - Silicon Errata: - https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNu= mber=3Dsprz360 - -Example: - - fb: fb@4830e000 { - compatible =3D "ti,am33xx-tilcdc", "ti,da850-tilcdc"; - reg =3D <0x4830e000 0x1000>; - interrupt-parent =3D <&intc>; - interrupts =3D <36>; - ti,hwmods =3D "lcdc"; - - blue-and-red-wiring =3D "crossed"; - - port { - lcdc_0: endpoint { - remote-endpoint =3D <&hdmi_0>; - }; - }; - }; - - tda19988: tda19988 { - compatible =3D "nxp,tda998x"; - reg =3D <0x70>; - - pinctrl-names =3D "default", "off"; - pinctrl-0 =3D <&nxp_hdmi_bonelt_pins>; - pinctrl-1 =3D <&nxp_hdmi_bonelt_off_pins>; - - port { - hdmi_0: endpoint { - remote-endpoint =3D <&lcdc_0>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.yaml b= /Documentation/devicetree/bindings/display/tilcdc/tilcdc.yaml new file mode 100644 index 0000000000000..34ac1fd04d5c6 --- /dev/null +++ b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/tilcdc/tilcdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LCD Controller, found on AM335x, DA850, AM18x and OMAP-L138 + +maintainers: + - Kory Maincent + +properties: + compatible: + enum: + - ti,am33xx-tilcdc + - ti,da850-tilcdc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: + Name of the hwmod associated to the LCDC + + max-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum pixels per second that the memory interface / lcd + controller combination can sustain + + max-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum horizontal pixel width supported by the lcd controller. + + max-pixelclock: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The maximum pixel clock that can be supported by the lcd controller + in KHz. + + blue-and-red-wiring: + enum: [straight, crossed] + description: + This property deals with the LCDC revision 2 (found on AM335x) + color errata [1]. + - "straight" indicates normal wiring that supports RGB565, + BGR888, and XBGR8888 color formats. + - "crossed" indicates wiring that has blue and red wires + crossed. This setup supports BGR565, RGB888 and XRGB8888 + formats. + - If the property is not present or its value is not recognized + the legacy mode is assumed. This configuration supports RGB565, + RGB888 and XRGB8888 formats. However, depending on wiring, the red + and blue colors are swapped in either 16 or 24-bit color modes. + + [1] There is an errata about AM335x color wiring. For 16-bit color + mode the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]), + but for 24 bit color modes the wiring of blue and red components is + crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is + for Blue[3-7]. For more details see section 3.1.1 in AM335x + Silicon Errata + https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratur= eNumber=3Dsprz360 + +required: + - compatible + - interrupts + - reg + - port + +additionalProperties: false + +examples: + - | + tilcdc: tilcdc@4830e000 { + compatible =3D "ti,am33xx-tilcdc"; + reg =3D <0x4830e000 0x1000>; + interrupt-parent =3D <&intc>; + interrupts =3D <36>; + ti,hwmods =3D "lcdc"; + + blue-and-red-wiring =3D "crossed"; + + port { + lcdc_0: endpoint { + remote-endpoint =3D <&hdmi_0>; + }; + }; + }; --=20 2.43.0 From nobody Sun Feb 8 10:06:55 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1807431355E; Thu, 11 Dec 2025 16:39:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471191; cv=none; b=HBMvR7k0G5h1waCC1BwGE78plPjK7oCZykdYXGBbXfWWf2kLITR/W1Co0AZlSyZWK8Uo9sQWXMclUj7Q1UmZ/qyMCWsoX6pE34pMVDean/E+wkGMCVGOCbTadSZ84qonVcd26aJhelB0LcBeCMCqS86MHbDLuSAPDfok9Q2BPIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471191; c=relaxed/simple; bh=OSfnIaxJro7Md058f5pbrJFb5ajNbmguAqRFL7wAJmg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=t/1vEyv+mAQVcwRJvljVrDj/8nhX9EH86YFsMoznNi1310gSZpNxW3w1oGIe6KWyrVhjKhOnxYQibUc0Y41j4WrqH44F1tBGeld3tYJUznbGN/Pj1DxKBFa8SJGA0f8otyZ4x0yw5Tyc8MbYfYtLVA6Pfyhx2NA//Fk7qAdvMIo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=cHNvQEJx; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="cHNvQEJx" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 15DC3C1934E; Thu, 11 Dec 2025 16:39:23 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 1A9966072F; Thu, 11 Dec 2025 16:39:47 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 52560103C8C7B; Thu, 11 Dec 2025 17:39:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765471185; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=sVcTUwOCRH5tnQZK1SD7eSjVIvUKNCHhAOFhXPDQ2uA=; b=cHNvQEJxuvuPsT39IuUKHb36IrNHyBSryBir25sEu70JFNA18i6VTtebbBVbtwIOLy6Tn9 2lFVUZzZ7Z5cUy6m9qMX2TDwaMdWW/+VUiKA2RKbG/pnBaG8A0yxzqtSIH5C16NRZTusYh kssZoSJVT5KZwolD9I1MMu1mwNf5kej8nmnVHfraI+MfKq38Ct50lRjm7z/elItW4RUzMX iZMsMjgBniz1bIcr3RnPC3YbaSPLX2PUyX0XM65851mTSh0VdM9CZvEmLi89XoKuqrPyjw hqwQmSS7uDqDazxhL0AASbrClk2Hj+KGz4b7sXG7Z8CJXtmwKTdEalymfzJ7kg== From: "Kory Maincent (TI.com)" Date: Thu, 11 Dec 2025 17:38:46 +0100 Subject: [PATCH v2 02/20] dt-bindings: display: tilcdc: Mark panel binding as deprecated Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251211-feature_tilcdc-v2-2-f48bac3cd33e@bootlin.com> References: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> In-Reply-To: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Mark the ti,tilcdc,panel binding as deprecated in the documentation. This legacy binding should no longer be used for new designs. Users should migrate to the standard DRM panel bindings instead. Signed-off-by: Kory Maincent (TI.com) Acked-by: Krzysztof Kozlowski --- Change in v2: - New patch --- Documentation/devicetree/bindings/display/tilcdc/panel.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/tilcdc/panel.txt b/D= ocumentation/devicetree/bindings/display/tilcdc/panel.txt index 808216310ea27..b973174d704ed 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/panel.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/panel.txt @@ -1,4 +1,5 @@ Device-Tree bindings for tilcdc DRM generic panel output driver +This binding is deprecated and should not be used. =20 Required properties: - compatible: value should be "ti,tilcdc,panel". --=20 2.43.0 From nobody Sun Feb 8 10:06:55 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1316307AEB for ; Thu, 11 Dec 2025 16:39:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471194; cv=none; b=ucLMQbWfnePlFvWW9ydqNTcA/hvpBM0m/eBqHk3hfpLrxwcIQk4qcfb/OQIvs+IXN1b16aY6eAQpoqmfTCUcxYRHGvmW/KWyC0W+XRfwv6d+245wpB/kraWOj/YlSLhyHeZDbzPc/0r2aLszp3nZKA64Rbzyyjhhk5EmqSniAK0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471194; c=relaxed/simple; bh=pd0fwM8OpssesecVe5jYsKCLeoyXlOaIEtG7sseqEuY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NNgSuE0+6FERt9SX33YLFPhxb5fy2/RTm5xZXgjmX0rKhpiHvLUoeCUDZ+R274Ha4i7tPo0iICH/zQI4s2cZ9qLBz6fvaUqzgG1TfBBX7iqsbz3VRD53YAVfqB4TkTWTtG/tEEMoD3Kd9R8MxznqN41WZfwyPw05Amddbl/Yf4Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Bs3BQ+pF; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Bs3BQ+pF" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 49284C1934D; Thu, 11 Dec 2025 16:39:26 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 4C7456072F; Thu, 11 Dec 2025 16:39:50 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 21F4D103C8C1E; Thu, 11 Dec 2025 17:39:46 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765471188; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=i06U48V1QlfdC71Az6GT0AOQaJkHqXg7US8ufDzb8no=; b=Bs3BQ+pFVmaC9vUuIx5BPNRRVJ2vy3VTEQMGqqd/1413JVjvY9XBgyJlXPfAW0NamnamLb Rf69FJI3t0m+CwfxHoW/WfNrAPjYcOIOWeW3BNDpFm8CgqdCigsLUHjm+KcSdYNmO1471z xBSxQJCdgVmPlLcVQR8WnJLnfqnok6piBbvOYO9ZPav1uNYKkqtA73QWZYF0SpaSGc0REN sWmpWDezSHerVhNNpmIqB0JteM5UjfFPPJCdf6sRC/8r0EY2oBQTyX8Z5R1WY8pWyQMNdb 3ht0JpCTAOe2kemvXFd527WmtSn7RKZih82tfN2Iij5sw28VT6FBPE2c9AW/Gg== From: "Kory Maincent (TI.com)" Date: Thu, 11 Dec 2025 17:38:47 +0100 Subject: [PATCH v2 03/20] drm/tilcdc: Remove simulate_vesa_sync flag Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251211-feature_tilcdc-v2-3-f48bac3cd33e@bootlin.com> References: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> In-Reply-To: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The tilcdc hardware does not generate VESA-compliant sync signals. It aligns the vertical sync (VS) on the second edge of the horizontal sync (HS) instead of the first edge. To compensate for this hardware behavior, the driver applies a timing adjustment in mode_fixup(). Previously, this adjustment was conditional based on the simulate_vesa_sync flag, which was only set when using external encoders. This appears problematic because: 1. The timing adjustment seems needed for the hardware behavior regardless of whether an external encoder is used 2. The external encoder infrastructure is driver-specific and being removed due to design issues 3. Boards using tilcdc without bridges (e.g., am335x-evm, am335x-evmsk) may not be getting the necessary timing adjustments Remove the simulate_vesa_sync flag and apply the VESA sync timing adjustment unconditionally, ensuring consistent behavior across all configurations. While it's unclear if the previous conditional behavior was causing actual issues, the unconditional adjustment better reflects the hardware's characteristics. Signed-off-by: Kory Maincent (TI.com) Reviewed-by: Luca Ceresoli --- Only few board currently use tilcdc not associated to a bridge like the am335x_evm or the am335x-evmsk. --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 16 ---------------- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 2 -- drivers/gpu/drm/tilcdc/tilcdc_external.c | 1 - 3 files changed, 19 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/= tilcdc_crtc.c index 52c95131af5af..b06b1453db2dd 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -47,9 +47,6 @@ struct tilcdc_crtc { =20 struct drm_framebuffer *next_fb; =20 - /* Only set if an external encoder is connected */ - bool simulate_vesa_sync; - int sync_lost_count; bool frame_intact; struct work_struct recover_work; @@ -642,11 +639,6 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *cr= tc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { - struct tilcdc_crtc *tilcdc_crtc =3D to_tilcdc_crtc(crtc); - - if (!tilcdc_crtc->simulate_vesa_sync) - return true; - /* * tilcdc does not generate VESA-compliant sync but aligns * VS on the second edge of HS instead of first edge. @@ -866,14 +858,6 @@ void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, tilcdc_crtc->info =3D info; } =20 -void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, - bool simulate_vesa_sync) -{ - struct tilcdc_crtc *tilcdc_crtc =3D to_tilcdc_crtc(crtc); - - tilcdc_crtc->simulate_vesa_sync =3D simulate_vesa_sync; -} - void tilcdc_crtc_update_clk(struct drm_crtc *crtc) { struct drm_device *dev =3D crtc->dev; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.h index 58b276f82a669..3aba3a1155ba0 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -160,8 +160,6 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc); void tilcdc_crtc_update_clk(struct drm_crtc *crtc); void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, const struct tilcdc_panel_info *info); -void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, - bool simulate_vesa_sync); void tilcdc_crtc_shutdown(struct drm_crtc *crtc); void tilcdc_crtc_destroy(struct drm_crtc *crtc); int tilcdc_crtc_update_fb(struct drm_crtc *crtc, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/til= cdc/tilcdc_external.c index 3b86d002ef62e..da755a411d9ff 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c @@ -80,7 +80,6 @@ int tilcdc_add_component_encoder(struct drm_device *ddev) return -ENODEV; =20 /* Only tda998x is supported at the moment. */ - tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true); tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x); =20 return 0; --=20 2.43.0 From nobody Sun Feb 8 10:06:55 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F1C728C009 for ; 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arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ADQOPlBq" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id D3C42C1934E; Thu, 11 Dec 2025 16:39:28 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DA1746072F; Thu, 11 Dec 2025 16:39:52 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 508C0103C8D6B; Thu, 11 Dec 2025 17:39:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765471191; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Jr7UFylm38hbBlEG1LDyrLNqpAyAfZ2ycYfYD02kldo=; b=ADQOPlBqMWAV64ENppCBvSKEJo8u70o4V7dEuMLqlIMjRrdjKXNOkgT8q0nU2Hiu8rtst0 kdAalLZSG+5I3JU6XjbRQhvSCdhsJ8pvAneUAj+qCyCJThVo5HrEht2USOArADMtI9wSQU 1ICsokklWVxpvXVco8IagaHn4sVNlCh7jeBNZflWf/ygscpyLexWMYD+0tyFtEYQ44YBeC MjfYIZeNoQjmGwXE6MRMuthHXvJDkQTcONzBmrWVxmWOxF54x0BOgVsbswR1vmlpQZcEuQ Ii9ok+jFsVAh0HrW67V0iC9/qJXENhQRoMiR08HbBtGNJrM2EOqclTGSBEKyyw== From: "Kory Maincent (TI.com)" Date: Thu, 11 Dec 2025 17:38:48 +0100 Subject: [PATCH v2 04/20] drm/tilcdc: Add support for DRM bus flags and simplify panel config Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251211-feature_tilcdc-v2-4-f48bac3cd33e@bootlin.com> References: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> In-Reply-To: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Migrate CRTC mode configuration to use standard DRM bus flags in preparation for removing the tilcdc_panel driver and its custom tilcdc_panel_info structure. Add support for DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE and DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE flags to control pixel clock and sync signal edge polarity, while maintaining backward compatibility with the existing tilcdc panel info structure. Simplify several hardware parameters by setting them to fixed defaults based on common usage across existing device trees: - DMA burst size: 16 (previously configurable via switch statement) - AC bias frequency: 255 (previously panel-specific) - FIFO DMA request delay: 128 (previously panel-specific) These parameters show no variation in real-world usage, so hardcoding them simplifies the driver without losing functionality. Preserve FIFO threshold configurability by detecting the SoC type, as this parameter varies between AM33xx (8) and DA850 (16) platforms. Signed-off-by: Kory Maincent (TI.com) Reviewed-by: Luca Ceresoli --- Change in v2: - Use SoC type instead of devicetree parameter to set FIFO threshold value. --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 47 +++++++++++++-------------------= ---- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 29 ++++++++++++++++------ drivers/gpu/drm/tilcdc/tilcdc_drv.h | 2 ++ 3 files changed, 41 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/= tilcdc_crtc.c index b06b1453db2dd..2309a9a0c925d 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -285,27 +285,15 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crt= c) =20 /* Configure the Burst Size and fifo threshold of DMA: */ reg =3D tilcdc_read(dev, LCDC_DMA_CTRL_REG) & ~0x00000770; - switch (info->dma_burst_sz) { - case 1: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_1); - break; - case 2: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_2); - break; - case 4: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_4); - break; - case 8: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_8); - break; - case 16: - reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_16); - break; - default: - dev_err(dev->dev, "invalid burst size\n"); - return; + /* Use 16 bit DMA burst size by default */ + reg |=3D LCDC_DMA_BURST_SIZE(LCDC_DMA_BURST_16); + if (priv->fifo_th) { + int fifo_th_val =3D ilog2(priv->fifo_th) - 3; + + reg |=3D (fifo_th_val << 8); + } else { + reg |=3D (info->fifo_th << 8); } - reg |=3D (info->fifo_th << 8); tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg); =20 /* Configure timings: */ @@ -321,8 +309,8 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) =20 /* Set AC Bias Period and Number of Transitions per Interrupt: */ reg =3D tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; - reg |=3D LCDC_AC_BIAS_FREQUENCY(info->ac_bias) | - LCDC_AC_BIAS_TRANSITIONS_PER_INT(info->ac_bias_intrpt); + /* Use 255 AC Bias Pin Frequency by default */ + reg |=3D LCDC_AC_BIAS_FREQUENCY(255); =20 /* * subtract one from hfp, hbp, hsw because the hardware uses @@ -392,20 +380,19 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crt= c) return; } } - reg |=3D info->fdd << 12; + /* Use 128 FIFO DMA Request Delay by default */ + reg |=3D 128 << 12; tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); =20 - if (info->invert_pxl_clk) + if (info->invert_pxl_clk || + mode->flags =3D=3D DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); else tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK); =20 - if (info->sync_ctrl) - tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); - else - tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); - - if (info->sync_edge) + tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL); + if (info->sync_edge || + mode->flags =3D=3D DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE) tilcdc_set(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); else tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.c index 3dcbec312bacb..60230fa9cec95 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -31,6 +31,11 @@ #include "tilcdc_panel.h" #include "tilcdc_regs.h" =20 +enum { + AM33XX_TILCDC, + DA850_TILCDC, +}; + static LIST_HEAD(module_list); =20 static const u32 tilcdc_rev1_formats[] =3D { DRM_FORMAT_RGB565 }; @@ -192,11 +197,19 @@ static void tilcdc_fini(struct drm_device *dev) drm_dev_put(dev); } =20 +static const struct of_device_id tilcdc_of_match[] =3D { + { .compatible =3D "ti,am33xx-tilcdc", .data =3D (void *)AM33XX_TILCDC}, + { .compatible =3D "ti,da850-tilcdc", .data =3D (void *)DA850_TILCDC}, + { }, +}; +MODULE_DEVICE_TABLE(of, tilcdc_of_match); + static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev) { struct drm_device *ddev; struct platform_device *pdev =3D to_platform_device(dev); struct device_node *node =3D dev->of_node; + const struct of_device_id *of_id; struct tilcdc_drm_private *priv; u32 bpp =3D 0; int ret; @@ -209,6 +222,10 @@ static int tilcdc_init(const struct drm_driver *ddrv, = struct device *dev) if (IS_ERR(ddev)) return PTR_ERR(ddev); =20 + of_id =3D of_match_node(tilcdc_of_match, node); + if (!of_id) + return -ENODEV; + ddev->dev_private =3D priv; platform_set_drvdata(pdev, ddev); drm_mode_config_init(ddev); @@ -309,6 +326,11 @@ static int tilcdc_init(const struct drm_driver *ddrv, = struct device *dev) =20 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); =20 + if ((unsigned int)of_id->data =3D=3D DA850_TILCDC) + priv->fifo_th =3D 16; + else + priv->fifo_th =3D 8; + ret =3D tilcdc_crtc_create(ddev); if (ret < 0) { dev_err(dev, "failed to create crtc\n"); @@ -597,13 +619,6 @@ static void tilcdc_pdev_shutdown(struct platform_devic= e *pdev) drm_atomic_helper_shutdown(platform_get_drvdata(pdev)); } =20 -static const struct of_device_id tilcdc_of_match[] =3D { - { .compatible =3D "ti,am33xx-tilcdc", }, - { .compatible =3D "ti,da850-tilcdc", }, - { }, -}; -MODULE_DEVICE_TABLE(of, tilcdc_of_match); - static struct platform_driver tilcdc_platform_driver =3D { .probe =3D tilcdc_pdev_probe, .remove =3D tilcdc_pdev_remove, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.h index 3aba3a1155ba0..79078b4ae7393 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -61,6 +61,8 @@ struct tilcdc_drm_private { */ uint32_t max_width; =20 + u32 fifo_th; + /* Supported pixel formats */ const uint32_t *pixelformats; uint32_t num_pixelformats; --=20 2.43.0 From nobody Sun Feb 8 10:06:55 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E2BD2BE7AB; Thu, 11 Dec 2025 16:39:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471200; cv=none; b=BbJHjEYSL9vgcySDASNTyHKjjaXsBAffB2+hnvPOM2UaEWTwsgj+IKJYY9uCsU5LjLWIcDg+WH2Kjm7Dx8o5pHx4MTwRVrjgBpSasx5GqrXOKlQiQ33ea7bQ2tEvJ5ofeCmjfe3T9/iN2TkLeZ3uRIUEO/9Oa5lQoyQbDEfi1gI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765471200; c=relaxed/simple; bh=ANoDZkLAgeQfSfXk676VS25FfkGeGb9aDh1UICCyf2s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Thu, 11 Dec 2025 16:39:56 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id DEAE2103C8C93; Thu, 11 Dec 2025 17:39:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765471194; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=EpGrFTtSsLmJVdPD5Xtq7OILvGAuYsgbVseo3Zc9270=; b=pR3SuaucMP3aotxua6C2eLaKyOxYTw3HqU9SKVlkiquogTsB2M9IafRDmNWLkJNeGPCfar 4EIylH5G3J5YUPSZHeZ4xnkZU3e4TJUHYBqhAqIZG4fLz1maLE7k24ust2kU9sLEmb3G1b 4UcrUVagFrnU9Bv2QU9oQD9WtPjtAllhQ3HoqqHDMX7rKsRthQ1bwKKr0FiRANUF3kEEdS wTbEtjVRIkcIJZefesC+nwD010JulfBVA9J3ypr2JPWTH37hPCHA/D/2o08CxfpWXEzWE0 whSlfW44ziOtK1Ry2gqloYuQ/Y7G3p0YEnnxRPXtGsQWIqnZQaIKUEITWxEjEQ== From: "Kory Maincent (TI.com)" Date: Thu, 11 Dec 2025 17:38:49 +0100 Subject: [PATCH v2 05/20] drm/tilcdc: Convert legacy panel binding via DT overlay at boot time Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251211-feature_tilcdc-v2-5-f48bac3cd33e@bootlin.com> References: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> In-Reply-To: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 To maintain backward compatibility while removing the deprecated tilcdc_panel driver, add a tilcdc_panel_legacy subdriver that converts the legacy "ti,tilcdc,panel" devicetree binding to the standard panel-dpi binding at early boot. The conversion uses an embedded device tree overlay that is applied and modified during subsys_initcall. The process: - Apply embedded overlay to create a panel-dpi node with placeholder timing properties and port/endpoint connections to the LCDC - Copy all properties from the legacy panel node to the new panel-dpi - Copy display-timings from the legacy panel - Convert legacy panel-info properties (invert-pxl-clk, sync-edge) to standard display timing properties (pixelclk-active, syncclk-active) - Disable the legacy panel by removing its compatible property to prevent the deprecated driver from binding The result is a standard panel-dpi node with proper endpoints and timing properties, allowing the DRM panel infrastructure to work with legacy devicetrees without modification. Other legacy panel-info properties are not migrated as they consistently use default values across all mainline devicetrees and can be hardcoded in the tilcdc driver. This feature is optional via CONFIG_DRM_TILCDC_PANEL_LEGACY and should only be enabled for systems with legacy devicetrees containing "ti,tilcdc,panel" nodes. Signed-off-by: Kory Maincent (TI.com) --- Using the approach of applying an overlay and then modifying the live device tree is the solution I found that requires no modification of the OF core. Dealing entirely with overlay changesets would bring additional requirements such as phandle resolution management, which is internal to the OF framework. I intend to avoid OF core change to support this legacy binding. Change in v2: - New patch. --- drivers/gpu/drm/tilcdc/Kconfig | 14 +++ drivers/gpu/drm/tilcdc/Makefile | 2 + drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c | 159 ++++++++++++++++++++= ++++ drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.dtso | 44 +++++++ 4 files changed, 219 insertions(+) diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig index 24f9a245ba593..4dcae0a06b819 100644 --- a/drivers/gpu/drm/tilcdc/Kconfig +++ b/drivers/gpu/drm/tilcdc/Kconfig @@ -14,3 +14,17 @@ config DRM_TILCDC controller, for example AM33xx in beagle-bone, DA8xx, or OMAP-L1xx. This driver replaces the FB_DA8XX fbdev driver. =20 +config DRM_TILCDC_PANEL_LEGACY + bool "Support device tree blobs using TI LCDC Panel binding" + default n + depends on DRM_TILCDC + depends on OF + depends on BACKLIGHT_CLASS_DEVICE + depends on PM + select OF_OVERLAY + select DRM_PANEL_SIMPLE + help + Choose this option if you need a kernel that is compatible + with device tree blobs using the obsolete "ti,tilcdc,panel" + binding. If you find "ti,tilcdc,panel"-string from your DTB, + you probably need this. Otherwise you do not. diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makef= ile index f5190477de721..6d6a08b5adf40 100644 --- a/drivers/gpu/drm/tilcdc/Makefile +++ b/drivers/gpu/drm/tilcdc/Makefile @@ -11,3 +11,5 @@ tilcdc-y :=3D \ tilcdc_drv.o =20 obj-$(CONFIG_DRM_TILCDC) +=3D tilcdc.o +obj-$(CONFIG_DRM_TILCDC_PANEL_LEGACY) +=3D tilcdc_panel_legacy.o \ + tilcdc_panel_legacy.dtbo.o diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c b/drivers/gpu/drm= /tilcdc/tilcdc_panel_legacy.c new file mode 100644 index 0000000000000..a9651dd9f9935 --- /dev/null +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.c @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Kory Maincent + * + * To support the legacy "ti,tilcdc,panel" binding, the devicetree has to + * be transformed to the new panel-dpi binding with the endpoint associate= d. + */ + +#include +#include +#include +#include + +/* Embedded dtbo symbols created by cmd_wrap_S_dtb in scripts/Makefile.lib= */ +extern char __dtbo_tilcdc_panel_legacy_begin[]; +extern char __dtbo_tilcdc_panel_legacy_end[]; + +static void __init +tilcdc_panel_update_prop(struct device_node *node, char *name, + void *val, int length) +{ + struct property *prop; + + prop =3D kzalloc(sizeof(*prop), GFP_KERNEL); + if (!prop) + return; + + prop->name =3D kstrdup(name, GFP_KERNEL); + prop->length =3D length; + prop->value =3D kmemdup(val, length, GFP_KERNEL); + of_update_property(node, prop); +} + +static int __init tilcdc_panel_copy_props(struct device_node *old_panel, + struct device_node *new_panel) +{ + struct device_node *child, *old_timing, *new_timing, *panel_info; + u32 invert_pxl_clk =3D 0, sync_edge =3D 0; + struct property *prop; + + /* Copy all panel properties to the new panel node */ + for_each_property_of_node(old_panel, prop) { + if (!strncmp(prop->name, "compatible", sizeof("compatible"))) + continue; + + tilcdc_panel_update_prop(new_panel, prop->name, + prop->value, prop->length); + } + + child =3D of_get_child_by_name(old_panel, "display-timings"); + if (!child) + return -EINVAL; + + /* The default display timing is the one specified as native-mode. + * If no native-mode is specified then the first node is assumed + * to be the native mode. + */ + old_timing =3D of_parse_phandle(child, "native-mode", 0); + if (!old_timing) { + old_timing =3D of_get_next_child(child, NULL); + if (!old_timing) { + of_node_put(child); + return -EINVAL; + } + } + of_node_put(child); + + new_timing =3D of_get_child_by_name(new_panel, "panel-timing"); + if (!new_timing) + return -EINVAL; + + /* Copy all panel timing property to the new panel node */ + for_each_property_of_node(old_timing, prop) + tilcdc_panel_update_prop(new_timing, prop->name, + prop->value, prop->length); + + panel_info =3D of_get_child_by_name(old_panel, "panel-info"); + if (!panel_info) + return -EINVAL; + + /* Looked only for these two parameter as all the other are always + * set to default and not related to common DRM properties. + */ + of_property_read_u32(panel_info, "invert-pxl-clk", &invert_pxl_clk); + of_property_read_u32(panel_info, "sync-edge", &sync_edge); + + if (!invert_pxl_clk) + tilcdc_panel_update_prop(new_timing, "pixelclk-active", + &(int){1}, sizeof(int)); + + if (!sync_edge) + tilcdc_panel_update_prop(new_timing, "syncclk-active", + &(int){1}, sizeof(int)); + + of_node_put(panel_info); + of_node_put(old_timing); + of_node_put(new_timing); + return 0; +} + +static const struct of_device_id tilcdc_panel_of_match[] __initconst =3D { + { .compatible =3D "ti,tilcdc,panel", }, + {}, +}; + +static const struct of_device_id tilcdc_of_match[] __initconst =3D { + { .compatible =3D "ti,am33xx-tilcdc", }, + { .compatible =3D "ti,da850-tilcdc", }, + {}, +}; + +static int __init tilcdc_panel_legacy_init(void) +{ + struct device_node *panel, *lcdc, *new_panel; + void *dtbo_start; + u32 dtbo_size; + int ovcs_id; + int ret; + + lcdc =3D of_find_matching_node(NULL, tilcdc_of_match); + panel =3D of_find_matching_node(NULL, tilcdc_panel_of_match); + + if (!of_device_is_available(panel) || + !of_device_is_available(lcdc)) { + ret =3D -ENODEV; + goto out; + } + + dtbo_start =3D __dtbo_tilcdc_panel_legacy_begin; + dtbo_size =3D __dtbo_tilcdc_panel_legacy_end - + __dtbo_tilcdc_panel_legacy_begin; + + ret =3D of_overlay_fdt_apply(dtbo_start, dtbo_size, &ovcs_id, NULL); + if (ret) + goto out; + + new_panel =3D of_find_node_by_name(NULL, "panel-dpi"); + if (!new_panel) { + ret =3D -ENODEV; + goto overlay_remove; + } + + ret =3D tilcdc_panel_copy_props(panel, new_panel); + if (ret) + goto overlay_remove; + + /* Remove compatible property to avoid any driver compatible match */ + of_remove_property(panel, of_find_property(panel, "compatible", + NULL)); +overlay_remove: + of_overlay_remove(&ovcs_id); +out: + of_node_put(new_panel); + of_node_put(panel); + of_node_put(lcdc); + return ret; +} + +subsys_initcall(tilcdc_panel_legacy_init); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.dtso b/drivers/gpu/= drm/tilcdc/tilcdc_panel_legacy.dtso new file mode 100644 index 0000000000000..77f3ec9391d55 --- /dev/null +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel_legacy.dtso @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * DTS overlay for converting ti,tilcdc,panel binding to new binding. + * + * Copyright (C) Kory Maincent + */ + +/dts-v1/; +/plugin/; + +&{/} { + panel-dpi { + compatible =3D "panel-dpi"; + port { + panel_in: endpoint@0 { + remote-endpoint =3D <&lcd_0>; + }; + }; + panel-timing { + clock-frequency =3D <0>; + hactive =3D <0>; + vactive =3D <0>; + hfront-porch =3D <0>; + hback-porch =3D <0>; + hsync-len =3D <0>; + vfront-porch =3D <0>; + vback-porch =3D <0>; + vsync-len =3D <0>; + hsync-active =3D <0>; + vsync-active =3D <0>; + de-active =3D <0>; + pixelclk-active =3D <0>; + syncclk-active =3D <0>; + }; + }; +}; + +&lcdc { + port { + lcd_0: endpoint@0 { + remote-endpoint =3D <&panel_in>; + }; + }; +}; --=20 2.43.0 From nobody Sun Feb 8 10:06:55 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7ED1A2FC00B for ; Thu, 11 Dec 2025 16:40:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ACnu03gd" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id EAA15C1934D; Thu, 11 Dec 2025 16:39:34 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id EE7B06072F; Thu, 11 Dec 2025 16:39:58 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 50E72103C8CF4; Thu, 11 Dec 2025 17:39:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1765471197; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=VuGEYhL7wmKwdm8i4bhgefhayj3r8Ear9/01SKaPjeM=; b=ACnu03gd1sWIAKLUHxB5Ro1tD7DJWbFIZIa6fsnscpOz1lOxvsGnQmamv24q4N+47/0qyq WNdgr7/W0d6S1GQ7lp/1r06aZLTX0VkHdJPgtC0Lk61BfPJG5y+2JYTgHte+xW4fr367bv QXMh5BSOPfkaMKv7Rf64Opjgt7soTXKXSOmxEQqllI00CXQ9c/uCiV11lp2n2wjv8MoIVl 4AJECaU9Vn2b4avK6Gl/9EY5HmfOGQ5iJdXAq2q9RUXvuK6KkqQwhVYLFxXXnjMZr4yyuR z1MzyQvQeT4CeWCQbrcRMIUZ2Im92L5Ms1LOWacccwNv1ozalwBiVHUE+qzLAQ== From: "Kory Maincent (TI.com)" Date: Thu, 11 Dec 2025 17:38:50 +0100 Subject: [PATCH v2 06/20] drm/tilcdc: Remove tilcdc panel driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251211-feature_tilcdc-v2-6-f48bac3cd33e@bootlin.com> References: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> In-Reply-To: <20251211-feature_tilcdc-v2-0-f48bac3cd33e@bootlin.com> To: Jyri Sarha , Tomi Valkeinen , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Bartosz Golaszewski , Tony Lindgren , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec Cc: Markus Schneider-Pargmann , Bajjuri Praneeth , Luca Ceresoli , Louis Chauvet , Thomas Petazzoni , Miguel Gazquez , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The tilcdc panel subdriver is a legacy, non-standard driver that has been replaced by the standard panel-dpi driver and panel-simple infrastructure. With the device tree bindings removed and all in-tree users migrated to use panel-dpi, this driver no longer has any associated device tree bindings or users. The panel-dpi driver combined with DRM bus flags provides equivalent functionality in a standard way that is compatible with the broader DRM panel ecosystem. This removal eliminates 400+ lines of redundant code and completes the migration to standard panel handling. Signed-off-by: Kory Maincent (TI.com) Reviewed-by: Luca Ceresoli --- drivers/gpu/drm/tilcdc/Makefile | 1 - drivers/gpu/drm/tilcdc/tilcdc_drv.c | 3 - drivers/gpu/drm/tilcdc/tilcdc_panel.c | 408 ------------------------------= ---- drivers/gpu/drm/tilcdc/tilcdc_panel.h | 15 -- 4 files changed, 427 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makef= ile index 6d6a08b5adf40..b78204a65ce29 100644 --- a/drivers/gpu/drm/tilcdc/Makefile +++ b/drivers/gpu/drm/tilcdc/Makefile @@ -6,7 +6,6 @@ endif tilcdc-y :=3D \ tilcdc_plane.o \ tilcdc_crtc.o \ - tilcdc_panel.o \ tilcdc_external.o \ tilcdc_drv.o =20 diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/t= ilcdc_drv.c index 60230fa9cec95..28f09b9c1879b 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -28,7 +28,6 @@ =20 #include "tilcdc_drv.h" #include "tilcdc_external.h" -#include "tilcdc_panel.h" #include "tilcdc_regs.h" =20 enum { @@ -636,7 +635,6 @@ static int __init tilcdc_drm_init(void) return -ENODEV; =20 DBG("init"); - tilcdc_panel_init(); return platform_driver_register(&tilcdc_platform_driver); } =20 @@ -644,7 +642,6 @@ static void __exit tilcdc_drm_fini(void) { DBG("fini"); platform_driver_unregister(&tilcdc_platform_driver); - tilcdc_panel_fini(); } =20 module_init(tilcdc_drm_init); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c b/drivers/gpu/drm/tilcdc= /tilcdc_panel.c deleted file mode 100644 index 262f290d85d91..0000000000000 --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c +++ /dev/null @@ -1,408 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012 Texas Instruments - * Author: Rob Clark - */ - -#include -#include -#include - -#include