From nobody Wed Dec 17 04:04:34 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAF3E3246FD for ; Wed, 10 Dec 2025 12:36:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765370192; cv=none; b=J3+scRJnjIWn28QkuiCTxPW9lTmWseBBAtu5Mhqj3qzHgBR5vCEmEPQNSFI9FFey8gptHoIYKb9a4HCwKzYTuYzDOJPAPUYuEWG11mCTajjN00plvCSu4hVeVH1F8IvTYY485KvSEyBTwVHAeVdegBI+43tIyyF/08cNyyGaNhg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1765370192; c=relaxed/simple; bh=K2LisNNEJ0oN5Zf+qubT5qIXQn1XIm1FQK9VWYwmeho=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=t8LXvuMUm4cdDuKxNQA46XhTYALkU11Sk6VnH5owm2nKrGAO4h2WNwd/qnrsW4kNi+rkXSNqA1RAYeWw7h7Kr9TFOifiRCFVm+IxaWombI6jDhb1aXxr59HBytlDm7SMeUD8C8hdWJZvlTUd3ceEE2ZrBJEJCBqU/RkNZ182MWs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=nQ10OZJf; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=ccQLJKav; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="nQ10OZJf"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="ccQLJKav" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5BA8eM442669701 for ; Wed, 10 Dec 2025 12:36:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= SIVzJax+E0S+v6i1dIVMwOWP15udvaF6NPUnzMn/utU=; b=nQ10OZJfeER8gFEd WTaJTUl9rr9/FZr84GPRnku0hiWs0g9AiVjZcAwPZBY+DAooS8aO2gQ7Uknm7h0v lfcMEuwzQ2ji7RUrYqtXg5VFm84ua5Ti5YVLpJiGSY8PE8P1xOkitBTYin62HRjo H9FaYj5F+QgOe9WAjl0MSy3oXoqwGRL1PIdRIn4ORmSPaCSpJs4+6ib+tJP14xJy /s+fbpIAc2O0qTipCmayzgYQXu1jYiiv8Y6l15EgUCbwRFSYC0tkMgQtl7GqWPrZ NBuIQT+cro+2XlS2I0qrTmlxXcfo96gms4tDcU5Wlas3G1BZqFWQguxizxwiRK4U CjWANA== Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ay4ykgst5-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 10 Dec 2025 12:36:28 +0000 (GMT) Received: by mail-pl1-f199.google.com with SMTP id d9443c01a7336-29be4d2ef78so140775215ad.2 for ; Wed, 10 Dec 2025 04:36:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1765370187; x=1765974987; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=SIVzJax+E0S+v6i1dIVMwOWP15udvaF6NPUnzMn/utU=; b=ccQLJKavol7b8LSs9j/i1dk1aOyWMaO8Whrii/OzxewP9e2d9H+hB6l7xvaj1E4Ab7 ObSL4IbVhY0wiQyv/C/aqrpnXRJQ6H8aOwZ/QUDA3oYcQ7mf+vKJewazlwJyVGYqEY3y pFcVJlQBKLuGbhIYYM3+UhQC6Avv/Lhb8Kn5hH8bBsowHKo1V2zrP150+23wj5WMs1r7 ZLONIup1tRFUT38DvUndDuDcLY4vynVySnHLhAn2pUa7xmBtE41GSnWJnMPpXbadM3Aj 76A2veoBVnCuYHnwgpCzc1nKr1nj3HOEXcGY4t5OYPmoUn0iwOF4ZVRqsc4XtBghS7kc F67Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1765370187; x=1765974987; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=SIVzJax+E0S+v6i1dIVMwOWP15udvaF6NPUnzMn/utU=; b=hzOKLXQNWuhlSxjdkCHNxWKOHf4VAX6GvFMkrI9JqBh+qUbiWiDYdONT5lFR4SVdpD D88RMzwN3U1qocjvB32hs2YbD2vr8mEUTE4RytYt789rzsHF2Mhq+52lyGWJ9BzMP56r WIAqf7YXOW/1rouaKDro0IP45Tc+Mtfu7cJZDKGySeTBFc3IXFfXtXajLdM8fVzmfXfK cWERULjbyjpN+Ah38X817uUL9vIB/TSDSO0w3YwvWntlsQY0GC/q5Ic+0f0c0o+73ojv eoehAcNklqBiVtfvXL6Y0E9OVq0og3nbpUJjdlb63258Spfbrdb/R8W+2Sw5Qb1UuUay ziqA== X-Forwarded-Encrypted: i=1; AJvYcCX1ETHEHt6GwB8cXHi6qC5EeTokT01D8qVNGWF/KZppwoqUY39L+vqNW76TZY5040ZIxCuzBre9GRCloYc=@vger.kernel.org X-Gm-Message-State: AOJu0Yz8EqmEelzrY4FadZbNr59xjM1X05xCPii3gH0OIcHA6OMhOKfI I6Q41QuEBuFy6QdXUjUpfPEW6KuN8hbqT8GfIGrNoN+uMnOSDCYgWBzBR3S7kDaTeycAdDzPK3J dOpivC17rHNfAjIFyVHdDZyW/i18uMmPzvgPUW8fl7jW4vQcNPEefWMeACKRWi5zaHtw= X-Gm-Gg: AY/fxX4RKjlZ8QWjgcx/YzUp3VLpD+NkkMA30XoPFDmNfw1wFuPCVucaMACXoboWYFZ Hp4subSyV1u2T3nPdhHNwhbLnJyi/vjT1b24mtXLiV2E/wPaw19WBPv93sAqrX8PJu4nZbeqzZc aYDNzB9ooBbTXAqt7Ez5tMsZp9JBpChsoCvZqBK3bt8j+Y9yxj9DByfR+bgWd+N3vFO2SdzspUp 2OipDY1OItAr7cOFbgV3Hmp8NRjEpAq5D43EGZQo7O3vLHO0G2M70qoN/MurH8C11B50pyE6P6q x1mHgctLRbGsChEuWSWD9aBrp+KCQD3EXYGnZilmPP7jASWm9QjMCpOke6P0bUMFdhbVVuiLiGO 81EfXZwe4z1r+6aZmEqgBxZMwhEEW+xcr5TCkiAJ2g5MP X-Received: by 2002:a17:903:2f84:b0:24b:24dc:91a7 with SMTP id d9443c01a7336-29ec27d176dmr21465445ad.45.1765370186965; Wed, 10 Dec 2025 04:36:26 -0800 (PST) X-Google-Smtp-Source: AGHT+IGDhNU4dx1DOB/lxhNYugfbAS6u2SC8AyS+LN1LuZq80qEGnrjX+6CXcmsCKR6Bg1YbWRx9CA== X-Received: by 2002:a17:903:2f84:b0:24b:24dc:91a7 with SMTP id d9443c01a7336-29ec27d176dmr21465165ad.45.1765370186438; Wed, 10 Dec 2025 04:36:26 -0800 (PST) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29daeaab9c0sm185434615ad.68.2025.12.10.04.36.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Dec 2025 04:36:26 -0800 (PST) From: Vikash Garodia Date: Wed, 10 Dec 2025 18:06:00 +0530 Subject: [PATCH v4 2/6] media: iris: Add support for multiple TZ content protection(CP) configs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251210-knp_video-v4-2-8d11d840358a@oss.qualcomm.com> References: <20251210-knp_video-v4-0-8d11d840358a@oss.qualcomm.com> In-Reply-To: <20251210-knp_video-v4-0-8d11d840358a@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Dmitry Baryshkov , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Reddy , Vikash Garodia , Bryan O'Donoghue X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1765370172; l=8089; i=vikash.garodia@oss.qualcomm.com; s=20241104; h=from:subject:message-id; bh=K2LisNNEJ0oN5Zf+qubT5qIXQn1XIm1FQK9VWYwmeho=; b=t6YhZ3RZvYq0gzhH8yQxDFdTXlioNUo+No0yy5e2dBvryXCJUqT2e1TcypFPB+n7Vls0UZ/Te gM+WGAhobZuA8StkbFQdEUz+5N8+vGmWI7aO8YBE8VGLrMZAGizUisW X-Developer-Key: i=vikash.garodia@oss.qualcomm.com; a=ed25519; pk=LY9Eqp4KiHWxzGNKGHbwRFEJOfRCSzG/rxQNmvZvaKE= X-Proofpoint-ORIG-GUID: A7UPNXUwYF28Sv3yLSDVSiV_N7luVrZG X-Authority-Analysis: v=2.4 cv=Mfthep/f c=1 sm=1 tr=0 ts=6939694c cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=8r50Y1FI9EZ4QPj5cKYA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: A7UPNXUwYF28Sv3yLSDVSiV_N7luVrZG X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjEwMDEwMCBTYWx0ZWRfX27FtBL2l8gsn svbvV8HFVACnYzjgNf35wvLo4mhJasq+pNbdfzutbSk+nwW7xrcK4w6hVabfXgi9byZ3ANyO7Hv m9GWazuwJEW0+KMrR+i2yqpEYi7vYdq4GZLu/2vBvsokZi6ZafufUSdFZcVUM7hXaLwCnj8Iclg GM2tmD0yYqWoVf0iLdjsKiVPVAAY87P8p5R11IOau1Ln7hdLqm67f4Fc4q8UUPhYpDsWbliZaNN xcjGwvHsFnafYc+rVA8EgUomgo/l6j/oV3qyLB1MG0qPimR9z7+1dAppz0xaS61v1qHQKgE0DWw P4Smi0vyg9G5QPKmu/QxmZ6ZGK7STALt19wuPBeb1OopBkDIte7UDDCIlP3Efgr+E2w62hPfJ+W Ppj4oHLys2oknMznRVndLgsMUiwYoQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-09_05,2025-12-09_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 adultscore=0 spamscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512100100 vpu4 needs an additional configuration with respect to CP regions. Make the CP configuration as array such that the multiple configuration can be managed per platform. Reviewed-by: Konrad Dybcio Reviewed-by: Bryan O'Donoghue Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_firmware.c | 23 ++++++++++++------= --- .../platform/qcom/iris/iris_platform_common.h | 3 ++- .../media/platform/qcom/iris/iris_platform_gen1.c | 18 +++++++++------- .../media/platform/qcom/iris/iris_platform_gen2.c | 24 ++++++++++++++----= ---- 4 files changed, 41 insertions(+), 27 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_firmware.c b/drivers/med= ia/platform/qcom/iris/iris_firmware.c index 679444327ed73a40c5cacd36f4156fc94c9ca45f..5f408024e967fd21ade66cc3fa3= 77d8507f9002e 100644 --- a/drivers/media/platform/qcom/iris/iris_firmware.c +++ b/drivers/media/platform/qcom/iris/iris_firmware.c @@ -64,9 +64,9 @@ static int iris_load_fw_to_memory(struct iris_core *core,= const char *fw_name) =20 int iris_fw_load(struct iris_core *core) { - struct tz_cp_config *cp_config =3D core->iris_platform_data->tz_cp_config= _data; + const struct tz_cp_config *cp_config; const char *fwpath =3D NULL; - int ret; + int i, ret; =20 ret =3D of_property_read_string_index(core->dev->of_node, "firmware-name"= , 0, &fwpath); @@ -85,14 +85,17 @@ int iris_fw_load(struct iris_core *core) return ret; } =20 - ret =3D qcom_scm_mem_protect_video_var(cp_config->cp_start, - cp_config->cp_size, - cp_config->cp_nonpixel_start, - cp_config->cp_nonpixel_size); - if (ret) { - dev_err(core->dev, "protect memory failed\n"); - qcom_scm_pas_shutdown(core->iris_platform_data->pas_id); - return ret; + for (i =3D 0; i < core->iris_platform_data->tz_cp_config_data_size; i++) { + cp_config =3D &core->iris_platform_data->tz_cp_config_data[i]; + ret =3D qcom_scm_mem_protect_video_var(cp_config->cp_start, + cp_config->cp_size, + cp_config->cp_nonpixel_start, + cp_config->cp_nonpixel_size); + if (ret) { + dev_err(core->dev, "qcom_scm_mem_protect_video_var failed: %d\n", ret); + qcom_scm_pas_shutdown(core->iris_platform_data->pas_id); + return ret; + } } =20 return ret; diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index f63fb58b2fa87d31407be0f14524c963edd85d68..29900c3ea9b9ebbab614c804a24= 9b08ba6001494 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -223,7 +223,8 @@ struct iris_platform_data { u32 inst_fw_caps_dec_size; const struct platform_inst_fw_cap *inst_fw_caps_enc; u32 inst_fw_caps_enc_size; - struct tz_cp_config *tz_cp_config_data; + const struct tz_cp_config *tz_cp_config_data; + u32 tz_cp_config_data_size; u32 core_arch; u32 hw_response_timeout; struct ubwc_config_data *ubwc_config; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 6092667687bfe34a52f3ec4865f99eddeea435a8..d1dda98271fb7ecdc396fe1a2df= da1b73720dec8 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -278,11 +278,13 @@ static const char * const sm8250_opp_clk_table[] =3D { NULL, }; =20 -static struct tz_cp_config tz_cp_config_sm8250 =3D { - .cp_start =3D 0, - .cp_size =3D 0x25800000, - .cp_nonpixel_start =3D 0x01000000, - .cp_nonpixel_size =3D 0x24800000, +static const struct tz_cp_config tz_cp_config_sm8250[] =3D { + { + .cp_start =3D 0, + .cp_size =3D 0x25800000, + .cp_nonpixel_start =3D 0x01000000, + .cp_nonpixel_size =3D 0x24800000, + }, }; =20 static const u32 sm8250_vdec_input_config_param_default[] =3D { @@ -348,7 +350,8 @@ const struct iris_platform_data sm8250_data =3D { .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8250_dec), .inst_fw_caps_enc =3D inst_fw_cap_sm8250_enc, .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8250_enc), - .tz_cp_config_data =3D &tz_cp_config_sm8250, + .tz_cp_config_data =3D tz_cp_config_sm8250, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_sm8250), .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, .num_vpp_pipe =3D 4, .max_session_count =3D 16, @@ -398,7 +401,8 @@ const struct iris_platform_data sc7280_data =3D { .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8250_dec), .inst_fw_caps_enc =3D inst_fw_cap_sm8250_enc, .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8250_enc), - .tz_cp_config_data =3D &tz_cp_config_sm8250, + .tz_cp_config_data =3D tz_cp_config_sm8250, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_sm8250), .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, .num_vpp_pipe =3D 1, .no_aon =3D true, diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 65860e3f43700ddb70eba617d78971c47945d008..38734293d811cd5a12244797dd0= cfcd95e3fb311 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -646,11 +646,13 @@ static struct ubwc_config_data ubwc_config_sm8550 =3D= { .bank_spreading =3D 1, }; =20 -static struct tz_cp_config tz_cp_config_sm8550 =3D { - .cp_start =3D 0, - .cp_size =3D 0x25800000, - .cp_nonpixel_start =3D 0x01000000, - .cp_nonpixel_size =3D 0x24800000, +static const struct tz_cp_config tz_cp_config_sm8550[] =3D { + { + .cp_start =3D 0, + .cp_size =3D 0x25800000, + .cp_nonpixel_start =3D 0x01000000, + .cp_nonpixel_size =3D 0x24800000, + }, }; =20 static const u32 sm8550_vdec_input_config_params_default[] =3D { @@ -770,7 +772,8 @@ const struct iris_platform_data sm8550_data =3D { .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), - .tz_cp_config_data =3D &tz_cp_config_sm8550, + .tz_cp_config_data =3D tz_cp_config_sm8550, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_sm8550), .core_arch =3D VIDEO_ARCH_LX, .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, .ubwc_config =3D &ubwc_config_sm8550, @@ -863,7 +866,8 @@ const struct iris_platform_data sm8650_data =3D { .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), - .tz_cp_config_data =3D &tz_cp_config_sm8550, + .tz_cp_config_data =3D tz_cp_config_sm8550, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_sm8550), .core_arch =3D VIDEO_ARCH_LX, .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, .ubwc_config =3D &ubwc_config_sm8550, @@ -946,7 +950,8 @@ const struct iris_platform_data sm8750_data =3D { .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), - .tz_cp_config_data =3D &tz_cp_config_sm8550, + .tz_cp_config_data =3D tz_cp_config_sm8550, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_sm8550), .core_arch =3D VIDEO_ARCH_LX, .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, .ubwc_config =3D &ubwc_config_sm8550, @@ -1033,7 +1038,8 @@ const struct iris_platform_data qcs8300_data =3D { .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), - .tz_cp_config_data =3D &tz_cp_config_sm8550, + .tz_cp_config_data =3D tz_cp_config_sm8550, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_sm8550), .core_arch =3D VIDEO_ARCH_LX, .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, .ubwc_config =3D &ubwc_config_sm8550, --=20 2.34.1