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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 04/13] cxl: Simplify cxl_root_ops allocation and handling Date: Tue, 9 Dec 2025 19:06:40 +0100 Message-ID: <20251209180659.208842-5-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EB:EE_|MW3PR12MB4490:EE_ X-MS-Office365-Filtering-Correlation-Id: 3c4cbc1c-6379-4b6c-c0c8-08de374deb41 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|7416014|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?QUMZO+HFwfQ18dfnZlC25FD19Ft3yM+SozxrlUfyJlgpSMwCgpmnSDfJoJnT?= =?us-ascii?Q?wUj9Ygdm7s7m9RUmC3oWyFFQf74y+SnSZYw8/Lw0q0ixwZIbRdnvOpoHU+S+?= =?us-ascii?Q?wLYmcMXQ3UhYTVLBbLtUQgKwsfYG72Lx0vwoDX9qCVQ84W0AdSIGRgHopALh?= =?us-ascii?Q?A2dPtThO9Bos+MORO9yRvPB6PLnm/PLHpNxLJNAFw8nh1Ich9WvfPrsM6VHO?= =?us-ascii?Q?weZkElf6wSMNWNSjCP8IkWRZHTNWHok5uC+Txlw4c+0sXBPhXxCTyzOYU15B?= =?us-ascii?Q?aq2NJp4wmMcnqyJu3hJXUMZZJiyMAehP3fbaAvTE7nYAGgOs9fkAA3v+bp0D?= =?us-ascii?Q?JBCn4Lhg2yW+EHTXPMULaEtrglcpDw8Mn8IF2ddeNArNox8Ksm2pqqGVv2SV?= =?us-ascii?Q?G/ldBZCCvxU/qC8bdPxcjfr9NexPG1qfeo2s6kgjsr1Wsol7M9kWKrGE+IpS?= =?us-ascii?Q?bcwM2gS3nzHViL/xnwQ6eZrzjhJV63uPh3hw+NgF4MZzyvfiYpYPFmHuTbHD?= =?us-ascii?Q?/CAL0X8yzTfXUWZbfv81BTgu4w2uoZr7evZkGIVKTuMEthaqA9ygHYiYFckK?= =?us-ascii?Q?Vxh0nTwyofp/9PWUugHO7Y4C/ud+/NwXdRwyPyn0xa1Og0hpgOeO/R2sDD79?= =?us-ascii?Q?GSI/GcTyEp8/0xgY+Ab0+kdxRnU1J1Qb1pJJ7l10/8D99/vHuxgsvqbUMB5H?= =?us-ascii?Q?EmIV6tZwUzMstsumvZKJ/48F6FlAVIdxhCx7kUC1z3DDaoO/QHDAsvKWwvGV?= =?us-ascii?Q?pWLoCNVbeHNb+K6kaToWclnAyfdIyTpQgVkYUQm9LnK5T2VNcaiOd7kGWdtk?= =?us-ascii?Q?EQZgc3F7AbGH8pzpyY8qoA8psIyIjNSX28SjjmzWswQb2WnMmd4WZ1WAm5sm?= =?us-ascii?Q?BQAcMwQfkGiRpMyu4ciiHEaYESrN2pYe0vExtjpAluS/A83jTUak7WMQfkJ2?= =?us-ascii?Q?QOkMLKD14kS7rsqmqTpPiJIeVuA7n2tTsZzn5Gfr2fiToAp2FhH8RsX8VVEn?= =?us-ascii?Q?fkECRH/riUqGqa0S7eRYlfqVERZbeeLk3NoffLAXIXtHUio9s7FjFmk4obpw?= =?us-ascii?Q?z8vnPJcAcK/gR3wvgKVHsSIyTan9m28+BIm0420935GuG5mbj9K6aZ6cYjmZ?= =?us-ascii?Q?Ie5awu66oEnPjhNOTBgckRu02K61HSzr5f9ktRDXd6srTg7vKY4gBCqSes0P?= =?us-ascii?Q?ZZOaa2yW4O9EVVRvrhQe+J/Qcd3bvvczZRkEtUpJ2bsMjSpoJ7Rj1DtHME+B?= =?us-ascii?Q?jetgVE3dLBd9S7uHeHODc0FHBVRum+E776ARJ7IP9kKfx0y7wdemM9qa+BWb?= =?us-ascii?Q?muifx+hwzUVVoxxIvReL1QZ+Zbup/+5DteXANHxdrUqkQSaJvC0N4VkTlWWl?= =?us-ascii?Q?6tT1ZA5OGRx+YTH9p9WrS4eA978O81jLyJZEMhLkRkcaoOIsGVXnbMQkODXy?= =?us-ascii?Q?du0S19BPCNqv1+8Y/fudIN+a4LGokWn9jnyHTkmJSutI+42C1hz7ZHDZ+W4C?= =?us-ascii?Q?yOpyFK4N2BjBU3oRHyIw330/rxd9jVcfX+q4WQyMin2rqaRTDWGYCSK6E26c?= =?us-ascii?Q?h6tOQF08D632LPglbXI=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:13.1362 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3c4cbc1c-6379-4b6c-c0c8-08de374deb41 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EB.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4490 Content-Type: text/plain; charset="utf-8" A root port's callback handlers are collected in struct cxl_root_ops. The structure is dynamically allocated, though it contains only a single pointer in it. This also requires to check two pointers to check for the existance of a callback. Simplify the allocation, release and handler check by embedding the ops statically in struct cxl_root. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 7 ++----- drivers/cxl/core/cdat.c | 8 ++++---- drivers/cxl/core/port.c | 8 ++------ drivers/cxl/cxl.h | 19 ++++++++++--------- 4 files changed, 18 insertions(+), 24 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index 77ac940e3013..b4bed40ef7c0 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -318,10 +318,6 @@ static int cxl_acpi_qos_class(struct cxl_root *cxl_roo= t, return cxl_acpi_evaluate_qtg_dsm(handle, coord, entries, qos_class); } =20 -static const struct cxl_root_ops acpi_root_ops =3D { - .qos_class =3D cxl_acpi_qos_class, -}; - static void del_cxl_resource(struct resource *res) { if (!res) @@ -923,9 +919,10 @@ static int cxl_acpi_probe(struct platform_device *pdev) cxl_res->end =3D -1; cxl_res->flags =3D IORESOURCE_MEM; =20 - cxl_root =3D devm_cxl_add_root(host, &acpi_root_ops); + cxl_root =3D devm_cxl_add_root(host); if (IS_ERR(cxl_root)) return PTR_ERR(cxl_root); + cxl_root->ops.qos_class =3D cxl_acpi_qos_class; root_port =3D &cxl_root->port; =20 rc =3D bus_for_each_dev(adev->dev.bus, NULL, root_port, diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c index 7120b5f2e31f..18f0f2a25113 100644 --- a/drivers/cxl/core/cdat.c +++ b/drivers/cxl/core/cdat.c @@ -213,7 +213,7 @@ static int cxl_port_perf_data_calculate(struct cxl_port= *port, if (!cxl_root) return -ENODEV; =20 - if (!cxl_root->ops || !cxl_root->ops->qos_class) + if (!cxl_root->ops.qos_class) return -EOPNOTSUPP; =20 xa_for_each(dsmas_xa, index, dent) { @@ -221,9 +221,9 @@ static int cxl_port_perf_data_calculate(struct cxl_port= *port, =20 cxl_coordinates_combine(dent->coord, dent->cdat_coord, ep_c); dent->entries =3D 1; - rc =3D cxl_root->ops->qos_class(cxl_root, - &dent->coord[ACCESS_COORDINATE_CPU], - 1, &qos_class); + rc =3D cxl_root->ops.qos_class(cxl_root, + &dent->coord[ACCESS_COORDINATE_CPU], + 1, &qos_class); if (rc !=3D 1) continue; =20 diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index fef3aa0c6680..2338d146577c 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -954,19 +954,15 @@ struct cxl_port *devm_cxl_add_port(struct device *hos= t, } EXPORT_SYMBOL_NS_GPL(devm_cxl_add_port, "CXL"); =20 -struct cxl_root *devm_cxl_add_root(struct device *host, - const struct cxl_root_ops *ops) +struct cxl_root *devm_cxl_add_root(struct device *host) { - struct cxl_root *cxl_root; struct cxl_port *port; =20 port =3D devm_cxl_add_port(host, host, CXL_RESOURCE_NONE, NULL); if (IS_ERR(port)) return ERR_CAST(port); =20 - cxl_root =3D to_cxl_root(port); - cxl_root->ops =3D ops; - return cxl_root; + return to_cxl_root(port); } EXPORT_SYMBOL_NS_GPL(devm_cxl_add_root, "CXL"); =20 diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 3a5ca1936ed1..0e15dc6e169f 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -646,6 +646,14 @@ struct cxl_port { resource_size_t component_reg_phys; }; =20 +struct cxl_root; + +struct cxl_root_ops { + int (*qos_class)(struct cxl_root *cxl_root, + struct access_coordinate *coord, int entries, + int *qos_class); +}; + /** * struct cxl_root - logical collection of root cxl_port items * @@ -654,7 +662,7 @@ struct cxl_port { */ struct cxl_root { struct cxl_port port; - const struct cxl_root_ops *ops; + struct cxl_root_ops ops; }; =20 static inline struct cxl_root * @@ -663,12 +671,6 @@ to_cxl_root(const struct cxl_port *port) return container_of(port, struct cxl_root, port); } =20 -struct cxl_root_ops { - int (*qos_class)(struct cxl_root *cxl_root, - struct access_coordinate *coord, int entries, - int *qos_class); -}; - static inline struct cxl_dport * cxl_find_dport_by_dev(struct cxl_port *port, const struct device *dport_de= v) { @@ -782,8 +784,7 @@ struct cxl_port *devm_cxl_add_port(struct device *host, struct device *uport_dev, resource_size_t component_reg_phys, struct cxl_dport *parent_dport); -struct cxl_root *devm_cxl_add_root(struct device *host, - const struct cxl_root_ops *ops); +struct cxl_root *devm_cxl_add_root(struct device *host); struct cxl_root *find_cxl_root(struct cxl_port *port); =20 DEFINE_FREE(put_cxl_root, struct cxl_root *, if (_T) put_device(&_T->port.= dev)) --=20 2.47.3