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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 01/13] cxl/region: Rename misleading variable name @hpa to @hpa_range Date: Tue, 9 Dec 2025 19:06:37 +0100 Message-ID: <20251209180659.208842-2-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E6:EE_|CH3PR12MB8484:EE_ X-MS-Office365-Filtering-Correlation-Id: a78d43ef-ac07-46ca-b559-08de374de48e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?oaf/1LEF+RtYNhJGCV7DBuof89JWu3fz3oB3BKxq5thluMF7JwZKxQqUjZhv?= =?us-ascii?Q?PBx5B5ZPLu7X1E8Xo5P/qybMkIOyjBEZPotjXxtj0eghX5hkzKc4qerujh6L?= =?us-ascii?Q?9nitz4XKCo3/WQfRbhbqymASVlYJIrha3LVP6Ti31Trg0Q11JrptWnsLyJ/X?= =?us-ascii?Q?uhMy//ynH2l8Lqer7EjslQKQk1sdkSdejryZw/pV6KSQF0W++1cEc6vq+BlN?= =?us-ascii?Q?I/yuZDJN3zF7b19fFj8qpxzi1PmZFJlXMNNJw+bR4D5/ebItdz8y8QN4VCLO?= =?us-ascii?Q?YKWmGbqvHOGq5IDXvfa2ViE8bg5QxTwSza0H9BKEI2e4sVcGuUcDNGL8PE/Q?= =?us-ascii?Q?cgEaOTjHiGidqLlgHa6gv5SoFevnunLxCxsfihKEhuM8LFBDTeZCilxBAO88?= =?us-ascii?Q?HTtx90un09P9qzsO76q+nDoUlFPOuKaRBoyHg/5LUfZkZtnK4Tv6XFoW5ic6?= =?us-ascii?Q?K62q7hW8NHxPxAk4feYnhd9/tPKTeiEgybey+tXtx94O+GFif52onSgOqBAd?= =?us-ascii?Q?ZCmWYnf/duubeYQ1sF7D7bDTOi2Ed8bAujxUQuicMNprOIDl7/OKMohas0Gw?= =?us-ascii?Q?CqyeDve4md4n3U8tX8XX+ewvKJNHOwTrEWpEFA3mJH6QknRr8/t1UKGstRxx?= =?us-ascii?Q?uDOD1G4LxL2OaWhTikeBBzYsssmVS5vkjV5EUOY0onOmUtBa3nBt2pWYevqz?= =?us-ascii?Q?/EoHs6eBTLKZX+y7yNLoTSx8zmfnprDQmaBPax1u39SCrZ2IKE4XYqpSe7lW?= =?us-ascii?Q?5Pg+Uk9b+lzm/kzYFcFJVpq/9P38WHg4gK+uRQugukmi2vwT6s6HorLQRTPc?= =?us-ascii?Q?OUj7qW7CWTGCJanvhHYMICCRY1XOxLz+2VmGzPbmnKMEwm7RJd5bCH4bvxyQ?= =?us-ascii?Q?qC+UDuYJz6BnTyqPmQZqN6uvKJnZxI6mXWvQli7wNAIHhEZ7M0wNGc235+q2?= =?us-ascii?Q?BfMQvK61wTRcyzrRfqmUg5OIuBASkGRpKfbSkWXigle4aLew63KWH6LO7+ic?= =?us-ascii?Q?7lWTfmXGj5ief1aZwthQc3COrZAioOo0zw0rH/pcQKa7ypf/rQJLpS5t3RIy?= =?us-ascii?Q?HfCQ5+fep7ZiOZompVC5CAt3+kGUZT7si//EHx5TLzT3a4CQwqUpZR0v9xaw?= =?us-ascii?Q?XH3yRJjsXk8qeNKY6Ff5NMgkplLi7ijhAi4/z+DpPvpq4PywqB2uT7k9HFjZ?= =?us-ascii?Q?NdzP0meUcYKMP57EXdaMgad4QeEGOoDrYSc9Lg7GN9gJjY7QTlZi5zXpUjF0?= =?us-ascii?Q?+oxqLBkzN8vCzSHp4L89JZRjEjbxPJyWVeti9h5QFAbC2CA9s3eA1hXV1KXA?= =?us-ascii?Q?8fVcmTYwg7wqmTIFUVI52c9Y/5rVgHGS4jELdQ0c0o898FVwywQQpub2gtE4?= =?us-ascii?Q?UEmjSzob2+0HcsAgCG2hlaGvWC80URvo6ebedUR02ePOlnJ9nBqNzrDdD5Xd?= =?us-ascii?Q?2fhIJlk+SPtOGc2Um0sftSJquPmvI2j2mLW8earHMDWcg0xW5qxvwTfTiVws?= =?us-ascii?Q?ZO4PHqg8egeSRPa8GuLbaOI3n1e4kqMZUNZzZy9BwLiizi3W6OUKR3T5gH6l?= =?us-ascii?Q?IatPeootJAVzGiShjDI=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:01.8453 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a78d43ef-ac07-46ca-b559-08de374de48e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8484 Content-Type: text/plain; charset="utf-8" @hpa is actually a @hpa_range, rename variables accordingly. Reviewed-by: Gregory Price Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 2cf5b29cefd2..1fd2a13288e9 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3471,9 +3471,9 @@ static int match_decoder_by_range(struct device *dev,= const void *data) } =20 static struct cxl_decoder * -cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa) +cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa_rang= e) { - struct device *cxld_dev =3D device_find_child(&port->dev, hpa, + struct device *cxld_dev =3D device_find_child(&port->dev, hpa_range, match_decoder_by_range); =20 return cxld_dev ? to_cxl_decoder(cxld_dev) : NULL; @@ -3486,14 +3486,14 @@ cxl_find_root_decoder(struct cxl_endpoint_decoder *= cxled) struct cxl_port *port =3D cxled_to_port(cxled); struct cxl_root *cxl_root __free(put_cxl_root) =3D find_cxl_root(port); struct cxl_decoder *root, *cxld =3D &cxled->cxld; - struct range *hpa =3D &cxld->hpa_range; + struct range *hpa_range =3D &cxld->hpa_range; =20 - root =3D cxl_port_find_switch_decoder(&cxl_root->port, hpa); + root =3D cxl_port_find_switch_decoder(&cxl_root->port, hpa_range); if (!root) { dev_err(cxlmd->dev.parent, "%s:%s no CXL window for range %#llx:%#llx\n", dev_name(&cxlmd->dev), dev_name(&cxld->dev), - cxld->hpa_range.start, cxld->hpa_range.end); + hpa_range->start, hpa_range->end); return NULL; } =20 @@ -3559,7 +3559,7 @@ static int __construct_region(struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled) { struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct range *hpa =3D &cxled->cxld.hpa_range; + struct range *hpa_range =3D &cxled->cxld.hpa_range; struct cxl_region_params *p; struct resource *res; int rc; @@ -3580,7 +3580,7 @@ static int __construct_region(struct cxl_region *cxlr, if (!res) return -ENOMEM; =20 - *res =3D DEFINE_RES_MEM_NAMED(hpa->start, range_len(hpa), + *res =3D DEFINE_RES_MEM_NAMED(hpa_range->start, range_len(hpa_range), dev_name(&cxlr->dev)); =20 rc =3D cxl_extended_linear_cache_resize(cxlr, res); @@ -3663,11 +3663,12 @@ static struct cxl_region *construct_region(struct c= xl_root_decoder *cxlrd, } =20 static struct cxl_region * -cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, struct range *hpa) +cxl_find_region_by_range(struct cxl_root_decoder *cxlrd, + struct range *hpa_range) { struct device *region_dev; =20 - region_dev =3D device_find_child(&cxlrd->cxlsd.cxld.dev, hpa, + region_dev =3D device_find_child(&cxlrd->cxlsd.cxld.dev, hpa_range, match_region_by_range); if (!region_dev) return NULL; @@ -3677,7 +3678,7 @@ cxl_find_region_by_range(struct cxl_root_decoder *cxl= rd, struct range *hpa) =20 int cxl_add_to_region(struct cxl_endpoint_decoder *cxled) { - struct range *hpa =3D &cxled->cxld.hpa_range; + struct range *hpa_range =3D &cxled->cxld.hpa_range; struct cxl_region_params *p; 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Tue, 9 Dec 2025 12:08:02 -0600 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , Gregory Price , "Fabio M. De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 02/13] cxl/region: Store root decoder in struct cxl_region Date: Tue, 9 Dec 2025 19:06:38 +0100 Message-ID: <20251209180659.208842-3-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E9:EE_|MW4PR12MB6998:EE_ X-MS-Office365-Filtering-Correlation-Id: 450904e3-711d-475d-aa9a-08de374de6c2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?0ltEAlUNzcS/to0uj7WnInS2ddmPKYXPO1LeHEJGmg52Et9vgR8Oj3i4XPeD?= =?us-ascii?Q?ORTZ/CR5gLcLK3MnkVfkthUlHdEibKfW12tSzDTIOAIAtWVOajIGKMHaEHbj?= =?us-ascii?Q?gUb07CIQ2u1WFLYRI+CWx/OJ/1V8bGfyc9oHUkJLpqEcpv67hqjYStPsG1Gx?= =?us-ascii?Q?/aOvr1zX3342puCq4WV8c0MtHtwtOo3oI/Roj29VnkER5GjqYx4tU/B0g+/n?= =?us-ascii?Q?rXyGGqqvQD/9Zv2KBpPxuUlAZHnKkgvEHBWDj1BxhjsY468dfD4nLruJkx4z?= =?us-ascii?Q?5KtFm+VZmUc/FRjGpOUrcdJXGMKAd4W+pJss9UA1XaBZcCw3hJwy/DbjXXD4?= =?us-ascii?Q?JMyd6wpEcfG9gY5TEJnoCR4v7+vInHV/VtAkOttkftknDz/RpkIZadtPGJOA?= =?us-ascii?Q?yD8t5AW/ZKpW4/L8+eA6F2Hcshy2lNklRFPNRv6l7qutALn5IRkG1BADdrVF?= =?us-ascii?Q?q1q6csnqT2YP2QpzfALU3rg5mOGJkP9vcCJ69vZfQIo9g5mHvTbhhk1HOegz?= =?us-ascii?Q?QVF9uO4hKvOszuV1KCjxmH5bPdepNI34QpuOd090L5FJPtKPbK4wY+qsXs29?= =?us-ascii?Q?7US4I4MiCY2NgkeVTuBkJQvk7OSGZxgcboH4V85liSvFDSOsN7yWgGcjvwA2?= =?us-ascii?Q?aan6NQtcTrDD/QLTc+VRK/5Y5fOFxsehBaGa/KkMre/ubNpCfPnw/IMyDUIn?= =?us-ascii?Q?75YWfADEJCw3CbFx3GrTiVWtO2sc3L3kNUJNTpFre/+ntMYf3EncWPzb55OX?= =?us-ascii?Q?EFzJPcdUQgzwPVG78x+RCO4McaK2885pOzSfsCTY8N5zq3qUYetn/81kHpp6?= =?us-ascii?Q?Zq4CYc17I0W1QEj2vAYl3bKcRT26MlGDeXKD5v2GfbPW6y9cll0qmyPbXyWI?= =?us-ascii?Q?3+Uk4Ckz7ZGMTa/JQXMGX8zXT6DEOFVWJ7vpf58cCiyQdKDKUafn54vo+2gl?= =?us-ascii?Q?h75AMZ1jObex8bNty+ZbMtcXUog0nWRpPTrmsrfyWvLGFEhcvT0xpJh6USUK?= =?us-ascii?Q?5THyrVPi4qaF5vT1oDjFaunIzzEMNhEGM8xTaHtZ76av/vjyr1eFeG/xgDA1?= =?us-ascii?Q?usufYQ4SK1IDewcAnrhLz/iMRxrxULQAFOTw7UMx+ClK+jEQLr07vQJ5W7KZ?= =?us-ascii?Q?BgpyqnWH86aeb5ElIFV/PXwOuZ0Bc7XeYQc9GisQQS/y+aHmSimTSRa7/BeX?= =?us-ascii?Q?7v299TPA9h8ps1uYGWP2M/K4bbz3WUK05YVYQ6bizZ6nu3B1oTrM9Be0NqRu?= =?us-ascii?Q?YpxwNeL2hvEGYuac1tjiq6d53VZSinmGUFthmUxO1KP7/66/yybc93AicDQU?= =?us-ascii?Q?m9F61ZbCtHboqZQ7ccKsZh+Imq3r5nssEFh6D752lA4YMCysskzyqlJvEdIv?= =?us-ascii?Q?M+6uQ5EMK/6JmUfoyn0vLMXVvpmVRygeTnZ3sEMnZ6xY62kKJXmwq2GICczY?= =?us-ascii?Q?zmrz5i0VFMIAU45MnqAD8Du7gObn7W3NkBvtiimV7q+dQMlOHVIuKhyCUt+A?= =?us-ascii?Q?Euj6n+m0S5u7V/yhzMFctCf35b6zcG7TFWQAWk++bj/dDQ/Bpp8+fIQ8nzV2?= =?us-ascii?Q?NhhmkwjpoTGaFq5MbEA=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700013)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:05.5415 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 450904e3-711d-475d-aa9a-08de374de6c2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E9.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6998 Content-Type: text/plain; charset="utf-8" A region is always bound to a root decoder. The region's associated root decoder is often needed. Add it to struct cxl_region. This simplifies the code by removing dynamic lookups and the root decoder argument from the function argument list where possible. Patch is a prerequisite to implement address translation which uses struct cxl_region to store all relevant region and interleaving parameters. It changes the argument list of __construct_region() in preparation of adding a context argument. Additionally the arg list of cxl_region_attach_position() is simplified and the use of to_cxl_root_decoder() removed, which always reconstructs and checks the pointer. The pointer never changes and is frequently used. Code becomes more readable as this amphazises the binding between both objects. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Reviewed-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 37 +++++++++++++++++++------------------ drivers/cxl/cxl.h | 2 ++ 2 files changed, 21 insertions(+), 18 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 1fd2a13288e9..077cfc75e081 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -486,9 +486,9 @@ static ssize_t interleave_ways_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); - struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; + struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region_params *p =3D &cxlr->params; unsigned int val, save; int rc; @@ -549,9 +549,9 @@ static ssize_t interleave_granularity_store(struct devi= ce *dev, struct device_attribute *attr, const char *buf, size_t len) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); - struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; + struct cxl_decoder *cxld =3D &cxlrd->cxlsd.cxld; struct cxl_region_params *p =3D &cxlr->params; int rc, val; u16 ig; @@ -625,7 +625,7 @@ static DEVICE_ATTR_RO(mode); =20 static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; struct resource *res; u64 remainder =3D 0; @@ -1370,7 +1370,7 @@ static int cxl_port_setup_targets(struct cxl_port *po= rt, struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; int parent_iw, parent_ig, ig, iw, rc, pos =3D cxled->pos; struct cxl_port *parent_port =3D to_cxl_port(port->dev.parent); struct cxl_region_ref *cxl_rr =3D cxl_rr_load(port, cxlr); @@ -1728,10 +1728,10 @@ static int cxl_region_validate_position(struct cxl_= region *cxlr, } =20 static int cxl_region_attach_position(struct cxl_region *cxlr, - struct cxl_root_decoder *cxlrd, struct cxl_endpoint_decoder *cxled, const struct cxl_dport *dport, int pos) { + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_switch_decoder *cxlsd =3D &cxlrd->cxlsd; struct cxl_decoder *cxld =3D &cxlsd->cxld; @@ -1968,7 +1968,7 @@ static int cxl_region_sort_targets(struct cxl_region = *cxlr) static int cxl_region_attach(struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled, int pos) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_dev_state *cxlds =3D cxlmd->cxlds; struct cxl_region_params *p =3D &cxlr->params; @@ -2073,8 +2073,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, ep_port =3D cxled_to_port(cxled); dport =3D cxl_find_dport_by_dev(root_port, ep_port->host_bridge); - rc =3D cxl_region_attach_position(cxlr, cxlrd, cxled, - dport, i); + rc =3D cxl_region_attach_position(cxlr, cxled, dport, i); if (rc) return rc; } @@ -2097,7 +2096,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, if (rc) return rc; =20 - rc =3D cxl_region_attach_position(cxlr, cxlrd, cxled, dport, pos); + rc =3D cxl_region_attach_position(cxlr, cxled, dport, pos); if (rc) return rc; =20 @@ -2393,8 +2392,8 @@ static const struct attribute_group *region_groups[] = =3D { =20 static void cxl_region_release(struct device *dev) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(dev->parent); struct cxl_region *cxlr =3D to_cxl_region(dev); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; int id =3D atomic_read(&cxlrd->region_id); =20 /* @@ -2477,10 +2476,12 @@ static struct cxl_region *cxl_region_alloc(struct c= xl_root_decoder *cxlrd, int i * region id allocations */ get_device(dev->parent); + cxlr->cxlrd =3D cxlrd; + cxlr->id =3D id; + device_set_pm_not_required(dev); dev->bus =3D &cxl_bus_type; dev->type =3D &cxl_region_type; - cxlr->id =3D id; cxl_region_set_lock(cxlr, &cxlrd->cxlsd.cxld); =20 return cxlr; @@ -3112,7 +3113,7 @@ EXPORT_SYMBOL_FOR_MODULES(cxl_calculate_hpa_offset, "= cxl_translate"); u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd, u64 dpa) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; struct cxl_endpoint_decoder *cxled =3D NULL; u64 dpa_offset, hpa_offset, hpa; @@ -3165,7 +3166,7 @@ static int region_offset_to_dpa_result(struct cxl_reg= ion *cxlr, u64 offset, struct dpa_result *result) { struct cxl_region_params *p =3D &cxlr->params; - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_endpoint_decoder *cxled; u64 hpa, hpa_offset, dpa_offset; u16 eig =3D 0; @@ -3519,7 +3520,7 @@ static int match_region_by_range(struct device *dev, = const void *data) static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, struct resource *res) { - struct cxl_root_decoder *cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; resource_size_t size =3D resource_size(res); resource_size_t cache_size, start; @@ -3555,9 +3556,9 @@ static int cxl_extended_linear_cache_resize(struct cx= l_region *cxlr, } =20 static int __construct_region(struct cxl_region *cxlr, - struct cxl_root_decoder *cxlrd, struct cxl_endpoint_decoder *cxled) { + struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct range *hpa_range =3D &cxled->cxld.hpa_range; struct cxl_region_params *p; @@ -3653,7 +3654,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, return cxlr; } =20 - rc =3D __construct_region(cxlr, cxlrd, cxled); + rc =3D __construct_region(cxlr, cxled); if (rc) { devm_release_action(port->uport_dev, unregister_region, cxlr); return ERR_PTR(rc); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index ba17fa86d249..10ce9c3a8a55 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -529,6 +529,7 @@ enum cxl_partition_mode { * struct cxl_region - CXL region * @dev: This region's device * @id: This region's id. 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Endpoint decoders assigned to a region share the same HPA range. The region's address range is the system's physical address (SPA) range. Endpoint decoders in systems that need address translation use HPAs which are not SPAs. To make the SPA range accessible to the endpoint decoders, store and track the region's SPA range in struct cxl_region. Introduce the @hpa_range member to the struct. Now, the SPA range of an endpoint decoder can be determined based on its assigned region. Patch is a prerequisite to implement address translation which uses struct cxl_region to store all relevant region and interleaving parameters. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Reviewed-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 7 +++++++ drivers/cxl/cxl.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 077cfc75e081..57cf3ab28f43 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -661,6 +661,8 @@ static int alloc_hpa(struct cxl_region *cxlr, resource_= size_t size) return PTR_ERR(res); } =20 + cxlr->hpa_range =3D DEFINE_RANGE(res->start, res->end); + p->res =3D res; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 @@ -697,6 +699,8 @@ static int free_hpa(struct cxl_region *cxlr) if (p->state >=3D CXL_CONFIG_ACTIVE) return -EBUSY; =20 + cxlr->hpa_range =3D DEFINE_RANGE(0, -1); + cxl_region_iomem_release(cxlr); p->state =3D CXL_CONFIG_IDLE; return 0; @@ -2450,6 +2454,8 @@ static void unregister_region(void *_cxlr) for (i =3D 0; i < p->interleave_ways; i++) detach_target(cxlr, i); =20 + cxlr->hpa_range =3D DEFINE_RANGE(0, -1); + cxl_region_iomem_release(cxlr); put_device(&cxlr->dev); } @@ -3576,6 +3582,7 @@ static int __construct_region(struct cxl_region *cxlr, } =20 set_bit(CXL_REGION_F_AUTO, &cxlr->flags); + cxlr->hpa_range =3D *hpa_range; =20 res =3D kmalloc(sizeof(*res), GFP_KERNEL); if (!res) diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 10ce9c3a8a55..3a5ca1936ed1 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -530,6 +530,7 @@ enum cxl_partition_mode { * @dev: This region's device * @id: This region's id. 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The structure is dynamically allocated, though it contains only a single pointer in it. This also requires to check two pointers to check for the existance of a callback. Simplify the allocation, release and handler check by embedding the ops statically in struct cxl_root. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 7 ++----- drivers/cxl/core/cdat.c | 8 ++++---- drivers/cxl/core/port.c | 8 ++------ drivers/cxl/cxl.h | 19 ++++++++++--------- 4 files changed, 18 insertions(+), 24 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index 77ac940e3013..b4bed40ef7c0 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -318,10 +318,6 @@ static int cxl_acpi_qos_class(struct cxl_root *cxl_roo= t, return cxl_acpi_evaluate_qtg_dsm(handle, coord, entries, qos_class); } =20 -static const struct cxl_root_ops acpi_root_ops =3D { - .qos_class =3D cxl_acpi_qos_class, -}; - static void del_cxl_resource(struct resource *res) { if (!res) @@ -923,9 +919,10 @@ static int cxl_acpi_probe(struct platform_device *pdev) cxl_res->end =3D -1; cxl_res->flags =3D IORESOURCE_MEM; =20 - cxl_root =3D devm_cxl_add_root(host, &acpi_root_ops); + cxl_root =3D devm_cxl_add_root(host); if (IS_ERR(cxl_root)) return PTR_ERR(cxl_root); + cxl_root->ops.qos_class =3D cxl_acpi_qos_class; root_port =3D &cxl_root->port; =20 rc =3D bus_for_each_dev(adev->dev.bus, NULL, root_port, diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c index 7120b5f2e31f..18f0f2a25113 100644 --- a/drivers/cxl/core/cdat.c +++ b/drivers/cxl/core/cdat.c @@ -213,7 +213,7 @@ static int cxl_port_perf_data_calculate(struct cxl_port= *port, if (!cxl_root) return -ENODEV; =20 - if (!cxl_root->ops || !cxl_root->ops->qos_class) + if (!cxl_root->ops.qos_class) return -EOPNOTSUPP; =20 xa_for_each(dsmas_xa, index, dent) { @@ -221,9 +221,9 @@ static int cxl_port_perf_data_calculate(struct cxl_port= *port, =20 cxl_coordinates_combine(dent->coord, dent->cdat_coord, ep_c); dent->entries =3D 1; - rc =3D cxl_root->ops->qos_class(cxl_root, - &dent->coord[ACCESS_COORDINATE_CPU], - 1, &qos_class); + rc =3D cxl_root->ops.qos_class(cxl_root, + &dent->coord[ACCESS_COORDINATE_CPU], + 1, &qos_class); if (rc !=3D 1) continue; =20 diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index fef3aa0c6680..2338d146577c 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -954,19 +954,15 @@ struct cxl_port *devm_cxl_add_port(struct device *hos= t, } EXPORT_SYMBOL_NS_GPL(devm_cxl_add_port, "CXL"); =20 -struct cxl_root *devm_cxl_add_root(struct device *host, - const struct cxl_root_ops *ops) +struct cxl_root *devm_cxl_add_root(struct device *host) { - struct cxl_root *cxl_root; struct cxl_port *port; =20 port =3D devm_cxl_add_port(host, host, CXL_RESOURCE_NONE, NULL); if (IS_ERR(port)) return ERR_CAST(port); =20 - cxl_root =3D to_cxl_root(port); - cxl_root->ops =3D ops; - return cxl_root; + return to_cxl_root(port); } EXPORT_SYMBOL_NS_GPL(devm_cxl_add_root, "CXL"); =20 diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 3a5ca1936ed1..0e15dc6e169f 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -646,6 +646,14 @@ struct cxl_port { resource_size_t component_reg_phys; }; =20 +struct cxl_root; + +struct cxl_root_ops { + int (*qos_class)(struct cxl_root *cxl_root, + struct access_coordinate *coord, int entries, + int *qos_class); +}; + /** * struct cxl_root - logical collection of root cxl_port items * @@ -654,7 +662,7 @@ struct cxl_port { */ struct cxl_root { struct cxl_port port; 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Tue, 9 Dec 2025 12:08:13 -0600 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , Gregory Price , "Fabio M. De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 05/13] cxl/region: Separate region parameter setup and region construction Date: Tue, 9 Dec 2025 19:06:41 +0100 Message-ID: <20251209180659.208842-6-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E6:EE_|BL1PR12MB5730:EE_ X-MS-Office365-Filtering-Correlation-Id: e4e57a2f-69e6-45db-f517-08de374ded81 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|7416014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?mZU0F6onnGDGvFGQEvDf7iZRjiAcMy9poGpObLZ0fs6uERCVvc0XrZWyoKu9?= =?us-ascii?Q?D8LVR/bZlWUOJJG1eBBYW6jPBlUbR8V8F6YqQXM7OOm/IEm4AtZO8PaQb031?= =?us-ascii?Q?TJHQozstpgyT9XHF5quKhHNI4zw5bBn6iZ/fcnRkaGVg1+tsE6tJIjP1lSPv?= =?us-ascii?Q?CUlnor3sa34XOPO0b8gmfXjIy+tEciHAfGguaItbY030zeB2sH6KdqrxaOjF?= =?us-ascii?Q?1bEehJFamX50+mnYsLdds0WfrcWr9/nCe9e7roG8OWAyZr3aqaXBs4fd93L2?= =?us-ascii?Q?M/kOtXcvV/X1drcY41mVrE2hN1PL1dLnmu0wMswO+uXFnJzXna+2Fk0dfzb5?= =?us-ascii?Q?096VOOo8bjHlqU8fUQ8xNqv68fHIHfbbbQPBLflrYSwwpFU0BsprIbhRncfO?= =?us-ascii?Q?6WHGp0T+RR2ay4vhefhGprNQ3nBvqL69/l9bkYkmPQHegEmjlIZrir6Th1P9?= =?us-ascii?Q?etooxGG1h/IOL8G6diXm1mJI3vzrxUqEeRpF+VWn7WR7yR97kPkwJVJeL6O+?= =?us-ascii?Q?UTa9bVXz7IAFMxW0OayzFIAzQ57FBOLmUIeJSEpijdwuoE03kKVIclB20HVY?= =?us-ascii?Q?YY+2ehf/Ezlps57BZmAyAYKdj1tSh/pgoIxGGAlMdWw6EIjtJs0rW4wHGimm?= =?us-ascii?Q?TfFehRrEJFPjbiBIQfnwrSWYVrXn8AgjYUnNF/+w+2gc/zyuqjTTGaRD9ct3?= =?us-ascii?Q?cJgEXYNXChJpteLZE5scoPZSWiV3rNsc6T9QyYZgtxIpXrUQSsSfOF912//w?= =?us-ascii?Q?uMJvbZC8CFHjglxFkvD4AvlBDlK1ph1OxG7PNGrOiXe18xxHMWlvhYTLi+uv?= =?us-ascii?Q?Q7R5YuwrPZg0KRM+EGQf8DWJmDnAFW5q9uaX797zsVStKe6kPpPK62TR9zg9?= =?us-ascii?Q?l1gfowoiM86C01CZ2sSnbqp0jIS6bp7vbi3cTi4F8/uhi61uvbKkjMia3FAl?= =?us-ascii?Q?qmTMCtGzNXR/rDN+lDneL+HzFXe2D6/mM0xYqEYqpzjUh8jDNFaigw7piIBQ?= =?us-ascii?Q?W0Rm8JSLX3Ng6oEoWSrvWnP/WOzQp61ePh92qJ6UumPvFGSdM3n6yCQHXf/P?= =?us-ascii?Q?CeY7UhOug6HXxPJ+FTSWFLlDOx4OdmuiQPy2BYUmRRu6OSbT58kdFVOALz4H?= =?us-ascii?Q?2a8P8MmOVJrJpIpOeR2r02wGBVCBTyDC1SeUaWotL8AsvOZLugyvzSeOEndH?= =?us-ascii?Q?GIFyCwPAfxYsI05XXHPElCa1rOJsY1Ve0nRQCkKCdMWHiZM7TsLSUfxZKiMJ?= =?us-ascii?Q?2uBMf4CbU7lZwNTj0s3jb7wX5UKickyDIsyIWcuqE53imcb3LIhGKWVEDgqL?= =?us-ascii?Q?NZJsBhSiyYUe0hN+oOe+3Wc1yRoaZQ0WzVSuvTiAKPltqC1q6hAbBCclIvjX?= =?us-ascii?Q?lsRNa3BYkS1lcDHBcHC/706Bf0WJfTXNZZXM0R2SiH9H01EBEOt3rpm/F8pu?= =?us-ascii?Q?R6Ek2I/wTRq0ac++GfX8pEl4h0QMCJJ+k6z/ihNQSpknihB8w4K5o25yK3Ig?= =?us-ascii?Q?3vBYLAE3fwqFH3o5bmDL24fmurwumVaqvZCxBa2PoNnVO2V5Yhj6GoVtIKed?= =?us-ascii?Q?K7GTexmGUaut0vs29O8=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(7416014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:16.8590 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e4e57a2f-69e6-45db-f517-08de374ded81 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5730 Content-Type: text/plain; charset="utf-8" To construct a region, the region parameters such as address range and interleaving config need to be determined. This is done while constructing the region by inspecting the endpoint decoder configuration. The endpoint decoder is passed as a function argument. With address translation the endpoint decoder data is no longer sufficient to extract the region parameters as some of the information is obtained using other methods such as using firmware calls. In a first step, separate code to determine the region parameters from the region construction. Temporarily store all the data to create the region in the new struct cxl_region_context. Once the region data is determined and struct cxl_region_context is filled, construct the region. Patch is a prerequisite to implement address translation. The code separation helps to later extend it to determine region parameters using other methods as needed, esp. to support address translation. Reviewed-by: Gregory Price Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/core.h | 8 ++++++++ drivers/cxl/core/region.c | 27 ++++++++++++++++++--------- 2 files changed, 26 insertions(+), 9 deletions(-) diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 1fb66132b777..ae9e1bb51562 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -19,6 +19,14 @@ enum cxl_detach_mode { }; =20 #ifdef CONFIG_CXL_REGION + +struct cxl_region_context { + struct cxl_endpoint_decoder *cxled; + struct range hpa_range; + int interleave_ways; + int interleave_granularity; +}; + extern struct device_attribute dev_attr_create_pmem_region; extern struct device_attribute dev_attr_create_ram_region; extern struct device_attribute dev_attr_delete_region; diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 57cf3ab28f43..dfb21e8b8fb5 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3562,11 +3562,12 @@ static int cxl_extended_linear_cache_resize(struct = cxl_region *cxlr, } =20 static int __construct_region(struct cxl_region *cxlr, - struct cxl_endpoint_decoder *cxled) + struct cxl_region_context *ctx) { + struct cxl_endpoint_decoder *cxled =3D ctx->cxled; struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct range *hpa_range =3D &cxled->cxld.hpa_range; + struct range *hpa_range =3D &ctx->hpa_range; struct cxl_region_params *p; struct resource *res; int rc; @@ -3619,8 +3620,8 @@ static int __construct_region(struct cxl_region *cxlr, } =20 p->res =3D res; - p->interleave_ways =3D cxled->cxld.interleave_ways; - p->interleave_granularity =3D cxled->cxld.interleave_granularity; + p->interleave_ways =3D ctx->interleave_ways; + p->interleave_granularity =3D ctx->interleave_granularity; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 rc =3D sysfs_update_group(&cxlr->dev.kobj, get_cxl_region_target_group()); @@ -3640,8 +3641,9 @@ static int __construct_region(struct cxl_region *cxlr, =20 /* Establish an empty region covering the given HPA range */ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd, - struct cxl_endpoint_decoder *cxled) + struct cxl_region_context *ctx) { + struct cxl_endpoint_decoder *cxled =3D ctx->cxled; struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_port *port =3D cxlrd_to_port(cxlrd); struct cxl_dev_state *cxlds =3D cxlmd->cxlds; @@ -3661,7 +3663,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, return cxlr; } =20 - rc =3D __construct_region(cxlr, cxled); + rc =3D __construct_region(cxlr, ctx); if (rc) { devm_release_action(port->uport_dev, unregister_region, cxlr); return ERR_PTR(rc); @@ -3686,11 +3688,18 @@ cxl_find_region_by_range(struct cxl_root_decoder *c= xlrd, =20 int cxl_add_to_region(struct cxl_endpoint_decoder *cxled) { - struct range *hpa_range =3D &cxled->cxld.hpa_range; + struct cxl_region_context ctx; struct cxl_region_params *p; bool attach =3D false; int rc; =20 + ctx =3D (struct cxl_region_context) { + .cxled =3D cxled, + .hpa_range =3D cxled->cxld.hpa_range, + .interleave_ways =3D cxled->cxld.interleave_ways, + .interleave_granularity =3D cxled->cxld.interleave_granularity, + }; + struct cxl_root_decoder *cxlrd __free(put_cxl_root_decoder) =3D cxl_find_root_decoder(cxled); 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This requires the endpoint decoders to be an SPA, which is not the case for systems that need address translation. Add a separate @hpa_range argument to function cxl_calc_interleave_pos() to specify the address range. Now it is possible to pass the SPA translated address range of an endpoint decoder to function cxl_calc_interleave_pos(). Refactor only, no functional changes. Patch is a prerequisite to implement address translation. Reviewed-by: Gregory Price Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index dfb21e8b8fb5..71e80223f475 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -1875,6 +1875,7 @@ static int find_pos_and_ways(struct cxl_port *port, s= truct range *range, /** * cxl_calc_interleave_pos() - calculate an endpoint position in a region * @cxled: endpoint decoder member of given region + * @hpa_range: translated HPA range of the endpoint * * The endpoint position is calculated by traversing the topology from * the endpoint to the root decoder and iteratively applying this @@ -1887,11 +1888,11 @@ static int find_pos_and_ways(struct cxl_port *port,= struct range *range, * Return: position >=3D 0 on success * -ENXIO on failure */ -static int cxl_calc_interleave_pos(struct cxl_endpoint_decoder *cxled) +static int cxl_calc_interleave_pos(struct cxl_endpoint_decoder *cxled, + struct range *hpa_range) { struct cxl_port *iter, *port =3D cxled_to_port(cxled); struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct range *range =3D &cxled->cxld.hpa_range; int parent_ways =3D 0, parent_pos =3D 0, pos =3D 0; int rc; =20 @@ -1929,7 +1930,8 @@ static int cxl_calc_interleave_pos(struct cxl_endpoin= t_decoder *cxled) if (is_cxl_root(iter)) break; =20 - rc =3D find_pos_and_ways(iter, range, &parent_pos, &parent_ways); + rc =3D find_pos_and_ways(iter, hpa_range, &parent_pos, + &parent_ways); if (rc) return rc; =20 @@ -1939,7 +1941,7 @@ static int cxl_calc_interleave_pos(struct cxl_endpoin= t_decoder *cxled) dev_dbg(&cxlmd->dev, "decoder:%s parent:%s port:%s range:%#llx-%#llx pos:%d\n", dev_name(&cxled->cxld.dev), dev_name(cxlmd->dev.parent), - dev_name(&port->dev), range->start, range->end, pos); + dev_name(&port->dev), hpa_range->start, hpa_range->end, pos); =20 return pos; } @@ -1952,7 +1954,7 @@ static int cxl_region_sort_targets(struct cxl_region = *cxlr) for (i =3D 0; i < p->nr_targets; i++) { struct cxl_endpoint_decoder *cxled =3D p->targets[i]; =20 - cxled->pos =3D cxl_calc_interleave_pos(cxled); + cxled->pos =3D cxl_calc_interleave_pos(cxled, &cxlr->hpa_range); /* * Record that sorting failed, but still continue to calc * cxled->pos so that follow-on code paths can reliably @@ -2136,7 +2138,7 @@ static int cxl_region_attach(struct cxl_region *cxlr, struct cxl_endpoint_decoder *cxled =3D p->targets[i]; int test_pos; =20 - test_pos =3D cxl_calc_interleave_pos(cxled); + test_pos =3D cxl_calc_interleave_pos(cxled, &cxlr->hpa_range); dev_dbg(&cxled->cxld.dev, "Test cxl_calc_interleave_pos(): %s test_pos:%d cxled->pos:%d\n", (test_pos =3D=3D cxled->pos) ? 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 07/13] cxl/region: Use region data to get the root decoder Date: Tue, 9 Dec 2025 19:06:43 +0100 Message-ID: <20251209180659.208842-8-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EA:EE_|PH7PR12MB6396:EE_ X-MS-Office365-Filtering-Correlation-Id: f5a21206-6671-43c3-4caa-08de374df185 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|7416014|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?i0qYTXD+TFhrlB3mYPwbbgsK93jHnCzrL/tBn3iv7/UZi/w045zXOow+CgNS?= =?us-ascii?Q?fiXJo2+JQjUEhKPJRoHDR7rmdv9R5C6pths+zjm8JN75TGJRbv2xPy8oTRTw?= =?us-ascii?Q?RhQCc/q9WFnQsdxbc+QYrmsto+pj7C114PsE3PFZdKIHgzf8Qhn7e+aehj++?= =?us-ascii?Q?IYi8rxbJIza2Yu7eYqG3lcW/ubU896oVRUzLLkX5Iyy9N/G58JHymuxDviT7?= =?us-ascii?Q?8J8wRhY0VRgHzv7HwUXcMsc3PR5dupwlG4/isD02XY1qtaQsvjfiLgUhFdPH?= =?us-ascii?Q?qCYUiudaVkL5MuDc+52hxltw1bUqjrlWzGdicZimBW3io7BJDHpuZNf4z26F?= =?us-ascii?Q?dC8d2S0bnb4tpRutFTpaNRPAVfbNQzDQR/I2mhsJAIbhT2k0Y5L/Job9Vm42?= =?us-ascii?Q?7IpLuLUksBMFeiWX6od3QYAx37wIKV75kSafXkZy/Po6/mjBzW+IH3DK7nn0?= =?us-ascii?Q?BRWcI6oFP+j3E6T04S5HiMYJ37SUBKccKUgqGAcqhYsklqL5VlBJ31IsjM5K?= =?us-ascii?Q?+Fcy8Xp1aSCHLGOg0R52KqHZWr/bTJs9Zi6/m89fqqo7c3y25V35a0s8KbJi?= =?us-ascii?Q?rf5udJsPi9S6nE/Tu0PFD3YK+yHetyOImjNPmQvux0EIj47wdHeVOyOLzedr?= =?us-ascii?Q?6tP+W/2TVBP+I7x2Y49oKbeIXnUXXaTm9HydlwidKjibPZ6kl071Cmsx0To5?= =?us-ascii?Q?f/9Fmmx81o+ID9h+Za4kjvqz8vHJ3HmSBv6cZl9dSJYfDK3fgUrbULlpEILH?= =?us-ascii?Q?pfoAzMaLHdJYmlSX9ywNqCH0H8zeUAksCTN2QOe8LeX4iDIACYbJiQtrXcDA?= =?us-ascii?Q?ULce8SXKwqSGo5x/mLCYRggUzpZVvm70UUrFQXWpOH8TIFcNPnrZ2sXds0S8?= =?us-ascii?Q?f5D/slWJK7jzgKTEdzXMD8Ha3c7QLDWxEmpip5fl9CzTiAVih7zdA5H4C20K?= =?us-ascii?Q?WD6rGAWav6Y9u1fPMRlOcA8mGO0nOGjCZpVU9Jxg5KypbZu77G4nVRsq250X?= =?us-ascii?Q?hGR0VCuOq2yoD5jZ+gqGMOnkYCqyhm0+ro6PKDusui3B1RPU1MS/XQGJsFlH?= =?us-ascii?Q?pfRFc90zfZBfDCUUxiPVNMuKyE/TU0w8LWpRhhfm6awW+WoyQM1yb1pYXoJy?= =?us-ascii?Q?mwUsTBwiJkszgoETg7Mb1SIExBELg3zjlb2DKoNvpPc9VBUBBS7a4MYrimM6?= =?us-ascii?Q?of6LuK7qaYc+bmEDZJ7AhzuUio+BD1Oto3Lq6XtzpWcs5ODgW2eHslRXK2NG?= =?us-ascii?Q?WtblDAgbHyQ7EQ6flhPHZobo/vfkNmqyB0/UHfTZg6xUXsAKfGlO/Ac5/GQU?= =?us-ascii?Q?sZuc8OFxWgkVZJDDfZebuR6vmKUxfNxfMdeyCtCzjcek0X0+5bUZ28O/UnmO?= =?us-ascii?Q?h3rUDN6lGW7rvJA4Zg0kVS0bkNn6FrxFpNPBtKNROE4T6oMGmO9GcFh56ald?= =?us-ascii?Q?02i+XmyVO4JEv0u3JmLNddrGdQdW/tm4j065LGc/F/1c47sfmUYdWFimfQTw?= =?us-ascii?Q?/Ij2ct8bP2H+bXbsZl9MJX6hffADxoO3U1K8++t3MMEzvABPzzwHuPN1/7mF?= =?us-ascii?Q?xwfMHyiMQbRd667TclU=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:23.6470 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f5a21206-6671-43c3-4caa-08de374df185 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6396 Content-Type: text/plain; charset="utf-8" To find a region's root decoder, the endpoint's HPA range is used to search the matching decoder by its range. With address translation the endpoint decoder's range is in a different address space and thus cannot be used to determine the root decoder. The region parameters are encapsulated within struc cxl_region_context and may include the translated Host Physical Address (HPA) range. Use this context to identify the root decoder rather than relying on the endpoint. Modify cxl_find_root_decoder() and add the region context as parameter. Rename this function to get_cxl_root_decoder() as a counterpart to put_cxl_root_decoder(). Simplify the implementation by removing function cxl_port_find_switch_decode(). The function is unnecessary because it is not referenced or utilized elsewhere in the code. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 50 +++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 26 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 71e80223f475..e4efb281def4 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3466,47 +3466,44 @@ static int devm_cxl_add_dax_region(struct cxl_regio= n *cxlr) return rc; } =20 -static int match_decoder_by_range(struct device *dev, const void *data) +static int match_root_decoder(struct device *dev, const void *data) { const struct range *r1, *r2 =3D data; - struct cxl_decoder *cxld; + struct cxl_root_decoder *cxlrd; =20 - if (!is_switch_decoder(dev)) + if (!is_root_decoder(dev)) return 0; =20 - cxld =3D to_cxl_decoder(dev); - r1 =3D &cxld->hpa_range; - return range_contains(r1, r2); -} - -static struct cxl_decoder * -cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa_rang= e) -{ - struct device *cxld_dev =3D device_find_child(&port->dev, hpa_range, - match_decoder_by_range); + cxlrd =3D to_cxl_root_decoder(dev); + r1 =3D &cxlrd->cxlsd.cxld.hpa_range; =20 - return cxld_dev ? to_cxl_decoder(cxld_dev) : NULL; + return range_contains(r1, r2); } =20 +/* + * Note, when finished with the device, drop the reference with + * put_device() or use the put_cxl_root_decoder helper. + */ static struct cxl_root_decoder * -cxl_find_root_decoder(struct cxl_endpoint_decoder *cxled) +get_cxl_root_decoder(struct cxl_endpoint_decoder *cxled, + struct cxl_region_context *ctx) { struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); struct cxl_port *port =3D cxled_to_port(cxled); struct cxl_root *cxl_root __free(put_cxl_root) =3D find_cxl_root(port); - struct cxl_decoder *root, *cxld =3D &cxled->cxld; - struct range *hpa_range =3D &cxld->hpa_range; + struct device *cxlrd_dev; =20 - root =3D cxl_port_find_switch_decoder(&cxl_root->port, hpa_range); - if (!root) { + cxlrd_dev =3D device_find_child(&cxl_root->port.dev, &ctx->hpa_range, + match_root_decoder); + if (!cxlrd_dev) { dev_err(cxlmd->dev.parent, "%s:%s no CXL window for range %#llx:%#llx\n", - dev_name(&cxlmd->dev), dev_name(&cxld->dev), - hpa_range->start, hpa_range->end); - return NULL; + dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), + ctx->hpa_range.start, ctx->hpa_range.end); + return ERR_PTR(-ENXIO); } =20 - return to_cxl_root_decoder(&root->dev); + return to_cxl_root_decoder(cxlrd_dev); } =20 static int match_region_by_range(struct device *dev, const void *data) @@ -3703,9 +3700,10 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *c= xled) }; =20 struct cxl_root_decoder *cxlrd __free(put_cxl_root_decoder) =3D - cxl_find_root_decoder(cxled); - if (!cxlrd) - return -ENXIO; + get_cxl_root_decoder(cxled, &ctx); + + if (IS_ERR(cxlrd)) + return PTR_ERR(cxlrd); =20 /* * Ensure that, if multiple threads race to construct_region() --=20 2.47.3 From nobody Thu Dec 18 08:39:01 2025 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010010.outbound.protection.outlook.com [52.101.56.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 023063009E5; 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Tue, 9 Dec 2025 12:08:24 -0600 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , Gregory Price , "Fabio M. De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 08/13] cxl: Introduce callback for HPA address ranges translation Date: Tue, 9 Dec 2025 19:06:44 +0100 Message-ID: <20251209180659.208842-9-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E6:EE_|DM4PR12MB6135:EE_ X-MS-Office365-Filtering-Correlation-Id: 941406db-9206-4b54-b83c-08de374df39f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|7416014|82310400026; X-Microsoft-Antispam-Message-Info: =?utf-8?B?S3pWTzRjUjUrM0N2NW03QnA4bkdDNE1ham1reGJNTjNnVTlEV2c5aGZKbTdB?= =?utf-8?B?aXlkYXRVY0xMS1VwRVdQbS9UOUJtNVhTM1NNV0xIcjBUa2dwVW9oemphQ3B3?= =?utf-8?B?L1IzUFRBVVRrV3RrTTV0WTk0S1NDc0l3V0pDVnZ5UG5HZEtTUWpzTTVlSTNn?= =?utf-8?B?RlBMeW93eEthMXduQy8vYTdoRkdQZ1A2Q0dva0VVOUdqYTFHbHpYYXVFYkxQ?= =?utf-8?B?YU55aDRnbWVkTVdRQXRzZW5yRm41WlZ1VjVMbVZQd3Z5Q3dxQ2RJVXFka3U5?= =?utf-8?B?cUZCVjhGOGJYcXZyek9KaDVGT05KeVBBcG16cXFDa3RuSjk5QXIyQmJXODc2?= =?utf-8?B?TzJUeEhITGc2Q1ZBSkdlNzV5eU9IZktrbVBNcWpJTmtGMmpPdTJPeC9FdHNZ?= =?utf-8?B?ajJoU1Ayb1o0NkhRSk1NWVpNd1Nxbzc3YzJxWDdOaXRuMXFEcUVYUklnSXR6?= =?utf-8?B?cTdjS0ZIUklpTWppN04rVExOVSt0M21UNHV3TDZ4eHVjcVBMME1NR0w2dTF6?= =?utf-8?B?RE12U2MzR0F5ZTMzWVk5WCtnbU9aVElsWExVaHRETlJUWm5PcmJzYnRTVXk4?= =?utf-8?B?VXBZM25PVS9ZVG5CL2RlSWphR1ZyZW5xKzBmSnJwMnpCZjFNNDJSZU13bitr?= =?utf-8?B?Q204K1E5ZjVrTFZ2RENicWd3bmpob3h3bHNDUU5uWnJtK3VrcEpESzFVaE5k?= =?utf-8?B?aW1KbTJpNTg3WnRibnVJa2V3bC9KdXpWUHp1UGEvMVJ5MkUrLzBZN1p2dzRw?= =?utf-8?B?Tkx5bHFUVVFjdVNBUEEzNU9mVXA4TDBBYXpLSlN1Y2JHT29ZNHpSUWxEZlRF?= =?utf-8?B?aXlITUJYWGltTFZ6SXV2Zm05eGI5ZmV3eUdLWEdsSzRSN3JrcW41NFliWUl2?= =?utf-8?B?Z2NkSFZJUjZyaVZIMFJYcHp2S0tQTzVOR2JFUHlDL0h3TWxzVmQvMWQzRjFY?= =?utf-8?B?KyttRmlnVWVWWUt6dzRJbzhzcjIvbEs2SGczeVJ4S1hac3k1R3VxV01KMXRZ?= =?utf-8?B?NHU5bVR5anpWN1Y2bHh5dVdSQVZKcVRlUGZMUnNoMnA2cDlMWWZFdUZrNVVz?= =?utf-8?B?Sis1ZEYyMlZMUUpFSlg4bDlsWGxVSVNzcm5vLzQrc3hEUUkxM0VMSkJMSzIy?= =?utf-8?B?bzl3WEY3QkVNRlp0YVFVRHp4RWtiOE5CQStUcVZEYVJQeWdFY3BJSXJCcVlD?= =?utf-8?B?RGlhY0Q0SHE2Z3YzeEIrMG5RMUZOSjgxNGw5VEtoMHo2QXI4MmdYbEhwQ0pt?= =?utf-8?B?U0lVR3VEMHloU1NYOFp1R2FQeGowSE5qM29YL2p5cXhkbG1PcFBjY1FQanB2?= =?utf-8?B?SmpsUE9NbmFEWVRkbUpoRDNXN3FudEdpVVE0bjdyU21Vc3krbVVsU0M0Si9j?= =?utf-8?B?MCtrc2xXMVdXbE1tdFV3cXlWSDFncnNZOEx0K0l5c2hhTGI0d1VmWU5ucHNH?= =?utf-8?B?cE9WQi9BaW9QT3N1NTRYQ0Y5VmErRysybE84ZGpiNlN6Ty95bWxYUFRwRjZY?= =?utf-8?B?c0Z0bHhIZ0Qzbm4yVGNFaHBxeEFrREhLRnZveHg4eE85b0ZCdWgxbTJBOGlm?= =?utf-8?B?RHlIRzFJYmdESXRQT0Jidm41TUhIR2xnOFhtdmtaVndndW0rTER0dzEvdEQv?= =?utf-8?B?d2I5dlpja1BtYXRVNDVRT3kxNXdROSsxcjZnZWpibEdiUXVyNDJoUjB5bGc4?= =?utf-8?B?cUJ1SCtjQ2dnSzM5cmZGZVY1MlNpTFdlRktZSkZqRURTcHhWNitubXhrWjJ6?= =?utf-8?B?TWhVZkVWZDlyNHFhNFg0MlcrVi9jNkYwZlJZb3QzMEMyK3d0RGJMeitDWjc5?= =?utf-8?B?ZmdIelZKVGZwTVN2b2dnbGFGcHBnblRoV1VIZTNZYzFtNklhZ1diaXRJa0gv?= =?utf-8?B?cTdLRDRYbEVKbm55bGg4bW9JSmRGYTE2MGtTamdNdk8wMnhRMVBDMXNWWTZy?= =?utf-8?B?djR0YVRwTTVybUlUek54UjR2Lzg0MWxiZ3dIVllxemcrb3hVVGc5aUYrS0pH?= =?utf-8?B?VFpydHlCUU4zekxmNXJkUUIxMjYwSVNzYVFhWjg5VmJ2aHExRmtwNndnWWdn?= =?utf-8?B?ZjN5NEFQSEM1TGxSd3dsVXRLUE5LVmZHeEJyRzlHTlAvbTV1UktRUkhPNVhV?= =?utf-8?Q?JsLs=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(376014)(7416014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:27.1207 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 941406db-9206-4b54-b83c-08de374df39f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6135 Introduce a callback to translate an endpoint's HPA range to the address range of the root port which is the System Physical Address (SPA) range used by a region. The callback can be set if a platform needs to handle address translation. The callback is attached to the root port. An endpoint's root port can easily be determined in the PCI hierarchy without any CXL specific knowledge. This allows the early use of address translation for CXL enumeration. Address translation is esp. needed for the detection of the root decoders. Thus, the callback is embedded in struct cxl_root_ops instead of struct cxl_rd_ops. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 24 ++++++++++++++++++++++++ drivers/cxl/cxl.h | 1 + 2 files changed, 25 insertions(+) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index e4efb281def4..c7ac78f1b644 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3480,6 +3480,15 @@ static int match_root_decoder(struct device *dev, co= nst void *data) return range_contains(r1, r2); } =20 +static int cxl_root_setup_translation(struct cxl_root *cxl_root, + struct cxl_region_context *ctx) +{ + if (!cxl_root->ops.translation_setup_root) + return 0; + + return cxl_root->ops.translation_setup_root(cxl_root, ctx); +} + /* * Note, when finished with the device, drop the reference with * put_device() or use the put_cxl_root_decoder helper. @@ -3492,6 +3501,21 @@ get_cxl_root_decoder(struct cxl_endpoint_decoder *cx= led, struct cxl_port *port =3D cxled_to_port(cxled); struct cxl_root *cxl_root __free(put_cxl_root) =3D find_cxl_root(port); struct device *cxlrd_dev; + int rc; + + /* + * Adjust the endpoint's HPA range and interleaving + * configuration to the root decoder=E2=80=99s memory space before + * setting up the root decoder. + */ + rc =3D cxl_root_setup_translation(cxl_root, ctx); + if (rc) { + dev_err(cxlmd->dev.parent, + "%s:%s Failed to setup translation for address range %#llx:%#llx\n", + dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), + ctx->hpa_range.start, ctx->hpa_range.end); + return ERR_PTR(rc); + } =20 cxlrd_dev =3D device_find_child(&cxl_root->port.dev, &ctx->hpa_range, match_root_decoder); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 0e15dc6e169f..8ea334d81edf 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -652,6 +652,7 @@ struct cxl_root_ops { int (*qos_class)(struct cxl_root *cxl_root, struct access_coordinate *coord, int entries, int *qos_class); + int (*translation_setup_root)(struct cxl_root *cxl_root, void *data); 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 09/13] cxl/acpi: Prepare use of EFI runtime services Date: Tue, 9 Dec 2025 19:06:45 +0100 Message-ID: <20251209180659.208842-10-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E5:EE_|DM4PR12MB7552:EE_ X-MS-Office365-Filtering-Correlation-Id: 51920dbc-c28a-45e4-3348-08de374df5c7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?7EXQOCoVO4/qpkofhZlYcTxuA+aLqX//pmDU1cRmxpD0uQh6RAX4hwUHloXA?= =?us-ascii?Q?aDalAF29S2ez98iobAUocGBnI6QB9bhvYhnolm0wxGrPdpD+Jw1qYzYtU0WR?= =?us-ascii?Q?I5LxFLgF9xjnJXXAWkGGKfp22CDaQE8uKMRv56WVqbEWuVoeDEQGDEUcJTJn?= =?us-ascii?Q?7iGbuPj46vvj098Rcz6WlBGUWR9lEb2XjKXHoqVPjwmfqd0E3tYVpH8UMFMr?= =?us-ascii?Q?S73gdIMDUVgZDKlFDmNbrL2mKWRPvuVoXQgyPlq9reNiCp+U/khF3GGrZ7ME?= =?us-ascii?Q?NQIlcepteKCsO5nDaczUAAFjsNyX3dFLj9dyXLwk8gpyTZoIPD6fvZZ6I0G9?= =?us-ascii?Q?UVJqZ9hJ2Hu1N5zjmOBAXiR+YIIoSQBnKWBH4JUr66Ibv4RoiA4NxzN7kTQ3?= =?us-ascii?Q?p+F3HfJ40FXuDFlEFpLfzeAT8U1uCuGDk+J4n2DRU6ktyIaN2hA/Fkix6KPl?= =?us-ascii?Q?qu8no7nEHTxrFvSpn0imknMuuLmDS/VDJaAn0f3HWM7bGVvY2gCNrKQrebLn?= =?us-ascii?Q?xk4xMfDAobUGyzkB0BjbMFD+g6VR/EzekzjrwKaf1YBhBYZWNhftEzvv97ik?= =?us-ascii?Q?8JEeIrnNZgMZ90ak00vjRQkLta13sOFJkAVm5YQC0ae6wpwS6vIl1b0V3+Gd?= =?us-ascii?Q?H010EdsDxLIMkbvWCW78jcZq4o30h7qTEydUnf3l+G6WCzqWupUbZADbUBib?= =?us-ascii?Q?O9Odq5Zi8xgH3iLG4dF8ES5zeGQncqn4ETY9I/VmTqLJEH1lHHxHPvg2jp/v?= =?us-ascii?Q?fEPVFAAyDEeZfndCluTqJx8apvIoprhCbfJ3Lr1SQJf/HItfFv+5xooX7mYr?= =?us-ascii?Q?qrgDC3iJgrxUmezVlfd+eJJ6H+pFjzes7T6NKYOWY7Si0XOjtYhLc6ArN+oh?= =?us-ascii?Q?CRf7mn0JgUevl1tWDZzwGMhAUeM7i5rZsV5Jh2TFKdjt4opbA2/6bv4X2g7B?= =?us-ascii?Q?6Kn7Jux/3e3tcD/QBQ24AjCNdjmu5unq4g5M5/CJPLeGU1mPDM99boNs1ka6?= =?us-ascii?Q?IQpsJo3bxSZz991qG7Ra+gmZwno2h3tuR8oQ6HKwRAAKu4kpFDFgQGgvJG8c?= =?us-ascii?Q?/stS5zRUN5ClrXXKhE4tV9JmgZXq5u/Pg+Zx4rIOcXS11NDfi6G6jhbF5SV7?= =?us-ascii?Q?ZjxlZISevdTKxUbcT5g0S7okqdGfDaCYoLK1eEASNXGap78x3HriqC/g+521?= =?us-ascii?Q?Cs+XuS2DD0jlGZnfm7ZSlHmBYBrmbDLIm2ZI+PFgR1qGkLIiOoc2wsSflMnh?= =?us-ascii?Q?0UMEj6btx/6j33km2tgLzndu5A1omhX+KMYuKXqvQ/LimTRDsiPAKUDYk9GG?= =?us-ascii?Q?OjziBpkwO6BLl4ytxTGavC9TlPomniG8Mj40U2aSZqKbp//USaXVfdANsubM?= =?us-ascii?Q?nE3o5LkzBNhN7IjujzSxOfPUrQC7a8Mmo65P0MY+ctXsTAdRqfvd10zbtK43?= =?us-ascii?Q?YW5/ZI5yMR97F5eG6bePQYE4GpiHq7HYx8bi9JcSXulZ5vF9uNEsofQlbyf8?= =?us-ascii?Q?YSK9U4ca2m2Gvghc4zwejUWkwCLyQqf8rER4tGEk2LuazenZgtdsnJrmnSNe?= =?us-ascii?Q?CIT2yqQqPPG0DZJpZPQ=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:30.7336 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 51920dbc-c28a-45e4-3348-08de374df5c7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7552 Content-Type: text/plain; charset="utf-8" In order to use EFI runtime services, esp. ACPI PRM which uses the efi_rts_wq workqueue, initialize EFI before CXL ACPI. There is a subsys_initcall order dependency if driver is builtin: subsys_initcall(cxl_acpi_init); subsys_initcall(efisubsys_init); Prevent the efi_rts_wq workqueue being used by cxl_acpi_init() before its allocation. Use subsys_initcall_sync(cxl_acpi_init) to always run efisubsys_init() first. Reported-by: Gregory Price Tested-by: Joshua Hahn Reviewed-by: Joshua Hahn Reviewed-by: Gregory Price Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index b4bed40ef7c0..a31d0f97f916 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -1005,8 +1005,12 @@ static void __exit cxl_acpi_exit(void) cxl_bus_drain(); } =20 -/* load before dax_hmem sees 'Soft Reserved' CXL ranges */ -subsys_initcall(cxl_acpi_init); +/* + * Load before dax_hmem sees 'Soft Reserved' CXL ranges. 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 10/13] cxl: Enable AMD Zen5 address translation using ACPI PRMT Date: Tue, 9 Dec 2025 19:06:46 +0100 Message-ID: <20251209180659.208842-11-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E5:EE_|LV8PR12MB9418:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d7ddbe3-92fc-4f7a-9611-08de374df837 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014|7416014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?dVdSR05tQTcxSDBoUjV4VzhOUVJlbk9NQkJOVDE4WlNYdTR3TUhsUGNvMUlX?= =?utf-8?B?L1lLS21YNVUwMTJmU2QxdnFQNUF3TkE2b2o4ZW1mYnZaclUwUzhjRWVEbVJo?= =?utf-8?B?UDFBRW55VTh4KzVXTDZpdG5aVTFDTW1xcFdwVkl6TGxWWGxjOFVLSmRqMHc3?= =?utf-8?B?bEtBc2Fkb0FmeUQ0ZHpybmNRdk10ZmxiZ01GODc3eldLSlA3aklyeVdnZTZw?= =?utf-8?B?Vm9vMmgxWmFETHpmVzI4N1g0VTl5UE9NWU1CcVRTNjhYUFhCM3FSV2RVQVVn?= =?utf-8?B?M0ZWSW5MYlVmOHNNd250VUEzSzR4QU5XUU15TVpsa0hjb2ZXQ0ZobDdyemw2?= =?utf-8?B?Q1haWVp5L0JyTFA0MktzanBVVXdHcnNWWEV4YnRwWGUyUnZZUUFiM3grNi8x?= =?utf-8?B?UkFKeENCT2NSSEtnanc0cDRFdlU3U3cyV3djVjFIN21pK1dCUVZmek44Smgz?= =?utf-8?B?RVlyRjkvMUQ5RWVWTjNhSkl0VHQ0aHdGeFZuRnRHUEVUNFEzU3lIaEFNSm4r?= =?utf-8?B?OFh2V0lLdXpRaTlkMWZqTUw1N04zZnN6bUJVeUZGZDQxalBSb2ZzbmRrbVhS?= =?utf-8?B?dEMrRHVTa2h1WjduM1labXNiV2dGRStZWVp2eEtCSm9rN3BKR29vUWZIVStJ?= =?utf-8?B?TDkrVnhSL1lPL1Z1TmZ6NHdJeCtQcXJTOUgzRDE4R1V1ckpiZkt3U3NzMWE0?= =?utf-8?B?ZW55OVpQcDFlK3Evd1ByZzVqdkk0YmtXN3NMbWtFYlBpM0lwdHRUM24yQmVZ?= =?utf-8?B?R3JldjRIbFhzRDdVRHc3dUIxVjhWb1VicWt5MGI2UjdoMHdkVWI4cDJJUFZD?= =?utf-8?B?ck5VN013amFwa00zRXZTYXJFWS90cldCcVVEYXJDNnZjWkw1cE9GeHBjSFpm?= =?utf-8?B?Nm5aSFhnRTVpTXVIZ2pCVEt6WmlMbTdtQ0hYKzk4TjBPVk9uVU4rTEFRa1ZG?= =?utf-8?B?ZHFyMUg0dmpURHJ2MXRRbXppbUROZUxJRmVQaG42S2lYWGNNQUIzK2kwV0Vw?= =?utf-8?B?U3RPeU1Eb21CTk9hZW9rdU4zdzdRRmM2R2FqUGFpUTk1VXhRakozSWdsUVBL?= =?utf-8?B?ZTNCdktUazl4SmdCZ0QrMkgycDBOd0dhUnFoQmV5dkFkYXJNSmw5UVk3S0xU?= =?utf-8?B?cnJJQlN2ak54RVRJWVpTMjZ1ZUljZFFrTk9kNXQyM0oxNzkwQjZYTWZSWHpV?= =?utf-8?B?ZUJycVpzWm8wL1ZKQ040Yk5PYUE2bzRSanlMcFdGU3hGQXltNEZiOXJCTHRW?= =?utf-8?B?b0wwdFdGN0NtTDd6TWJ6RkxsQzFnNzFuaTZiTS9RNkszdXh0QU5kWjF3M0Zk?= =?utf-8?B?dGliRlhGSHlSd3UrV1VEckxRQnJEUkVFaXk5c2RvNzNwQmo5TWhqeWgwaGNo?= =?utf-8?B?STJCcklVVjNOcWwwSElGLy9hWkZXbHlock5DUllVTVVoMFQ1am1BdzRvRjBv?= =?utf-8?B?MGs5SlYzVXh4eEJGWEVSTWRoTW9jWWloRjVnZHZ1RllhSmRxc3I1b1FMU2NH?= =?utf-8?B?VEZYaXRmT25idmpkOVlQdEt1TWtiV1ZsUXMvSjBnRURpV2xOa2E2bTVibm9F?= =?utf-8?B?TTRPdHJ3TXh5UlFqWmFDbUcxWVh1ZkZlcUVaRFROcXBYTXdFQjVUc0kxTmp1?= =?utf-8?B?d1hPbVZNQStzeUdteXRpK21PUFVLL2d0c1FiRVB6aUNpK2lHaTFwOGFqbytS?= =?utf-8?B?Wi9BbDNSdFZKWFlCc2g4ZHRjVFpWUFdPeEN3S3N5Q1NNT3RYYmZqOVJ5allq?= =?utf-8?B?VGJESDE1YmR1eHJDc0Z6SDY2eTA5ejJsZ0kzUDR6ajlxWkQ4UlBrWXZla0Zv?= =?utf-8?B?Zk9pSjVURTNOWlFlT0FselNtZit0WVpkUEp0SHJ6SGZ2V3Z2WHQwTVVBeWo1?= =?utf-8?B?NlF3RWtrN0Q2QnR3aDJ4WUhpQXEwM1FwQXQ0bjMwekZmeFprSWlXR0dRTFI3?= =?utf-8?B?S1N1WVhqNTVnMGx2TVZsNTJaV3N0dGZxRUh1clJtWE1NZHkxeksrUUM3ejlZ?= =?utf-8?B?WWVJUWhoV2ZYZFNUeS9ISzlTYkxHOWY5dDFReDdTd2tHeFhoVjdDVjMweFFy?= =?utf-8?B?cnc0VjNXeElJYWQ2UjBPaEt1ZGQ5cVU0YWNZdnppNVp2VzhOZ2xONjlOekNj?= =?utf-8?Q?HmCk=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:34.8800 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d7ddbe3-92fc-4f7a-9611-08de374df837 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9418 Add AMD Zen5 support for address translation. Zen5 systems may be configured to use 'Normalized addresses'. Then, host physical addresses (HPA) are different from their system physical addresses (SPA). The endpoint has its own physical address space and an incoming HPA is already converted to the device's physical address (DPA). Thus it has interleaving disabled and CXL endpoints are programmed passthrough (DPA =3D=3D HPA). Host Physical Addresses (HPAs) need to be translated from the endpoint to its CXL host bridge, esp. to identify the endpoint's root decoder and region's address range. ACPI Platform Runtime Mechanism (PRM) provides a handler to translate the DPA to its SPA. This is documented in: AMD Family 1Ah Models 00h=E2=80=930Fh and Models 10h=E2=80=931Fh ACPI v6.5 Porting Guide, Publication # 58088 https://www.amd.com/en/search/documentation/hub.html With Normalized Addressing this PRM handler must be used to translate an HPA of an endpoint to its SPA. Do the following to implement AMD Zen5 address translation: Introduce a new file core/atl.c to handle ACPI PRM specific address translation code. Naming is loosely related to the kernel's AMD Address Translation Library (CONFIG_AMD_ATL) but implementation does not depend on it, nor it is vendor specific. Use Kbuild and Kconfig options respectively to enable the code depending on architecture and platform options. AMD Zen5 systems support the ACPI PRM CXL Address Translation firmware call (see ACPI v6.5 Porting Guide, Address Translation - CXL DPA to System Physical Address). Firmware enables the PRM handler if the platform has address translation implemented. Check firmware and kernel support of ACPI PRM using the specific GUID. On success enable address translation by setting up the earlier introduced root port callback, see function cxl_prm_setup_translation(). Setup is done in cxl_setup_prm_address_translation(), it is the only function that needs to be exported. For low level PRM firmware calls, use the ACPI framework. Identify the region's interleaving ways by inspecting the address ranges. Also determine the interleaving granularity using the address translation callback. Note that the position of the chunk from one interleaving block to the next may vary and thus cannot be considered constant. Address offsets larger than the interleaving block size cannot be used to calculate the granularity. Thus, probe the granularity using address translation for various HPAs in the same interleaving block. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/Kconfig | 5 + drivers/cxl/acpi.c | 2 + drivers/cxl/core/Makefile | 1 + drivers/cxl/core/atl.c | 197 ++++++++++++++++++++++++++++++++++++++ drivers/cxl/cxl.h | 7 ++ 5 files changed, 212 insertions(+) create mode 100644 drivers/cxl/core/atl.c diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index 48b7314afdb8..103950a9b73e 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -233,4 +233,9 @@ config CXL_MCE def_bool y depends on X86_MCE && MEMORY_FAILURE =20 +config CXL_ATL + def_bool y + depends on CXL_REGION + depends on ACPI_PRMT && AMD_NB + endif diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index a31d0f97f916..50c2987e0459 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -925,6 +925,8 @@ static int cxl_acpi_probe(struct platform_device *pdev) cxl_root->ops.qos_class =3D cxl_acpi_qos_class; root_port =3D &cxl_root->port; =20 + cxl_setup_prm_address_translation(cxl_root); + rc =3D bus_for_each_dev(adev->dev.bus, NULL, root_port, add_host_bridge_dport); if (rc < 0) diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile index 5ad8fef210b5..11fe272a6e29 100644 --- a/drivers/cxl/core/Makefile +++ b/drivers/cxl/core/Makefile @@ -20,3 +20,4 @@ cxl_core-$(CONFIG_CXL_REGION) +=3D region.o cxl_core-$(CONFIG_CXL_MCE) +=3D mce.o cxl_core-$(CONFIG_CXL_FEATURES) +=3D features.o cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) +=3D edac.o +cxl_core-$(CONFIG_CXL_ATL) +=3D atl.o diff --git a/drivers/cxl/core/atl.c b/drivers/cxl/core/atl.c new file mode 100644 index 000000000000..8293a55127cb --- /dev/null +++ b/drivers/cxl/core/atl.c @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2025 Advanced Micro Devices, Inc. + */ + +#include +#include +#include + +#include +#include "core.h" + +/* + * PRM Address Translation - CXL DPA to System Physical Address + * + * Reference: + * + * AMD Family 1Ah Models 00h=E2=80=930Fh and Models 10h=E2=80=931Fh + * ACPI v6.5 Porting Guide, Publication # 58088 + */ + +static const guid_t prm_cxl_dpa_spa_guid =3D + GUID_INIT(0xee41b397, 0x25d4, 0x452c, 0xad, 0x54, 0x48, 0xc6, 0xe3, + 0x48, 0x0b, 0x94); + +struct prm_cxl_dpa_spa_data { + u64 dpa; + u8 reserved; + u8 devfn; + u8 bus; + u8 segment; + u64 *spa; +} __packed; + +static u64 prm_cxl_dpa_spa(struct pci_dev *pci_dev, u64 dpa) +{ + struct prm_cxl_dpa_spa_data data; + u64 spa; + int rc; + + data =3D (struct prm_cxl_dpa_spa_data) { + .dpa =3D dpa, + .devfn =3D pci_dev->devfn, + .bus =3D pci_dev->bus->number, + .segment =3D pci_domain_nr(pci_dev->bus), + .spa =3D &spa, + }; + + rc =3D acpi_call_prm_handler(prm_cxl_dpa_spa_guid, &data); + if (rc) { + pci_dbg(pci_dev, "failed to get SPA for %#llx: %d\n", dpa, rc); + return ULLONG_MAX; + } + + pci_dbg(pci_dev, "PRM address translation: DPA -> SPA: %#llx -> %#llx\n",= dpa, spa); + + return spa; +} + +static int cxl_prm_setup_root(struct cxl_root *cxl_root, void *data) +{ + struct cxl_region_context *ctx =3D data; + struct cxl_endpoint_decoder *cxled =3D ctx->cxled; + struct cxl_decoder *cxld =3D &cxled->cxld; + struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); + struct range hpa_range =3D ctx->hpa_range; + struct pci_dev *pci_dev; + u64 spa_len, len =3D range_len(&hpa_range); + u64 addr, base_spa, base; + int ways, gran; + + /* + * When Normalized Addressing is enabled, the endpoint maintains a 1:1 + * mapping between HPA and DPA. If disabled, skip address translation + * and perform only a range check. + */ + if (hpa_range.start !=3D cxled->dpa_res->start) + return 0; + + if (!IS_ALIGNED(hpa_range.start, SZ_256M) || + !IS_ALIGNED(hpa_range.end + 1, SZ_256M)) { + dev_dbg(cxld->dev.parent, + "CXL address translation: Unaligned decoder HPA range: %#llx-%#llx(%s)\= n", + hpa_range.start, hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + /* + * Endpoints are programmed passthrough in Normalized Addressing mode. + */ + if (ctx->interleave_ways !=3D 1) { + dev_dbg(&cxld->dev, "unexpected interleaving config: ways: %d granularit= y: %d\n", + ctx->interleave_ways, ctx->interleave_granularity); + return -ENXIO; + } + + if (!cxlmd || !dev_is_pci(cxlmd->dev.parent)) { + dev_dbg(&cxld->dev, "No endpoint found: %s, range %#llx-%#llx\n", + dev_name(cxld->dev.parent), hpa_range.start, + hpa_range.end); + return -ENXIO; + } + + pci_dev =3D to_pci_dev(cxlmd->dev.parent); + + /* Translate HPA range to SPA. */ + base =3D hpa_range.start; + hpa_range.start =3D prm_cxl_dpa_spa(pci_dev, hpa_range.start); + hpa_range.end =3D prm_cxl_dpa_spa(pci_dev, hpa_range.end); + base_spa =3D hpa_range.start; + + if (hpa_range.start =3D=3D ULLONG_MAX || hpa_range.end =3D=3D ULLONG_MAX)= { + dev_dbg(cxld->dev.parent, + "CXL address translation: Failed to translate HPA range: %#llx-%#llx:%#= llx-%#llx(%s)\n", + hpa_range.start, hpa_range.end, ctx->hpa_range.start, + ctx->hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + /* + * Since translated addresses include the interleaving offsets, align + * the range to 256 MB. + */ + hpa_range.start =3D ALIGN_DOWN(hpa_range.start, SZ_256M); + hpa_range.end =3D ALIGN(hpa_range.end, SZ_256M) - 1; + + spa_len =3D range_len(&hpa_range); + if (!len || !spa_len || spa_len % len) { + dev_dbg(cxld->dev.parent, + "CXL address translation: HPA range not contiguous: %#llx-%#llx:%#llx-%= #llx(%s)\n", + hpa_range.start, hpa_range.end, ctx->hpa_range.start, + ctx->hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + ways =3D spa_len / len; + gran =3D SZ_256; + + /* + * Determine interleave granularity + * + * Note: The position of the chunk from one interleaving block to the + * next may vary and thus cannot be considered constant. Address offsets + * larger than the interleaving block size cannot be used to calculate + * the granularity. + */ + if (ways > 1) { + while (gran <=3D SZ_16M) { + addr =3D prm_cxl_dpa_spa(pci_dev, base + gran); + if (addr !=3D base_spa + gran) + break; + gran <<=3D 1; + } + } + + if (gran > SZ_16M) { + dev_dbg(cxld->dev.parent, + "CXL address translation: Cannot determine granularity: %#llx-%#llx:%#l= lx-%#llx(%s)\n", + hpa_range.start, hpa_range.end, ctx->hpa_range.start, + ctx->hpa_range.end, dev_name(&cxld->dev)); + return -ENXIO; + } + + ctx->hpa_range =3D hpa_range; + ctx->interleave_ways =3D ways; + ctx->interleave_granularity =3D gran; + + dev_dbg(&cxld->dev, + "address mapping found for %s (hpa -> spa): %#llx+%#llx -> %#llx+%#llx w= ays:%d granularity:%d\n", + dev_name(cxlmd->dev.parent), base, len, hpa_range.start, + spa_len, ways, gran); + + return 0; +} + +void cxl_setup_prm_address_translation(struct cxl_root *cxl_root) +{ + struct device *host =3D cxl_root->port.uport_dev; + u64 spa; + struct prm_cxl_dpa_spa_data data =3D { .spa =3D &spa }; + int rc; + + /* + * Applies only to PCIe Host Bridges which are children of the CXL Root + * Device (HID=3D=E2=80=9CACPI0017=E2=80=9D). Check this and drop cxl_tes= t instances. + */ + if (!acpi_match_device(host->driver->acpi_match_table, host)) + return; + + /* Check kernel (-EOPNOTSUPP) and firmware support (-ENODEV) */ + rc =3D acpi_call_prm_handler(prm_cxl_dpa_spa_guid, &data); + if (rc =3D=3D -EOPNOTSUPP || rc =3D=3D -ENODEV) + return; + + cxl_root->ops.translation_setup_root =3D cxl_prm_setup_root; +} +EXPORT_SYMBOL_NS_GPL(cxl_setup_prm_address_translation, "CXL"); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 8ea334d81edf..20b0fd43fa7b 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -817,6 +817,13 @@ static inline void cxl_dport_init_ras_reporting(struct= cxl_dport *dport, struct device *host) { } #endif =20 +#ifdef CONFIG_CXL_ATL +void cxl_setup_prm_address_translation(struct cxl_root *cxl_root); +#else +static inline +void cxl_setup_prm_address_translation(struct cxl_root *cxl_root) {} +#endif + struct cxl_decoder *to_cxl_decoder(struct device *dev); struct cxl_root_decoder *to_cxl_root_decoder(struct device *dev); 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 11/13] cxl/atl: Lock decoders that need address translation Date: Tue, 9 Dec 2025 19:06:47 +0100 Message-ID: <20251209180659.208842-12-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E6:EE_|CH3PR12MB8509:EE_ X-MS-Office365-Filtering-Correlation-Id: 3910681e-65b6-4fc8-bc4c-08de374dfa60 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?piNTxzKESdQwLBagPHxTX30joGls6dgGxsyeaT2h12zqoVLYnMJMHyo6rRBZ?= =?us-ascii?Q?SMNqOYJDiKJz9q6KR7rkZtxQK/JLnKdkeZ7UsWyzrznrywVz+BJjbptLPJcl?= =?us-ascii?Q?n2/coWMPke8YGfrodghHCr+rYYqPSRZLlN8D83DFpoVsU+mDv54dSIOP/0PX?= =?us-ascii?Q?DOez+7TyqiWyhsIMJsCTfMFvXDlyS9xo7AGzHGDvQeu3GmnplLOMJzCaQmU6?= =?us-ascii?Q?X2TfuIlLYEpuUKS2TG9gZJVpKIwjzZzbdkmFzEDJODmuAangcdffAF3RaL6Y?= =?us-ascii?Q?FXwnEWNSozPSbmTROVtncMMu6gRCRzRqvvOdJJCunG18n1GmpUl98p86wWV0?= =?us-ascii?Q?WNaXNhZEZ7h7FNCJzfV2YuRewjQz0dQ9AjVeEZXZrVdivxaBjMhCzk6g99Lz?= =?us-ascii?Q?Xrbu3h2OBEEdialJaPy7ZA8b82erhu6NNhKyj4Mwc3WwJiE1fQ/nrk3hctBD?= =?us-ascii?Q?/9P8AFC8gfh/ExkjcSyTwbSJr5T1aUicxAf+bTiYELbUbzja/SnejU5mpkEq?= =?us-ascii?Q?IAt5XipxNj2h0F6FYQAK6EPyAH8/AxYZRIXTc3ebu5dxtH0phFyMRT6z0XqQ?= =?us-ascii?Q?n7xcy7XKgPvV44mcygfZ/dWATGiQH0Afexep3RppkR7RoOIJJ2MVy5ynJrFt?= =?us-ascii?Q?5U2Xr9EvNTtZn44Ql/Ki0IJ7puuXp41y4bSNaiJK/g5VA9hEF6OMT3+4Ttjq?= =?us-ascii?Q?S2zdqbKMayAB9juuZm8+PX7Wxu9ymkDUIDf0EqlOAABb9Mn/6+ekUHJS6CKH?= =?us-ascii?Q?Lrx+O3Km8NGNWPgGi4bslNqOcoj+MsHQo9CyNfjcNeji3xexsrgPnYffoevG?= =?us-ascii?Q?Zrvx5mf11Y3AZ+prMnqmk9iBiStp1NBXBRjzec1uNCue6f5nLyjzIHsa566Z?= =?us-ascii?Q?ScDO4roGxOSP5JlmNfGKubsIKKMmeWBjuxqdaQSN5VBNliPqm/r56k/18XK/?= =?us-ascii?Q?DZcXhSvn4/7axR8dDBc4UK34UJkmjkTug94H7n57sbexK8ZfOz697YxstgCx?= =?us-ascii?Q?dFURsesCNrFjHdUGwRdnzNBJKL7LHpaUHgjfl+sQPcgXg2nyyPy2dfZVlb/w?= =?us-ascii?Q?FBCwqMnIQnwj8IG5YLzYKjW1KriDi4vOCtF6ztB7HCB4BLf7IkP0ApUywVKY?= =?us-ascii?Q?jHowfrCfTNivL6uiGIyPoCkGemHCMrG3rz4Iern4nShCJ2cjxYbkFGijlmRd?= =?us-ascii?Q?JY3oApjFQSYgQQgIFqapqAXDkrLQHng3+9IzZixp3IMAbKs0tqF9QYuNq9Fl?= =?us-ascii?Q?Orop8C5ycrvZpDWjyAlM60VFdutc/RTlpyfDJiswNeKHVRvKnJnqix0hN9WV?= =?us-ascii?Q?VlbvPQfZcY0qo1goKTOBBhDg1DHNCYgTrzpXZwqcGFUDZMfqpka+p6ntmYWg?= =?us-ascii?Q?TITEkCzGjzgtwnDL4OoCWBU6ctJqUZwqfBt7ZcVIxVNZUsWT4aIW4ZDC3KYQ?= =?us-ascii?Q?wbitNpJK0s+cHaMRed5PW7XjzKm056U1X9CDz8a9eIjxIcjNxqCBBvH8YpCi?= =?us-ascii?Q?Z1lLnHXBIpcJ5hsai1s7bAbt1Pn2iV4krirIop1sYNLrZxSkfXLsHJAmza9N?= =?us-ascii?Q?gUnv9dyzEAE/DOxMrGU=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:38.4497 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3910681e-65b6-4fc8-bc4c-08de374dfa60 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8509 Content-Type: text/plain; charset="utf-8" The current kernel implementation does not support endpoint setup with Normalized Addressing. It only translates an endpoint's DPA to the SPA range of the host bridge. Therefore, the endpoint address range cannot be determined, making a non-auto setup impossible. If a decoder requires address translation, reprogramming should be disabled and the decoder locked. The BIOS, however, provides all the necessary address translation data, which the kernel can use to reconfigure endpoint decoders with normalized addresses. Locking the decoders in the BIOS would prevent a capable kernel (or other operating systems) from shutting down auto-generated regions and managing resources dynamically. Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Reviewed-by: Dave Jiang Tested-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/atl.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/cxl/core/atl.c b/drivers/cxl/core/atl.c index 8293a55127cb..4bd2289b8bbb 100644 --- a/drivers/cxl/core/atl.c +++ b/drivers/cxl/core/atl.c @@ -161,6 +161,24 @@ static int cxl_prm_setup_root(struct cxl_root *cxl_roo= t, void *data) return -ENXIO; } =20 + /* + * The current kernel implementation does not support endpoint + * setup with Normalized Addressing. It only translates an + * endpoint's DPA to the SPA range of the host bridge. + * Therefore, the endpoint address range cannot be determined, + * making a non-auto setup impossible. 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 12/13] cxl: Check if ULLONG_MAX was returned from translation functions Date: Tue, 9 Dec 2025 19:06:48 +0100 Message-ID: <20251209180659.208842-13-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E6:EE_|SJ2PR12MB7963:EE_ X-MS-Office365-Filtering-Correlation-Id: e08e9b60-389d-411d-eeb7-08de374dfcfb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|7416014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?zUiEXoJPI73FlnlgTuOUuxRFZkNo+A+C1j1aw9st+VdfkggxZKyJyMU6so0D?= =?us-ascii?Q?K1vxNzt34CZUnI/61XYQJOYNSXkiwePw4jv0NjdfR3392VgKQ6BU+fO/Lz68?= =?us-ascii?Q?XwKJ3SKXgawWt6HteTRGpQegiDlWwb64YhzGRJx0RVAW9WwcGjNt1HL63qqQ?= =?us-ascii?Q?17cp9rnYBzWw7EMm+oiK9oONwpRFrmV/69ge0A0hBBrvKBsPybbG42cVerBt?= =?us-ascii?Q?EvG90dQQpsKVgF5rIhO/GBW1twkpyFP4uls9vl1sXbXuUFsH4lYNgPZ9pje/?= =?us-ascii?Q?qSRlYNazMoK+ciBNdQCNTTctFlzGQfNRia7UBRNfOrYW/Vqj6khUVyVRSIdk?= =?us-ascii?Q?LjYBXCngrz/NGUr41YfGgI9df0rkHe8I8eL6DWhwL3weBSxzrcWQly3l0UNf?= =?us-ascii?Q?f7+Cu6r3J/gjvfS+6WcO1zhlV1GBt7rL53stcHvT2cuiMEKYpk5u2HSHeyaY?= =?us-ascii?Q?qC0cFE4hPmdzv7n0q1MbzO8qI34T4O+jQeZ7k8eqtmzQUxF3YCOfN/hkdhEp?= =?us-ascii?Q?invudN/Vz+nwqyRXFzOeZmsAs+GIuSTPowUMdmBeoAhs12MmP3bTMSRBGJuL?= =?us-ascii?Q?GM40865iupHTAEGieEzUpJNt2Q12REGwJS8FEvaDj4d9nlE5o+809fD/XZaW?= =?us-ascii?Q?VeglkKcIgdcgoPBlXr/ovfDBjQ6Epc4M+j2lzXHZhteHzNF9KroqgYUBr/B3?= =?us-ascii?Q?ddzI1UVRpiCKcyHSp8UOx/NGCDtSpMQJJlVc7WjWj0YPYQB1C+rE2Mu2CXxQ?= =?us-ascii?Q?kcHrBwRsBl2ATQtR2v4FPg1xlbxjmybNgngtOA2Aji1nJmZ7tNhzFqSJdyRo?= =?us-ascii?Q?NlwPRcmayERorTDDPJhMRy9Fy1RCObxwu80SUrQRGbUMrZ11WPEaEjbN1dsg?= =?us-ascii?Q?R+46rSYIchVz/CNBCehkjzO4aCS+R1fnlfeeBxQZ+bYQwNq+QG8QMrnJMPxe?= =?us-ascii?Q?G2uMtZbEtWKPsn5u0Y8vVy6+YWAOJ/izEUCLJfXe+5o9h8/mgdm3XAII9INv?= =?us-ascii?Q?/SsYY+wkJuBgCxbQBOSk/KLV3WALyImge6Q1csdyY6lAYe00PBcFhH98sqKg?= =?us-ascii?Q?P27ncsfS1z5Dl7I+8c+eZvYudnNfi3lFtQe4PonNeyXXj+eGYMUfrlxvEDDn?= =?us-ascii?Q?ZwP94KSZPNsw20nEdoP2SuZ0BBubZpdb01+mZuD7eJ5pFEMUTeij2ZrtIky6?= =?us-ascii?Q?3TVEasGdVb/nI7MT7kj0oxFvfLuzmqWgIf3NiwYV+gwek56r2JMK2EfTdHjN?= =?us-ascii?Q?hJ3dRgFgjWqVQZHBc6bUeojPSAuI9fuDmovURbgp8YjDjk7M4AgQkono32T5?= =?us-ascii?Q?sr29/RSaRNsKvKyFqyyV0aXf6+3+pjffaRz4Cqbu0uwZbvZMo3G1ev3e4KdE?= =?us-ascii?Q?B0tmyx1u7OU3BqB719ywntay73z2rI+2JyXqBVJeOkabITwWulfyJqBcdNQW?= =?us-ascii?Q?MT9O9BHXT6LGLmASyApLLtSFGRZQ+H1Md9oyfFDxT7l3VioSbGFcFZOUp+Xb?= =?us-ascii?Q?VPN4ahvxbezta+ytR2rzHE7S5fYW173ybia90u/bGiYcF2jJQ6VhPKPHGchh?= =?us-ascii?Q?LR0nNdem8OMJ3Py3Edk=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(1800799024)(7416014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:42.8258 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e08e9b60-389d-411d-eeb7-08de374dfcfb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB7963 Content-Type: text/plain; charset="utf-8" The return address of translation functions is not consistently checked for a valid address. Check if ULLONG_MAX was returned. Signed-off-by: Robert Richter --- drivers/cxl/core/hdm.c | 2 +- drivers/cxl/core/region.c | 36 +++++++++++++++++++------- tools/testing/cxl/test/cxl_translate.c | 4 +-- 3 files changed, 29 insertions(+), 13 deletions(-) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 1c5d2022c87a..8b50cdce4b29 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -530,7 +530,7 @@ resource_size_t cxl_dpa_size(struct cxl_endpoint_decode= r *cxled) =20 resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled) { - resource_size_t base =3D -1; + resource_size_t base =3D ULLONG_MAX; =20 lockdep_assert_held(&cxl_rwsem.dpa); if (cxled->dpa_res) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index c7ac78f1b644..2c070c7c7bfe 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3124,7 +3124,7 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const str= uct cxl_memdev *cxlmd, struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_region_params *p =3D &cxlr->params; struct cxl_endpoint_decoder *cxled =3D NULL; - u64 dpa_offset, hpa_offset, hpa; + u64 base, dpa_offset, hpa_offset, hpa; u16 eig =3D 0; u8 eiw =3D 0; int pos; @@ -3142,8 +3142,14 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const st= ruct cxl_memdev *cxlmd, ways_to_eiw(p->interleave_ways, &eiw); granularity_to_eig(p->interleave_granularity, &eig); =20 - dpa_offset =3D dpa - cxl_dpa_resource_start(cxled); + base =3D cxl_dpa_resource_start(cxled); + if (base =3D=3D ULLONG_MAX) + return ULLONG_MAX; + + dpa_offset =3D dpa - base; hpa_offset =3D cxl_calculate_hpa_offset(dpa_offset, pos, eiw, eig); + if (hpa_offset =3D=3D ULLONG_MAX) + return ULLONG_MAX; =20 /* Apply the hpa_offset to the region base address */ hpa =3D hpa_offset + p->res->start + p->cache_size; @@ -3152,6 +3158,9 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const str= uct cxl_memdev *cxlmd, if (cxlrd->ops.hpa_to_spa) hpa =3D cxlrd->ops.hpa_to_spa(cxlrd, hpa); =20 + if (hpa =3D=3D ULLONG_MAX) + return ULLONG_MAX; + if (!cxl_resource_contains_addr(p->res, hpa)) { dev_dbg(&cxlr->dev, "Addr trans fail: hpa 0x%llx not in region\n", hpa); @@ -3176,10 +3185,11 @@ static int region_offset_to_dpa_result(struct cxl_r= egion *cxlr, u64 offset, struct cxl_region_params *p =3D &cxlr->params; struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; struct cxl_endpoint_decoder *cxled; - u64 hpa, hpa_offset, dpa_offset; + u64 hpa_offset =3D offset; + u64 dpa_base, dpa_offset; u16 eig =3D 0; u8 eiw =3D 0; - int pos; + int pos =3D -1; =20 lockdep_assert_held(&cxl_rwsem.region); lockdep_assert_held(&cxl_rwsem.dpa); @@ -3193,13 +3203,14 @@ static int region_offset_to_dpa_result(struct cxl_r= egion *cxlr, u64 offset, * CXL HPA is assumed to equal SPA. */ if (cxlrd->ops.spa_to_hpa) { - hpa =3D cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset); - hpa_offset =3D hpa - p->res->start; - } else { - hpa_offset =3D offset; + hpa_offset =3D cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset); + if (hpa_offset !=3D ULLONG_MAX) + hpa_offset -=3D p->res->start; } =20 - pos =3D cxl_calculate_position(hpa_offset, eiw, eig); + if (hpa_offset !=3D ULLONG_MAX) + pos =3D cxl_calculate_position(hpa_offset, eiw, eig); + if (pos < 0 || pos >=3D p->nr_targets) { dev_dbg(&cxlr->dev, "Invalid position %d for %d targets\n", pos, p->nr_targets); @@ -3213,8 +3224,13 @@ static int region_offset_to_dpa_result(struct cxl_re= gion *cxlr, u64 offset, cxled =3D p->targets[i]; if (cxled->pos !=3D pos) continue; + + dpa_base =3D cxl_dpa_resource_start(cxled); + if (dpa_base =3D=3D ULLONG_MAX) + continue; + result->cxlmd =3D cxled_to_memdev(cxled); - result->dpa =3D cxl_dpa_resource_start(cxled) + dpa_offset; + result->dpa =3D dpa_base + dpa_offset; =20 return 0; } diff --git a/tools/testing/cxl/test/cxl_translate.c b/tools/testing/cxl/tes= t/cxl_translate.c index 2200ae21795c..66f8270aacd8 100644 --- a/tools/testing/cxl/test/cxl_translate.c +++ b/tools/testing/cxl/test/cxl_translate.c @@ -69,7 +69,7 @@ static u64 to_hpa(u64 dpa_offset, int pos, u8 r_eiw, u16 = r_eig, u8 hb_ways, /* Calculate base HPA offset from DPA and position */ hpa_offset =3D cxl_calculate_hpa_offset(dpa_offset, pos, r_eiw, r_eig); =20 - if (math =3D=3D XOR_MATH) { + if (hpa_offset !=3D ULLONG_MAX && math =3D=3D XOR_MATH) { cximsd->nr_maps =3D hbiw_to_nr_maps[hb_ways]; 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Tue, 9 Dec 2025 12:08:42 -0600 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , Gregory Price , "Fabio M. De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v8 13/13] cxl: Disable HPA/SPA translation handlers for Normalized addressing Date: Tue, 9 Dec 2025 19:06:49 +0100 Message-ID: <20251209180659.208842-14-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209180659.208842-1-rrichter@amd.com> References: <20251209180659.208842-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989E6:EE_|MN0PR12MB6246:EE_ X-MS-Office365-Filtering-Correlation-Id: a3fba126-f3a5-4013-71b3-08de374dfebf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|82310400026|7416014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?CG+/ha6A+31wXnSsmC5MX2OARwF9GmlnEJFw3w4Wx+3etTEK8J8wI/YT/SNE?= =?us-ascii?Q?BuSnoNBWFJqvjfKqG8HR4S1UYMBw7OI7ylpgS3UR5LieooenTAvM0u8HlmYg?= =?us-ascii?Q?dg7QXbwGlKAQcDie0IonErC1VvXN8F6OTG6lmPYXAhMbFJfXKGsUFOU7QMoC?= =?us-ascii?Q?0ZtcQska8JCQLJfLH4TSTxlLeD4gL6xTZm95F3xsSGMx4nctZwy1jhwAW5gT?= =?us-ascii?Q?Z7nqgINm2ZoJFhkz2+ChEeDx2Iin/FIqiHGpLh/YUjyLqm/5WKP/yBkK1MyV?= =?us-ascii?Q?qmkvZLyBwplfmkDv2pNWWtbgi3Am5+tvmA9bqTO8UUHmpD6Kms4Hwwr3pwZ7?= =?us-ascii?Q?SgkWdqW1jogu/qk/lSIKmHpPrFYybzovGHhYAekivtwuNfHuTsBmmTlt0mMO?= =?us-ascii?Q?ukl0BmZ87g3cDmU4KWSNVswsTNj/R3QPCHEq0e+dTmiD+EAisZlHwLJs3VJi?= =?us-ascii?Q?VhXg4HJXXgPSYXt0lU58tgJFEKrYzB5D7hZuB6nxk6/ixJVNuC3Ts+YPCSf+?= =?us-ascii?Q?yOy3kKGysYCrk4BQse1L2kVjJzcj7J7zf01Vm124xcnjBVc9C79fgy/ZskMN?= =?us-ascii?Q?rf9E1a6Jtz2kCDTRcpRuQ4H//1lwjlG1a1tkY/HiPrDVByLD4B2B8qSGxRVt?= =?us-ascii?Q?drEU+IvMyZKSS87Kb4DIr8o/EOvoNL9YBBX9MX4IYyPVMdxrpRQfFM2lyzyg?= =?us-ascii?Q?nDc4JcjFGCqF/O+h/kxHBby2+EZwrBhh56OBUeLmxuGsB0DzUJlyZ/zQCc1A?= =?us-ascii?Q?XQztxlWTia0yXzooNwHpXGVcOTkNPYc1dBPHQgS4TtkOSPGJvB40rdyDLv7x?= =?us-ascii?Q?tcj7NOKb5xvly0ErNgzjmwKrA8UA9QXAEnAViCdR/wHvpLcIge03etzKg8on?= =?us-ascii?Q?H/pBaWM6DQSxIcSKZe9PkFBWFeW0BC6tiGKLyc4XTEkKyaLsu+Cg/gEAHDBh?= =?us-ascii?Q?Bbeg2aTMpi18i8YZMY15o9Za4lXrsT+paZwYitDMQRvZd/aYRyyvDXPNgN2b?= =?us-ascii?Q?pjOuaCm5laXO0NtZBVUQfZdLjumoHeO/yv+5noTWFDhhZXB7qVtPOfiUbE9f?= =?us-ascii?Q?WI/A9kRIIqL6NXfKZiSB9fdq4kByy+/h5Ys7X4c+xsXLRgMDMkfbeVcF4s7v?= =?us-ascii?Q?hIIkcCRSrNjjZ4yAsgqQLEuEAwqQ47ey6IehBTNm+pZNctwgntUIQWU7bWQ8?= =?us-ascii?Q?ucGk85OLh6atsNwlrPXrvCAcxND/yMFw8VjK8m39DM2pWhX6FRLAwP63p66A?= =?us-ascii?Q?f00QkHbu490wBZQan2Jl6Akjk+Ntxgp2qVUPao9hivaGhOS5TsQiSvrNDpiw?= =?us-ascii?Q?/0WJpyfLaxvDLPHdUK3IQLsjZ9pseGHa2e45xVL81JCs+ZsjrfeLUrewcf0D?= =?us-ascii?Q?UVQxKAwrmrpejYUnNnU2eyPqPqUEHS7Td4+ljwYQ9aZVZkjaz5rruonxfAkf?= =?us-ascii?Q?zn7RzZ/MEEl3kkvP/XvEMon8RVl6i/tlSxK+OxqdRLvHF9WWEx25XtSxGDeZ?= =?us-ascii?Q?XsMbghrmtRimRYX1xMlvPu1zBcDSDVhIbhy+BNscABXYuyjKSz0O8hFJb3Jt?= =?us-ascii?Q?CVoMnSKHP3/6ZeWtmCk=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(82310400026)(7416014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 18:08:45.7850 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a3fba126-f3a5-4013-71b3-08de374dfebf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E6.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6246 Content-Type: text/plain; charset="utf-8" The root decoder implements callbacks hpa_to_spa and spa_to_hpa to perform Host Physical Address (HPA) and System Physical Address translations respectively. The callbacks are needed in cases where HPA !=3D SPA to convert addresses for tracing and error handling and to setup Poison injection. Currently this is used for XOR interleaving. In AMD Zen5 systems with Normalized addressing, the addresses of endpoints are not SPA and those callbacks need to be implemented. Now, as ACPI PRM translation could be expensive in tracing or error handling code paths, do not yet enable this direction of translation (hpa_to_spa) to avoid its intensive use. Instead, mark the HPA invalid and return an error for this case. The spa_to_hpa callback will be used in region_offset_to_dpa_result() to determine the endpoint by the position in the interleaving chunk. With Normalized addressing, the order of endpoints in the interleaving chunk is implementation defined. Do not use this approach and and return an error instead. Disable both HPA/SPA translation handlers for Normalized addressing by returning an error (ULLONG_MAX). Signed-off-by: Robert Richter --- drivers/cxl/core/atl.c | 35 +++++++++++++++++++++++++++++++++++ drivers/cxl/core/region.c | 21 ++++++++++++++++++++- drivers/cxl/cxl.h | 1 + 3 files changed, 56 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/core/atl.c b/drivers/cxl/core/atl.c index 4bd2289b8bbb..9d05a83bde73 100644 --- a/drivers/cxl/core/atl.c +++ b/drivers/cxl/core/atl.c @@ -57,6 +57,39 @@ static u64 prm_cxl_dpa_spa(struct pci_dev *pci_dev, u64 = dpa) return spa; } =20 +static u64 atl_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa) +{ + /* + * PRM translation could be expensive in tracing or error + * handling code paths. Avoid this for now and return an + * error instead. + */ + + return ULLONG_MAX; +} + +static u64 atl_spa_to_hpa(struct cxl_root_decoder *cxlrd, u64 spa) +{ + /* + * The callback will be used in region_offset_to_dpa_result() + * to determine the endpoint by the position in the + * interleaving chunk. With Normalized addressing, the order + * of endpoints in the interleaving chunk is implementation + * defined. Do not use this approach and and return an error + * instead. + */ + + return ULLONG_MAX; +} + +static int cxl_prm_setup_region(struct cxl_region *cxlr) +{ + cxlr->cxlrd->ops.hpa_to_spa =3D atl_hpa_to_spa; + cxlr->cxlrd->ops.spa_to_hpa =3D atl_spa_to_hpa; + + return 0; +} + static int cxl_prm_setup_root(struct cxl_root *cxl_root, void *data) { struct cxl_region_context *ctx =3D data; @@ -183,6 +216,8 @@ static int cxl_prm_setup_root(struct cxl_root *cxl_root= , void *data) ctx->interleave_ways =3D ways; ctx->interleave_granularity =3D gran; =20 + cxl_root->ops.translation_setup_region =3D cxl_prm_setup_region; + dev_dbg(&cxld->dev, "address mapping found for %s (hpa -> spa): %#llx+%#llx -> %#llx+%#llx w= ays:%d granularity:%d\n", dev_name(cxlmd->dev.parent), base, len, hpa_range.start, diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 2c070c7c7bfe..130af1cf95b7 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -623,6 +623,21 @@ static ssize_t mode_show(struct device *dev, struct de= vice_attribute *attr, } static DEVICE_ATTR_RO(mode); =20 +static int cxl_region_setup_translation(struct cxl_region *cxlr) +{ + struct cxl_port *root =3D to_cxl_port(cxlr->dev.parent->parent); + struct cxl_root *cxl_root; + + if (!root || !is_cxl_root(root)) + return 0; + + cxl_root =3D to_cxl_root(root); + if (!cxl_root || !cxl_root->ops.translation_setup_region) + return 0; + + return cxl_root->ops.translation_setup_region(cxlr); +} + static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size) { struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; @@ -666,7 +681,7 @@ static int alloc_hpa(struct cxl_region *cxlr, resource_= size_t size) p->res =3D res; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 - return 0; + return cxl_region_setup_translation(cxlr); } =20 static void cxl_region_iomem_release(struct cxl_region *cxlr) @@ -3663,6 +3678,10 @@ static int __construct_region(struct cxl_region *cxl= r, p->interleave_granularity =3D ctx->interleave_granularity; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 + rc =3D cxl_region_setup_translation(cxlr); + if (rc) + return rc; + rc =3D sysfs_update_group(&cxlr->dev.kobj, get_cxl_region_target_group()); if (rc) return rc; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 20b0fd43fa7b..f4623728a815 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -653,6 +653,7 @@ struct cxl_root_ops { struct access_coordinate *coord, int entries, int *qos_class); int (*translation_setup_root)(struct cxl_root *cxl_root, void *data); + int (*translation_setup_region)(struct cxl_region *cxlr); }; =20 /** --=20 2.47.3