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client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by DS2PEPF00003446.mail.protection.outlook.com (10.167.17.73) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9412.4 via Frontend Transport; Mon, 8 Dec 2025 16:54:00 +0000 Received: from satlexmb07.amd.com (10.181.42.216) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 8 Dec 2025 10:53:59 -0600 Received: from xsjlizhih51.xilinx.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Mon, 8 Dec 2025 08:53:58 -0800 From: Lizhi Hou To: , , , CC: Lizhi Hou , , , , Subject: [PATCH V2] accel/amdxdna: Fix race condition when checking rpm_on Date: Mon, 8 Dec 2025 08:53:56 -0800 Message-ID: <20251208165356.1549237-1-lizhi.hou@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003446:EE_|LV5PR12MB9801:EE_ X-MS-Office365-Filtering-Correlation-Id: 43be993f-fdb3-4d1e-974d-08de367a62d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Dec 2025 16:54:00.4191 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 43be993f-fdb3-4d1e-974d-08de367a62d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003446.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV5PR12MB9801 Content-Type: text/plain; charset="utf-8" When autosuspend is triggered, driver rpm_on flag is set to indicate that a suspend/resume is already in progress. However, when a userspace application submits a command during this narrow window, amdxdna_pm_resume_get() may incorrectly skip the resume operation because the rpm_on flag is still set. This results in commands being submitted while the device has not actually resumed, causing unexpected behavior. The set_dpm() is called by suspend/resume, it relied on rpm_on flag to avoid calling into rpm suspend/resume recursivly. So to fix this, remove the use of the rpm_on flag entirely. Instead, introduce aie2_pm_set_dpm() which explicitly resumes the device before invoking set_dpm(). With this change, set_dpm() is called directly inside the suspend or resume execution path. Otherwise, aie2_pm_set_dpm() is called. Fixes: 063db451832b ("accel/amdxdna: Enhance runtime power management") Signed-off-by: Lizhi Hou Reviewed-by: Maciej Falkowski Reviewed-by: Mario Limonciello (AMD) --- v2: Removed drm_WARN_ON() from aie2_send_mgmt_msg_wait(). Revise the description. drivers/accel/amdxdna/aie2_message.c | 1 - drivers/accel/amdxdna/aie2_pci.c | 2 +- drivers/accel/amdxdna/aie2_pci.h | 1 + drivers/accel/amdxdna/aie2_pm.c | 17 +++++++++++++++- drivers/accel/amdxdna/aie2_smu.c | 27 ++++--------------------- drivers/accel/amdxdna/amdxdna_pci_drv.h | 1 - drivers/accel/amdxdna/amdxdna_pm.c | 22 ++------------------ 7 files changed, 24 insertions(+), 47 deletions(-) diff --git a/drivers/accel/amdxdna/aie2_message.c b/drivers/accel/amdxdna/a= ie2_message.c index fee3b0627aba..a75156800467 100644 --- a/drivers/accel/amdxdna/aie2_message.c +++ b/drivers/accel/amdxdna/aie2_message.c @@ -39,7 +39,6 @@ static int aie2_send_mgmt_msg_wait(struct amdxdna_dev_hdl= *ndev, if (!ndev->mgmt_chann) return -ENODEV; =20 - drm_WARN_ON(&xdna->ddev, xdna->rpm_on && !mutex_is_locked(&xdna->dev_lock= )); ret =3D xdna_send_msg_wait(xdna, ndev->mgmt_chann, msg); if (ret =3D=3D -ETIME) { xdna_mailbox_stop_channel(ndev->mgmt_chann); diff --git a/drivers/accel/amdxdna/aie2_pci.c b/drivers/accel/amdxdna/aie2_= pci.c index ceef1c502e9e..81a8e4137bfd 100644 --- a/drivers/accel/amdxdna/aie2_pci.c +++ b/drivers/accel/amdxdna/aie2_pci.c @@ -321,7 +321,7 @@ static int aie2_xrs_set_dft_dpm_level(struct drm_device= *ddev, u32 dpm_level) if (ndev->pw_mode !=3D POWER_MODE_DEFAULT || ndev->dpm_level =3D=3D dpm_l= evel) return 0; =20 - return ndev->priv->hw_ops.set_dpm(ndev, dpm_level); + return aie2_pm_set_dpm(ndev, dpm_level); } =20 static struct xrs_action_ops aie2_xrs_actions =3D { diff --git a/drivers/accel/amdxdna/aie2_pci.h b/drivers/accel/amdxdna/aie2_= pci.h index cc9f933f80b2..c6b5cf4ae5c4 100644 --- a/drivers/accel/amdxdna/aie2_pci.h +++ b/drivers/accel/amdxdna/aie2_pci.h @@ -286,6 +286,7 @@ int npu4_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_= level); /* aie2_pm.c */ int aie2_pm_init(struct amdxdna_dev_hdl *ndev); int aie2_pm_set_mode(struct amdxdna_dev_hdl *ndev, enum amdxdna_power_mode= _type target); +int aie2_pm_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level); =20 /* aie2_psp.c */ struct psp_device *aie2m_psp_create(struct drm_device *ddev, struct psp_co= nfig *conf); diff --git a/drivers/accel/amdxdna/aie2_pm.c b/drivers/accel/amdxdna/aie2_p= m.c index 426c38fce848..afcd6d4683e5 100644 --- a/drivers/accel/amdxdna/aie2_pm.c +++ b/drivers/accel/amdxdna/aie2_pm.c @@ -10,6 +10,7 @@ =20 #include "aie2_pci.h" #include "amdxdna_pci_drv.h" +#include "amdxdna_pm.h" =20 #define AIE2_CLK_GATING_ENABLE 1 #define AIE2_CLK_GATING_DISABLE 0 @@ -26,6 +27,20 @@ static int aie2_pm_set_clk_gating(struct amdxdna_dev_hdl= *ndev, u32 val) return 0; } =20 +int aie2_pm_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level) +{ + int ret; + + ret =3D amdxdna_pm_resume_get(ndev->xdna); + if (ret) + return ret; + + ret =3D ndev->priv->hw_ops.set_dpm(ndev, dpm_level); + amdxdna_pm_suspend_put(ndev->xdna); + + return ret; +} + int aie2_pm_init(struct amdxdna_dev_hdl *ndev) { int ret; @@ -94,7 +109,7 @@ int aie2_pm_set_mode(struct amdxdna_dev_hdl *ndev, enum = amdxdna_power_mode_type return -EOPNOTSUPP; } =20 - ret =3D ndev->priv->hw_ops.set_dpm(ndev, dpm_level); + ret =3D aie2_pm_set_dpm(ndev, dpm_level); if (ret) return ret; =20 diff --git a/drivers/accel/amdxdna/aie2_smu.c b/drivers/accel/amdxdna/aie2_= smu.c index bd94ee96c2bc..2d195e41f83d 100644 --- a/drivers/accel/amdxdna/aie2_smu.c +++ b/drivers/accel/amdxdna/aie2_smu.c @@ -11,7 +11,6 @@ =20 #include "aie2_pci.h" #include "amdxdna_pci_drv.h" -#include "amdxdna_pm.h" =20 #define SMU_RESULT_OK 1 =20 @@ -67,16 +66,12 @@ int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_= level) u32 freq; int ret; =20 - ret =3D amdxdna_pm_resume_get(ndev->xdna); - if (ret) - return ret; - ret =3D aie2_smu_exec(ndev, AIE2_SMU_SET_MPNPUCLK_FREQ, ndev->priv->dpm_clk_tbl[dpm_level].npuclk, &freq); if (ret) { XDNA_ERR(ndev->xdna, "Set npu clock to %d failed, ret %d\n", ndev->priv->dpm_clk_tbl[dpm_level].npuclk, ret); - goto suspend_put; + return ret; } ndev->npuclk_freq =3D freq; =20 @@ -85,10 +80,9 @@ int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_l= evel) if (ret) { XDNA_ERR(ndev->xdna, "Set h clock to %d failed, ret %d\n", ndev->priv->dpm_clk_tbl[dpm_level].hclk, ret); - goto suspend_put; + return ret; } =20 - amdxdna_pm_suspend_put(ndev->xdna); ndev->hclk_freq =3D freq; ndev->dpm_level =3D dpm_level; ndev->max_tops =3D 2 * ndev->total_col; @@ -98,35 +92,26 @@ int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_= level) ndev->npuclk_freq, ndev->hclk_freq); =20 return 0; - -suspend_put: - amdxdna_pm_suspend_put(ndev->xdna); - return ret; } =20 int npu4_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level) { int ret; =20 - ret =3D amdxdna_pm_resume_get(ndev->xdna); - if (ret) - return ret; - ret =3D aie2_smu_exec(ndev, AIE2_SMU_SET_HARD_DPMLEVEL, dpm_level, NULL); if (ret) { XDNA_ERR(ndev->xdna, "Set hard dpm level %d failed, ret %d ", dpm_level, ret); - goto suspend_put; + return ret; } =20 ret =3D aie2_smu_exec(ndev, AIE2_SMU_SET_SOFT_DPMLEVEL, dpm_level, NULL); if (ret) { XDNA_ERR(ndev->xdna, "Set soft dpm level %d failed, ret %d", dpm_level, ret); - goto suspend_put; + return ret; } =20 - amdxdna_pm_suspend_put(ndev->xdna); ndev->npuclk_freq =3D ndev->priv->dpm_clk_tbl[dpm_level].npuclk; ndev->hclk_freq =3D ndev->priv->dpm_clk_tbl[dpm_level].hclk; ndev->dpm_level =3D dpm_level; @@ -137,10 +122,6 @@ int npu4_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm= _level) ndev->npuclk_freq, ndev->hclk_freq); =20 return 0; - -suspend_put: - amdxdna_pm_suspend_put(ndev->xdna); - return ret; } =20 int aie2_smu_init(struct amdxdna_dev_hdl *ndev) diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.h b/drivers/accel/amdxdn= a/amdxdna_pci_drv.h index c99477f5e454..0d50c4c8b353 100644 --- a/drivers/accel/amdxdna/amdxdna_pci_drv.h +++ b/drivers/accel/amdxdna/amdxdna_pci_drv.h @@ -101,7 +101,6 @@ struct amdxdna_dev { struct amdxdna_fw_ver fw_ver; struct rw_semaphore notifier_lock; /* for mmu notifier*/ struct workqueue_struct *notifier_wq; - bool rpm_on; }; =20 /* diff --git a/drivers/accel/amdxdna/amdxdna_pm.c b/drivers/accel/amdxdna/amd= xdna_pm.c index fa38e65d617c..d024d480521c 100644 --- a/drivers/accel/amdxdna/amdxdna_pm.c +++ b/drivers/accel/amdxdna/amdxdna_pm.c @@ -15,14 +15,9 @@ int amdxdna_pm_suspend(struct device *dev) { struct amdxdna_dev *xdna =3D to_xdna_dev(dev_get_drvdata(dev)); int ret =3D -EOPNOTSUPP; - bool rpm; =20 - if (xdna->dev_info->ops->suspend) { - rpm =3D xdna->rpm_on; - xdna->rpm_on =3D false; + if (xdna->dev_info->ops->suspend) ret =3D xdna->dev_info->ops->suspend(xdna); - xdna->rpm_on =3D rpm; - } =20 XDNA_DBG(xdna, "Suspend done ret %d", ret); return ret; @@ -32,14 +27,9 @@ int amdxdna_pm_resume(struct device *dev) { struct amdxdna_dev *xdna =3D to_xdna_dev(dev_get_drvdata(dev)); int ret =3D -EOPNOTSUPP; - bool rpm; =20 - if (xdna->dev_info->ops->resume) { - rpm =3D xdna->rpm_on; - xdna->rpm_on =3D false; + if (xdna->dev_info->ops->resume) ret =3D xdna->dev_info->ops->resume(xdna); - xdna->rpm_on =3D rpm; - } =20 XDNA_DBG(xdna, "Resume done ret %d", ret); return ret; @@ -50,9 +40,6 @@ int amdxdna_pm_resume_get(struct amdxdna_dev *xdna) struct device *dev =3D xdna->ddev.dev; int ret; =20 - if (!xdna->rpm_on) - return 0; - ret =3D pm_runtime_resume_and_get(dev); if (ret) { XDNA_ERR(xdna, "Resume failed: %d", ret); @@ -66,9 +53,6 @@ void amdxdna_pm_suspend_put(struct amdxdna_dev *xdna) { struct device *dev =3D xdna->ddev.dev; =20 - if (!xdna->rpm_on) - return; - pm_runtime_put_autosuspend(dev); } =20 @@ -81,14 +65,12 @@ void amdxdna_pm_init(struct amdxdna_dev *xdna) pm_runtime_use_autosuspend(dev); pm_runtime_allow(dev); pm_runtime_put_autosuspend(dev); - xdna->rpm_on =3D true; } =20 void amdxdna_pm_fini(struct amdxdna_dev *xdna) { struct device *dev =3D xdna->ddev.dev; =20 - xdna->rpm_on =3D false; pm_runtime_get_noresume(dev); pm_runtime_forbid(dev); } --=20 2.34.1