From nobody Tue Dec 16 14:43:48 2025 Received: from mail-pf1-f202.google.com (mail-pf1-f202.google.com [209.85.210.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80091306496 for ; Sat, 6 Dec 2025 00:18:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764980332; cv=none; b=lJquN4IfYZHpnvg8mlCRzgotn8Z+aPJy6rA4zaCVfCcm4kiR+rjGJIIiyUnZXakyIuGZm/LYviIftx/ZaSrD3bYVIw/zSV8JJhMkKezeEgJIAAANPOEt0X+3Uw/bX/NA+jhQysvR119HslgGPqR7SH1PubdlABv9riXlLOdJpfM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764980332; c=relaxed/simple; bh=BtLSCOsVaylpZ1Hr4R9W1QzZYCsZevsYtH+m4bBtmCY=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=GYBtx3Cz5nZiAtCQ5m48b1dG8Tk144OG9rJomlAsGhKY8VimdfQO/SyCvkP2UO/j78eqGaH4q+Ew+NOBppgNgS8CdDXLFhBRjhGrq59mYb38jTRS8jdtDd21XghBCwxp06/cWwRFjEb7hV62HgWECFAQ/cU0gglb/bYVGQVyElg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=kj7T8fD8; arc=none smtp.client-ip=209.85.210.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="kj7T8fD8" Received: by mail-pf1-f202.google.com with SMTP id d2e1a72fcca58-7ba92341f38so2730028b3a.0 for ; Fri, 05 Dec 2025 16:18:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1764980330; x=1765585130; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=QTKuKPWFr6bVN6iN1gTHfORH5j78nQLhYRuj2ERNrVM=; b=kj7T8fD8+9J5+pZv791pGIL6U79dOWUAmdv2NfmiJKEjdLa0tjZdQVVJGKmY6iyJpl PjJ0hBuogkK8bkKPpSZULZiQNzodoNsGC887xSD7Es59JUM2u74YYw/6s8xbRqL0doKk AN1umI+Z195X8XiwzKi0+yk9k9Dgv1UvEHKec+1lusxOd9PbF/1u3hCXwokWUr0yg5iZ enrKUZxUAG2j+Zf4LgEcYvRogXL29sXQD/thVxwV+qGvk+ccvq5s5bxAohCr/1jHI+FB N+gtce1ETBPocnoJZ1YUtFK2PlyL/dEXVdNu1ypvx5oEPI/iw1aUFs0X3HRtXw5/PLdz hcdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764980330; x=1765585130; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=QTKuKPWFr6bVN6iN1gTHfORH5j78nQLhYRuj2ERNrVM=; b=YR9DzlV2fVZ9oT02s1VS5MWAixY1n4UWM0W8D0zAVr4vvADwGGJZkGO/oMqNHosqLP Nw39k6hp5OlJh2Nh8ttQtpHbwHdAFQ15Etvel7AWwndeFigelS2QYNsgdnZBESlVGJ3O gK6J2bOfcUVf4AEchMAZPfk6HD5tOvGR6cZ+oOX0tmXV2qWKxs8dDcPl3rLt0kOKTBc9 jdcpmGCzczrBZTmLPCqoFqYHITyF7VTRhoF/RprSsCW8m8YzwT0hWDiT99+By24Had/P SVW2C83n2aCkz5edTmFUsrXC6dpok4HEU5Vk0pUxw9jlQ0F4X/nduV1hOkKE3Yuw6mov 0Cpw== X-Forwarded-Encrypted: i=1; AJvYcCXWXtGrkipgzhsrx9MiGcsFmktOxRiGjF3iA7CwD+Krrg9EJ4JxuT/8JHLUGfsBtdTW5Yxyx4hN5scBPGs=@vger.kernel.org X-Gm-Message-State: AOJu0YwyWUGcOosNM5ItTaA7I36E3qdAU/IoS6wrRlfIGWSRkFpOUF6G Fw74GWGLln1IPZy3XqgD+E3Zx8KQp+tu0jZ7VFfQV3QP1+IP9tweIpWLB5pUoEaqa8uWm2lWeCK kgTcVrg== X-Google-Smtp-Source: AGHT+IHwEgCif9QeztnHlCZf32TA1mft1ORkKdnbi9mkgV4eyxEEshqnwgTA7OOXOPfobSPR/sGAg/rO4Do= X-Received: from pfjc12.prod.google.com ([2002:a05:6a00:8c:b0:7e5:49a7:f55f]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:7f91:b0:363:cd5e:8f87 with SMTP id adf61e73a8af0-36617ea8befmr929454637.13.1764980329483; Fri, 05 Dec 2025 16:18:49 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 5 Dec 2025 16:17:17 -0800 In-Reply-To: <20251206001720.468579-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251206001720.468579-1-seanjc@google.com> X-Mailer: git-send-email 2.52.0.223.gf5cc29aaa4-goog Message-ID: <20251206001720.468579-42-seanjc@google.com> Subject: [PATCH v6 41/44] KVM: VMX: Compartmentalize adding MSRs to host vs. guest auto-load list From: Sean Christopherson To: Marc Zyngier , Oliver Upton , Tianrui Zhao , Bibo Mao , Huacai Chen , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Xin Li , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Sean Christopherson , Paolo Bonzini Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, loongarch@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Mingwei Zhang , Xudong Hao , Sandipan Das , Dapeng Mi , Xiong Zhang , Manali Shukla , Jim Mattson Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Undo the bundling of the "host" and "guest" MSR auto-load list logic so that the code can be deduplicated by factoring out the logic to a separate helper. Now that "list full" situations are treated as fatal to the VM, there is no need to pre-check both lists. For all intents and purposes, this reverts the add_atomic_switch_msr() changes made by commit 3190709335dd ("x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting"). Signed-off-by: Sean Christopherson Reviewed-by: Dapeng Mi --- arch/x86/kvm/vmx/vmx.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index be2a2580e8f1..018e01daab68 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1096,9 +1096,9 @@ static __always_inline void add_atomic_switch_msr_spe= cial(struct vcpu_vmx *vmx, static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr, u64 guest_val, u64 host_val) { - int i, j =3D 0; struct msr_autoload *m =3D &vmx->msr_autoload; struct kvm *kvm =3D vmx->vcpu.kvm; + int i; =20 switch (msr) { case MSR_EFER: @@ -1133,25 +1133,26 @@ static void add_atomic_switch_msr(struct vcpu_vmx *= vmx, unsigned msr, } =20 i =3D vmx_find_loadstore_msr_slot(&m->guest, msr); - j =3D vmx_find_loadstore_msr_slot(&m->host, msr); - - if (KVM_BUG_ON(i < 0 && m->guest.nr =3D=3D MAX_NR_LOADSTORE_MSRS, kvm) || - KVM_BUG_ON(j < 0 && m->host.nr =3D=3D MAX_NR_LOADSTORE_MSRS, kvm)) - return; - if (i < 0) { + if (KVM_BUG_ON(m->guest.nr =3D=3D MAX_NR_LOADSTORE_MSRS, kvm)) + return; + i =3D m->guest.nr++; m->guest.val[i].index =3D msr; vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); } m->guest.val[i].value =3D guest_val; =20 - if (j < 0) { - j =3D m->host.nr++; - m->host.val[j].index =3D msr; + i =3D vmx_find_loadstore_msr_slot(&m->host, msr); + if (i < 0) { + if (KVM_BUG_ON(m->host.nr =3D=3D MAX_NR_LOADSTORE_MSRS, kvm)) + return; + + i =3D m->host.nr++; + m->host.val[i].index =3D msr; vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); } - m->host.val[j].value =3D host_val; + m->host.val[i].value =3D host_val; } =20 static bool update_transition_efer(struct vcpu_vmx *vmx) --=20 2.52.0.223.gf5cc29aaa4-goog