From nobody Tue Dec 16 14:38:30 2025 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B90872D837B for ; Sat, 6 Dec 2025 00:18:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764980297; cv=none; b=BgLaqoCrj6elc+SLzHm9iy7WKhjq7Efl30SiaPiVYXxu4huEJYHykybK7Mp6VXEMl2C7tV4nSMF9AMFBdxAdKBz/z4g77I5OJ7j33PNYKhgV0UOxsyLn8lH9UvHoWdT3+NTW2DwkTy8atAdHhG9uAhoiCLohb4PQbPmL7/uct7A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764980297; c=relaxed/simple; bh=Pzy06uwQwl662SZzAhKp4ZgGhpYEW/xfdtfXTkdDh0E=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=YRaFBY9I/u2di0WvxyuA1lkY3AtC1l7eEXROXfgY24srpRpOWN+Xyu++oTQLWG6Vka9FlkxvLca2FZPNTmBRAgU7+aIOAjEZgeM1jr+EkvXEAMU89RU8snzbzCM7INSeSS2l7kK2WgYbDgnn7QWmfXMadKKyGbMjSBabckz6Pjo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=U6K8xVeK; arc=none smtp.client-ip=209.85.216.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="U6K8xVeK" Received: by mail-pj1-f73.google.com with SMTP id 98e67ed59e1d1-340c0604e3dso3052140a91.2 for ; Fri, 05 Dec 2025 16:18:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1764980295; x=1765585095; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=0NKuhyI73DcmRDf6dJr4Yp2dlSnDCvKYnr68Tztb6CI=; b=U6K8xVeK3hqhGdDCpbZJH7RkcPnBYjxMzFiJWqxlXRybzO2Oy3k3R7Z5ixbPJgpmri hP+ZR/OPaCWEa2eXOzWx4qnLHipFkQphPpHUjCIcecAjYJCMsKH+jRhhjPExSPqWfBoJ Tc3XlengNsjyMp3QfQheGRhaZLLb/KSVb9nhf1z97XpuGtN4DRIUvXCII82T8nxlL7gL ziCN65iYGbMkV2wGpiaFB7z0fvDhELG06pgA+w/QNSCbdmoIYB3mJAmwsB2utl6q6FlR scMTYG6T25xGPRQ9HcGdy59fSfw596mNM1ao6PMALBT+VWw101xfocSgeWz521TluI0O kpBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764980295; x=1765585095; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=0NKuhyI73DcmRDf6dJr4Yp2dlSnDCvKYnr68Tztb6CI=; b=g65IJq5NLgZZGXL3ZXRGT77xAt9vzoQH+4QJH3p9+RY1KfV9QLeDUUZW+0Bav9Kb6Z OWBZYb+AkpaQjw6HBHX9hCxYItdfthNOTfEuLx+ugAjGgRoCVs9yf590vbJ9NxgeYF74 6DHucl5vPC3y7vfLcND/RFMRdkCa7twqYzvlRmYNd0pfb4Cn7RbMz0joLzLuu/yNxl// RnitatFDh7B1tF7F/aI8Hyonh8U9sxd2HLn91IYaDA8GAViuv7H/8e9FfCr9oAFDmvv8 7Ik1h3wPY5bmWjzStPf5JgNz/aX1R+GV2ynh9rseNQj/sFR4x0JyahCKQQZmx9AfZ7aG XCFw== X-Forwarded-Encrypted: i=1; AJvYcCV4OuRrG8K4yuD7r733F1WK+TOoRwZdgiQu2o7mcQ/Fnv4Z6v3E8DtRN/VKNtpLR3uvl3/jEzDPvWqcMiY=@vger.kernel.org X-Gm-Message-State: AOJu0Yz9OxMxu3k2Fta4jYFabGnAbpgA346Z5osSwBl78uwGgmiB2aFp dzKM53wPsxp6JmrNnQpODAeWDm4KtK9FJRzchtYYad5ApoBJhBu/2RPBYszxitz/ZSnVhZX5lj0 OD0aRsw== X-Google-Smtp-Source: AGHT+IEu368Ymit6Wf714y2QoU1WaQ4whiXftg8ijTgUsFOrrwNXh1LyvlB+ZwNskFSucsIG3f0JlRtM2cA= X-Received: from pjoa4.prod.google.com ([2002:a17:90a:8c04:b0:349:6296:2bb7]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3bc7:b0:340:d578:f2a2 with SMTP id 98e67ed59e1d1-349a252b381mr638790a91.6.1764980295195; Fri, 05 Dec 2025 16:18:15 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 5 Dec 2025 16:17:00 -0800 In-Reply-To: <20251206001720.468579-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251206001720.468579-1-seanjc@google.com> X-Mailer: git-send-email 2.52.0.223.gf5cc29aaa4-goog Message-ID: <20251206001720.468579-25-seanjc@google.com> Subject: [PATCH v6 24/44] KVM: x86/pmu: Introduce eventsel_hw to prepare for pmu event filtering From: Sean Christopherson To: Marc Zyngier , Oliver Upton , Tianrui Zhao , Bibo Mao , Huacai Chen , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Xin Li , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Sean Christopherson , Paolo Bonzini Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, loongarch@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Mingwei Zhang , Xudong Hao , Sandipan Das , Dapeng Mi , Xiong Zhang , Manali Shukla , Jim Mattson Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mingwei Zhang Introduce eventsel_hw and fixed_ctr_ctrl_hw to store the actual HW value in PMU event selector MSRs. In mediated PMU checks events before allowing the event values written to the PMU MSRs. However, to match the HW behavior, when PMU event checks fails, KVM should allow guest to read the value back. This essentially requires an extra variable to separate the guest requested value from actual PMU MSR value. Note this only applies to event selectors. Signed-off-by: Mingwei Zhang Co-developed-by: Dapeng Mi Signed-off-by: Dapeng Mi Tested-by: Xudong Hao Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kvm/pmu.c | 7 +++++-- arch/x86/kvm/svm/pmu.c | 1 + arch/x86/kvm/vmx/pmu_intel.c | 2 ++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index defd979003be..e72357f64b19 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -529,6 +529,7 @@ struct kvm_pmc { */ u64 emulated_counter; u64 eventsel; + u64 eventsel_hw; struct perf_event *perf_event; struct kvm_vcpu *vcpu; /* @@ -557,6 +558,7 @@ struct kvm_pmu { unsigned nr_arch_fixed_counters; unsigned available_event_types; u64 fixed_ctr_ctrl; + u64 fixed_ctr_ctrl_hw; u64 fixed_ctr_ctrl_rsvd; u64 global_ctrl; u64 global_status; diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 621722e8cc7e..36eebc1c7e70 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -902,11 +902,14 @@ static void kvm_pmu_reset(struct kvm_vcpu *vcpu) pmc->counter =3D 0; pmc->emulated_counter =3D 0; =20 - if (pmc_is_gp(pmc)) + if (pmc_is_gp(pmc)) { pmc->eventsel =3D 0; + pmc->eventsel_hw =3D 0; + } } =20 - pmu->fixed_ctr_ctrl =3D pmu->global_ctrl =3D pmu->global_status =3D 0; + pmu->fixed_ctr_ctrl =3D pmu->fixed_ctr_ctrl_hw =3D 0; + pmu->global_ctrl =3D pmu->global_status =3D 0; =20 kvm_pmu_call(reset)(vcpu); } diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c index 16c88b2a2eb8..c1ec1962314e 100644 --- a/arch/x86/kvm/svm/pmu.c +++ b/arch/x86/kvm/svm/pmu.c @@ -166,6 +166,7 @@ static int amd_pmu_set_msr(struct kvm_vcpu *vcpu, struc= t msr_data *msr_info) data &=3D ~pmu->reserved_bits; if (data !=3D pmc->eventsel) { pmc->eventsel =3D data; + pmc->eventsel_hw =3D data; kvm_pmu_request_counter_reprogram(pmc); } return 0; diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index 820da47454d7..855240678300 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -61,6 +61,7 @@ static void reprogram_fixed_counters(struct kvm_pmu *pmu,= u64 data) int i; =20 pmu->fixed_ctr_ctrl =3D data; + pmu->fixed_ctr_ctrl_hw =3D data; for (i =3D 0; i < pmu->nr_arch_fixed_counters; i++) { u8 new_ctrl =3D fixed_ctrl_field(data, i); u8 old_ctrl =3D fixed_ctrl_field(old_fixed_ctr_ctrl, i); @@ -430,6 +431,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, str= uct msr_data *msr_info) =20 if (data !=3D pmc->eventsel) { pmc->eventsel =3D data; + pmc->eventsel_hw =3D data; kvm_pmu_request_counter_reprogram(pmc); } break; --=20 2.52.0.223.gf5cc29aaa4-goog