From nobody Tue Dec 16 14:43:48 2025 Received: from mail-pf1-f201.google.com (mail-pf1-f201.google.com [209.85.210.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EAEEC2D5A14 for ; Sat, 6 Dec 2025 00:18:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764980295; cv=none; b=gzuYy+pPsnom2g0KsHyahTPyK631eeR9wEQ8ejXKOKcN044dygvIL7PiGfMSbm0NfshCF5Ta6wWeimH2ilyXif4JuiuXA5GqYWaYWMv1UJ44lc3iazhoTZDWMvCNhUZkF1byCx2p6cSxmlaWIS8KvYKa57gbqtXj+cqMBl9/g/E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764980295; c=relaxed/simple; bh=O/jVTq5Qhwa5T0yytQs5FBna5XRpIRNeziQvPpiH8po=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=cO/tKE7My5Q723BaC7XhtCICVPSGs60rjHjjFko0GUHWo/fV6vJD0UtnbsIE8b8fKlRXNFToWl51tPERIbTF9TqYvtp/oAyJBh4rxqfb3lkvOFbeRB/A77ZllnEJw2Flvwh55u1S5oOdz4ZhGdxuDrUxdqXV701S8bdWA6nzXPk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=bixWkv78; arc=none smtp.client-ip=209.85.210.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="bixWkv78" Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-7b9090d9f2eso4938014b3a.0 for ; Fri, 05 Dec 2025 16:18:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1764980292; x=1765585092; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=XDWqFeiOQLKkxB3EbvG31YUh6Q8If2ANhLHUmz0BNv4=; b=bixWkv78EyRWIJkWbMv/yM67O5ssC+QKW+D/0xsnFqPt2hoSkHvtgI2mBiK5hhxxDw xJNgh1ow72gdkzPSaDfy3LN03Cejoiy2SqjCoaYyfDIV9hvBG/iYrsEb6doZjzibhgFG GMDz58Nwhc20qiDwUH/mgZjoM2jcZv23cT5FXuVaiyXzmOw6x0cE74wbYAAnh38ayiNx QlnLw6R1Pv2tZTdJfSbrICf0sCR2XqeinDr93jZ22ubxdnxxJJ3L7TdvUHOvgTmyBxOW taf64A9bQqH9gV1zrmNKqzfHdp5hya0rsttG2UeRCCG5XwcR3yVfZLtZ41iSXDaj+wpL k4oA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764980292; x=1765585092; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=XDWqFeiOQLKkxB3EbvG31YUh6Q8If2ANhLHUmz0BNv4=; b=ixClL4b1218xqjijTFgh2yKAat/wfAGqXZq+Cpl/KHxRuU5xLYplFS8jivStm6zW9d JHISlsb6Yv5gyPj97jnjOfJDb1dtLgQ9Pl7ypBlFqYIaYkA5VpMp/YwAALEPafHcnrXZ 5G+vAxC+AOg/dARL1MdO+ywquFSPZv4zjXOway/UkkNkiyN4YMopraB994IJ5weFfdbq l7AY7XNgvDmB8qyRIZ0Rk2fcFJItoRdvMtWDEPVlAzwsSpJ1UsI08qQ+dtjuE2KgR223 QwM3nlvQtAgfOLagHZmOFcozSVQxVwQXuIaUh0FaxFTws6JEPCll4jnPTWjwdIDcFoHV b1dw== X-Forwarded-Encrypted: i=1; AJvYcCXVJsi2epm4DBq3XH3gsPvURXfMhoOEkJLNaCmAuo4GEFWvuBwEE9sqBDhU1ZX1M7X9Ldm3Jt6oSDeDKBA=@vger.kernel.org X-Gm-Message-State: AOJu0YzwF8cSHExrvLwv5TLIqBAx+spuVmKchvVZ4FBXxJEUU2yuOrlB Hu9cTHjnj8Gp8FJGzjYk3fceDIRLSfU8YAMphSyFKT4J0K2hpTCjVI5bfe8O3GXMReJk/+2MrMf ZMVzUCQ== X-Google-Smtp-Source: AGHT+IEUzuqWf57QLYzTtVTMaTDzv0I3kjHOLmfOTP6Jt6doQKesYDsCDJnJjl04ZJwHyBMoU/64HyX4VwM= X-Received: from pgar12.prod.google.com ([2002:a05:6a02:2e8c:b0:b63:2a80:d077]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:7f81:b0:334:912f:acea with SMTP id adf61e73a8af0-366180175c0mr936268637.59.1764980292181; Fri, 05 Dec 2025 16:18:12 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 5 Dec 2025 16:16:59 -0800 In-Reply-To: <20251206001720.468579-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251206001720.468579-1-seanjc@google.com> X-Mailer: git-send-email 2.52.0.223.gf5cc29aaa4-goog Message-ID: <20251206001720.468579-24-seanjc@google.com> Subject: [PATCH v6 23/44] KVM: x86/pmu: Bypass perf checks when emulating mediated PMU counter accesses From: Sean Christopherson To: Marc Zyngier , Oliver Upton , Tianrui Zhao , Bibo Mao , Huacai Chen , Anup Patel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Xin Li , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Sean Christopherson , Paolo Bonzini Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, loongarch@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Mingwei Zhang , Xudong Hao , Sandipan Das , Dapeng Mi , Xiong Zhang , Manali Shukla , Jim Mattson Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dapeng Mi When emulating a PMC counter read or write for a mediated PMU, bypass the perf checks and emulated_counter logic as the counters aren't proxied through perf, i.e. pmc->counter always holds the guest's up-to-date value, and thus there's no need to defer emulated overflow checks. Suggested-by: Sean Christopherson Signed-off-by: Dapeng Mi Co-developed-by: Mingwei Zhang Signed-off-by: Mingwei Zhang [sean: split from event filtering change, write shortlog+changelog] Reviewed-by: Sandipan Das Tested-by: Xudong Hao Signed-off-by: Sean Christopherson --- arch/x86/kvm/pmu.c | 5 +++++ arch/x86/kvm/pmu.h | 3 +++ 2 files changed, 8 insertions(+) diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 57833f29a746..621722e8cc7e 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -381,6 +381,11 @@ static void pmc_update_sample_period(struct kvm_pmc *p= mc) =20 void pmc_write_counter(struct kvm_pmc *pmc, u64 val) { + if (kvm_vcpu_has_mediated_pmu(pmc->vcpu)) { + pmc->counter =3D val & pmc_bitmask(pmc); + return; + } + /* * Drop any unconsumed accumulated counts, the WRMSR is a write, not a * read-modify-write. Adjust the counter value so that its value is diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 356b08e92bc9..9a199109d672 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -111,6 +111,9 @@ static inline u64 pmc_read_counter(struct kvm_pmc *pmc) { u64 counter, enabled, running; =20 + if (kvm_vcpu_has_mediated_pmu(pmc->vcpu)) + return pmc->counter & pmc_bitmask(pmc); + counter =3D pmc->counter + pmc->emulated_counter; =20 if (pmc->perf_event && !pmc->is_paused) --=20 2.52.0.223.gf5cc29aaa4-goog