From nobody Tue Dec 16 14:51:15 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9BC993081DF for ; Fri, 5 Dec 2025 22:01:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764972109; cv=none; b=bUFP89iijbwHHHopKAVvlUN312GTQpq7Euv43cTy9Q4DUPbCvOVh8ygWGpLrQ+D2kQMBae9DkONgumv9un9NmRBNvajdhQqZ17ek2OlwUI/rNf9gtQxOSRyyunBoZSNxI3aNKZQBjFc16y+VpKVzXrNpxdj6w7m0gGUuD9JJxDc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764972109; c=relaxed/simple; bh=khrCoY0Dox/xYWoy4N2SlEwfom8LK16ZyXALuGul9Jk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IgQO3vKTFfmG000oVG2vwRK6eaBkr7oaS/Irz3MzS7YJqWsbMXsuzNWU9P1Xn85S09VZVFt5oZ5PtUFCLAM01sQsoiu9GcDILj+sjV6dkcGJQKosivRqhpVk6qjHZnCWZ0KiWeE/EU/kN+RMDpzSTQCHoHHqRFF/puQnL9PAo5c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 482581BCB; Fri, 5 Dec 2025 14:01:39 -0800 (PST) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CA59E3F740; Fri, 5 Dec 2025 14:01:42 -0800 (PST) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: James Morse , D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Gavin Shan , Ben Horgan , rohit.mathew@arm.com, reinette.chatre@intel.com, Punit Agrawal Subject: [RFC PATCH 34/38] arm_mpam: Add quirk framework Date: Fri, 5 Dec 2025 21:58:57 +0000 Message-Id: <20251205215901.17772-35-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20251205215901.17772-1-james.morse@arm.com> References: <20251205215901.17772-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shanker Donthineni The MPAM specification includes the MPAMF_IIDR, which serves to uniquely identify the MSC implementation through a combination of implementer details, product ID, variant, and revision. Certain hardware issues/errata can be resolved using software workarounds. Introduce a quirk framework to allow workarounds to be enabled based on the MPAMF_IIDR value. Signed-off-by: Shanker Donthineni [ morse: Stash the IIDR so this doesn't need an IPI, enable quirks only once, move the description to the callback so it can be pr_once()d, add an enum of workarounds for popular errata. Add macros for making lists of product/revision/vendor half readable ] Signed-off-by: James Morse --- drivers/resctrl/mpam_devices.c | 27 +++++++++++++++++++++++++++ drivers/resctrl/mpam_internal.h | 26 ++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 741e14e1e6cf..f0f6f9b55ad4 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -630,6 +630,25 @@ static struct mpam_msc_ris *mpam_get_or_create_ris(str= uct mpam_msc *msc, return ERR_PTR(-ENOENT); } =20 +static const struct mpam_quirk mpam_quirks[] =3D { + { NULL }, /* Sentinel */ +}; + +static void mpam_enable_quirks(struct mpam_msc *msc) +{ + const struct mpam_quirk *quirk; + + for (quirk =3D &mpam_quirks[0]; quirk->iidr_mask; quirk++) { + if (quirk->iidr !=3D (msc->iidr & quirk->iidr_mask)) + continue; + + if (quirk->init) + quirk->init(msc, quirk); + else + mpam_set_quirk(quirk->workaround, msc); + } +} + /* * IHI009A.a has this nugget: "If a monitor does not support automatic beh= aviour * of NRDY, software can use this bit for any purpose" - so hardware might= not @@ -864,8 +883,11 @@ static int mpam_msc_hw_probe(struct mpam_msc *msc) /* Grab an IDR value to find out how many RIS there are */ mutex_lock(&msc->part_sel_lock); idr =3D mpam_msc_read_idr(msc); + msc->iidr =3D mpam_read_partsel_reg(msc, IIDR); mutex_unlock(&msc->part_sel_lock); =20 + mpam_enable_quirks(msc); + msc->ris_max =3D FIELD_GET(MPAMF_IDR_RIS_MAX, idr); =20 /* Use these values so partid/pmg always starts with a valid value */ @@ -1987,6 +2009,7 @@ static bool mpam_has_cmax_wd_feature(struct mpam_prop= s *props) * resulting safe value must be compatible with both. When merging values = in * the tree, all the aliasing resources must be handled first. * On mismatch, parent is modified. + * Quirks on an MSC will apply to all MSC in that class. */ static void __props_mismatch(struct mpam_props *parent, struct mpam_props *child, bool alias) @@ -2106,6 +2129,7 @@ static void __props_mismatch(struct mpam_props *paren= t, * nobble the class feature, as we can't configure all the resources. * e.g. The L3 cache is composed of two resources with 13 and 17 portion * bitmaps respectively. + * Quirks on an MSC will apply to all MSC in that class. */ static void __class_props_mismatch(struct mpam_class *class, struct mpam_vmsc *vmsc) @@ -2119,6 +2143,9 @@ __class_props_mismatch(struct mpam_class *class, stru= ct mpam_vmsc *vmsc) dev_dbg(dev, "Merging features for class:0x%lx &=3D vmsc:0x%lx\n", (long)cprops->features, (long)vprops->features); =20 + /* Merge quirks */ + class->quirks |=3D vmsc->msc->quirks; + /* Take the safe value for any common features */ __props_mismatch(cprops, vprops, false); } diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index d381906545ed..de3e5faa12b2 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -88,6 +88,8 @@ struct mpam_msc { u8 pmg_max; unsigned long ris_idxs; u32 ris_max; + u32 iidr; + u16 quirks; =20 /* * error_irq_lock is taken when registering/unregistering the error @@ -215,6 +217,29 @@ struct mpam_props { #define mpam_set_feature(_feat, x) set_bit(_feat, (x)->features) #define mpam_clear_feature(_feat, x) clear_bit(_feat, (x)->features) =20 +/* Workaround bits for msc->quirks */ +enum mpam_device_quirks { + MPAM_QUIRK_LAST, +}; + +#define mpam_has_quirk(_quirk, x) ((1 << (_quirk) & (x)->quirks)) +#define mpam_set_quirk(_quirk, x) ((x)->quirks |=3D (1 << (_quirk))) + +struct mpam_quirk { + void (*init)(struct mpam_msc *msc, const struct mpam_quirk *quirk); + + u32 iidr; + u32 iidr_mask; + + enum mpam_device_quirks workaround; +}; + +#define MPAM_IIDR_MATCH_ONE FIELD_PREP_CONST(MPAMF_IIDR_PRODUCTID, 0xfff= ) | \ + FIELD_PREP_CONST(MPAMF_IIDR_VARIANT, 0xf ) | \ + FIELD_PREP_CONST(MPAMF_IIDR_REVISION, 0xf ) | \ + FIELD_PREP_CONST(MPAMF_IIDR_IMPLEMENTER, 0xfff) + + /* The values for MSMON_CFG_MBWU_FLT.RWBW */ enum mon_filter_options { COUNT_BOTH =3D 0, @@ -258,6 +283,7 @@ struct mpam_class { =20 struct mpam_props props; u32 nrdy_usec; + u16 quirks; u8 level; enum mpam_class_types type; =20 --=20 2.39.5