From nobody Tue Dec 16 14:49:52 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 59A9A2C0F6F for ; Fri, 5 Dec 2025 21:59:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764971978; cv=none; b=TFnZGXBhvW0GPrDG7O3pNgmXDoJBGUpZu8hmVZ4mR0QvLJVFEdE8GHLVNGmbkOlKUlPkIqhEa6a6LxHIhz3ibxYMPro/Fju89blAFtdFWzI4wkES+G7cUx1RXqPKPVrEzwnwpBcm/sNlKM8MfqmJR+ri8JGv5ihbYwskDQxo3nc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764971978; c=relaxed/simple; bh=Y2C3HRErabhzZuANKJwwFPRXxgq8aRmmWSH4sZYiLAw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EryS6azQAo31vDnrEKoVHmcW5ALaHO9DQ6SIzQLQFy7u+5l0vYSW+ieLbuEx2PiW2kI7QSbM65ysQoComJjlSjLUou2iCY/hMlXZpg1Np6hZ+C1A8WljQ3CmSKw8elHp56bNqmm6e3JT8QV4fe6EVrnUb+VNxxBZ1QnHt8nio6g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E7D731A25; Fri, 5 Dec 2025 13:59:28 -0800 (PST) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 867DA3F740; Fri, 5 Dec 2025 13:59:32 -0800 (PST) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: James Morse , D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Gavin Shan , Ben Horgan , rohit.mathew@arm.com, reinette.chatre@intel.com, Punit Agrawal Subject: [RFC PATCH 02/38] arm64: mpam: Re-initialise MPAM regs when CPU comes online Date: Fri, 5 Dec 2025 21:58:25 +0000 Message-Id: <20251205215901.17772-3-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20251205215901.17772-1-james.morse@arm.com> References: <20251205215901.17772-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that the MPAM system registers are expected to have values that change, reprogram them based on struct task_struct when a CPU is brought online. Previously MPAM's 'default PARTID' of 0 was used this is the PARTID that hardware guarantees to reset. Because there are a limited number of PARTID, this value is exposed to user space, meaning resctrl changes to the resctrl default group would also affect kernel threads. Instead, use the task's PARTID value for kernel work on behalf of user-space too. Signed-off-by: James Morse --- arch/arm64/kernel/cpufeature.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 5ed401ff79e3..429128a181ac 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -86,6 +86,7 @@ #include #include #include +#include #include #include #include @@ -2439,13 +2440,16 @@ test_has_mpam(const struct arm64_cpu_capabilities *= entry, int scope) static void cpu_enable_mpam(const struct arm64_cpu_capabilities *entry) { - /* - * Access by the kernel (at EL1) should use the reserved PARTID - * which is configured unrestricted. This avoids priority-inversion - * where latency sensitive tasks have to wait for a task that has - * been throttled to release the lock. - */ - write_sysreg_s(0, SYS_MPAM1_EL1); + int cpu =3D smp_processor_id(); + u64 regval =3D 0; + + if (IS_ENABLED(CONFIG_MPAM)) + regval =3D READ_ONCE(per_cpu(arm64_mpam_current, cpu)); + + write_sysreg_s(regval, SYS_MPAM1_EL1); + isb(); + + write_sysreg_s(regval, SYS_MPAM0_EL1); } =20 static bool --=20 2.39.5