From nobody Sat Feb 7 17:32:59 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ACCAA2FB0BA for ; Fri, 5 Dec 2025 22:00:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764972056; cv=none; b=N0W4UPd4hShlBpYOCWfkwCmFYrtI5sYlWpC0vfPUGlhVI6FZa/4tg7lCxU7aD1/z/b2yz203GFvmb5AMwJOo8+hX799gxMNp4pSNQEfsCO/R0yJSktOs5trkXrF3suQBPOuDM5aVtAkLbaFjQXIochW/o9HYIuUnJSpD9V1+Lc8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764972056; c=relaxed/simple; bh=M36nzOwEzA3vLt0eIAN/IpRFOFrQ5CZJ2CGSb3OPKeE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=j2gWtQm9+ubkOTcslEmO4p0PMtF0ElF5IJeDp6aQtjM+cPZI7IP6srRccaBpKxUCtzQkVBHhZDi4OUFsIB0Lk2ox2aQgacOI+WRLeeuhdDg/BRUtxW+c1qxen+C40ZcbohuJD7RPKGotumaDnrCmyqkmvLDCqhgxVmlDVsbANWg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8C9D41BA8; Fri, 5 Dec 2025 14:00:46 -0800 (PST) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2B1383F740; Fri, 5 Dec 2025 14:00:50 -0800 (PST) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: James Morse , D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Gavin Shan , Ben Horgan , rohit.mathew@arm.com, reinette.chatre@intel.com, Punit Agrawal Subject: [RFC PATCH 21/38] arm_mpam: resctrl: Pre-allocate assignable monitors Date: Fri, 5 Dec 2025 21:58:44 +0000 Message-Id: <20251205215901.17772-22-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20251205215901.17772-1-james.morse@arm.com> References: <20251205215901.17772-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When there are not enough monitors, MPAM is able to emulate ABMC by making a smaller number of monitors assignable. These monitors still need to be allocated from the driver, and mapped to whichever control/monitor group resctrl wants to use them with. Add a second array to hold the monitor values indexed by resctrl's cntr_id. When CDP is in use, two monitors are needed so the available number of counters halves. Platforms with one monitor will have zero monitors when CDP is in use. Signed-off-by: James Morse --- drivers/resctrl/mpam_internal.h | 7 +++ drivers/resctrl/mpam_resctrl.c | 102 ++++++++++++++++++++++++++++++++ 2 files changed, 109 insertions(+) diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index b7c914febeb4..05101186af17 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -366,6 +366,13 @@ struct mpam_resctrl_mon { * un-assigned (closid, rmid) are -1. */ int *mbwu_idx_to_mon; + + /* + * Array of assigned MBWU monitors, indexed by idx argument. + * When ABMC is not in use, this array can be NULL. Otherwise + * it maps idx to the allocated monitor. + */ + int *assigned_counters; }; =20 static inline int mpam_alloc_csu_mon(struct mpam_class *class) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index de5220fed97d..f607feaf0126 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -50,6 +50,12 @@ static bool exposed_mon_capable; */ static bool cdp_enabled; =20 +/* + * L3 local/total may come from different classes - what is the number of = MBWU + * 'on L3'? + */ +static unsigned int l3_num_allocated_mbwu =3D ~0; + /* Whether this num_mbw_mon could result in a free_running system */ static int __mpam_monitors_free_running(u16 num_mbwu_mon) { @@ -58,6 +64,15 @@ static int __mpam_monitors_free_running(u16 num_mbwu_mon) return 0; } =20 +/* + * If l3_num_allocated_mbwu is forced below PARTID * PMG, then the counters + * are not free running, and ABMC's user-interface must be used to assign = them. + */ +static bool mpam_resctrl_abmc_enabled(void) +{ + return l3_num_allocated_mbwu < resctrl_arch_system_num_rmid_idx(); +} + bool resctrl_arch_alloc_capable(void) { return exposed_alloc_capable; @@ -102,8 +117,25 @@ static void resctrl_reset_task_closids(void) read_unlock(&tasklist_lock); } =20 +static void mpam_resctrl_monitor_sync_abmc_vals(struct rdt_resource *l3) +{ + l3->mon.num_mbm_cntrs =3D l3_num_allocated_mbwu; + if (cdp_enabled) + l3->mon.num_mbm_cntrs /=3D 2; + + if (l3->mon.num_mbm_cntrs) { + l3->mon.mbm_cntr_assignable =3D mpam_resctrl_abmc_enabled(); + l3->mon.mbm_assign_on_mkdir =3D mpam_resctrl_abmc_enabled(); + } else { + l3->mon.mbm_cntr_assignable =3D false; + l3->mon.mbm_assign_on_mkdir =3D false; + } +} + int resctrl_arch_set_cdp_enabled(enum resctrl_res_level ignored, bool enab= le) { + struct mpam_resctrl_res *res =3D &mpam_resctrl_controls[RDT_RESOURCE_L3]; + struct rdt_resource *l3 =3D &res->resctrl_res; u32 partid_i, partid_d; =20 cdp_enabled =3D enable; @@ -120,6 +152,7 @@ int resctrl_arch_set_cdp_enabled(enum resctrl_res_level= ignored, bool enable) WRITE_ONCE(arm64_mpam_global_default, mpam_get_regval(current)); =20 resctrl_reset_task_closids(); + mpam_resctrl_monitor_sync_abmc_vals(l3); =20 return 0; } @@ -315,6 +348,11 @@ static bool class_has_usable_mbwu(struct mpam_class *c= lass) return true; } =20 + if (cprops->num_mbwu_mon) { + pr_debug("monitors usable via ABMC assignment\n"); + return true; + } + return false; } =20 @@ -584,6 +622,8 @@ static int __alloc_mbwu_mon(struct mpam_class *class, i= nt *array, array[i] =3D mbwu_mon; } =20 + l3_num_allocated_mbwu =3D min(l3_num_allocated_mbwu, num_mbwu_mon); + return 0; } =20 @@ -727,6 +767,23 @@ static void mpam_resctrl_pick_counters(void) mpam_resctrl_counters[QOS_L3_MBM_TOTAL_EVENT_ID].class); } =20 +bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r) +{ + if (r !=3D &mpam_resctrl_controls[RDT_RESOURCE_L3].resctrl_res) + return false; + + return mpam_resctrl_abmc_enabled(); +} + +int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable) +{ + lockdep_assert_cpus_held(); + + WARN_ON_ONCE(1); + + return 0; +} + static int mpam_resctrl_control_init(struct mpam_resctrl_res *res, enum resctrl_res_level type) { @@ -806,6 +863,41 @@ static int mpam_resctrl_pick_domain_id(int cpu, struct= mpam_component *comp) return comp->comp_id; } =20 +/* + * This must run after all event counters have been picked so that any free + * running counters have already been allocated. + */ +static int mpam_resctrl_monitor_init_abmc(struct mpam_resctrl_mon *mon) +{ + struct mpam_resctrl_res *res =3D &mpam_resctrl_controls[RDT_RESOURCE_L3]; + size_t array_size =3D resctrl_arch_system_num_rmid_idx() * sizeof(int); + int *rmid_array __free(kfree) =3D kmalloc(array_size, GFP_KERNEL); + struct rdt_resource *l3 =3D &res->resctrl_res; + struct mpam_class *class =3D mon->class; + u16 num_mbwu_mon; + + if (mon->mbwu_idx_to_mon) { + pr_debug("monitors free running\n"); + return 0; + } + + if (!rmid_array) { + pr_debug("Failed to allocate RMID array\n"); + return -ENOMEM; + } + memset(rmid_array, -1, array_size); + + num_mbwu_mon =3D class->props.num_mbwu_mon; + mon->assigned_counters =3D __alloc_mbwu_array(mon->class, num_mbwu_mon); + if (IS_ERR(mon->assigned_counters)) + return PTR_ERR(mon->assigned_counters); + mon->mbwu_idx_to_mon =3D no_free_ptr(rmid_array); + + mpam_resctrl_monitor_sync_abmc_vals(l3); + + return 0; +} + static void mpam_resctrl_monitor_init(struct mpam_resctrl_mon *mon, enum resctrl_event_id type) { @@ -847,6 +939,16 @@ static void mpam_resctrl_monitor_init(struct mpam_resc= trl_mon *mon, * space. */ l3->mon.num_rmid =3D 1; + + switch (type) { + case QOS_L3_MBM_LOCAL_EVENT_ID: + case QOS_L3_MBM_TOTAL_EVENT_ID: + mpam_resctrl_monitor_init_abmc(mon); + + return; + default: + return; + } } } =20 --=20 2.39.5