From nobody Fri Dec 19 16:48:14 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6BF9B33DEC4; Fri, 5 Dec 2025 15:14:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764947654; cv=none; b=N926WPB1RQZg/yGRhlQjTh5TMQLxFjf0Q1Kkv+jVl3K7UzYep+eJsost6ZgY7JbovPT2qvcRWo7EFQJ/IHXEBKsk77lfuekUWddD4bzeNp0LXrT7HMvD41do73Ja3reLXpLI284KT6F/cuLd6ty+VNpqQdmTTl+kgefcrkQXEqI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764947654; c=relaxed/simple; bh=Cz20XkiM+P8nczxVeOAeZHCzIkyeCTB3xpUqIz6Tg/Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JCTsOyGt3LwGE4UVAKx5QfA8PIu9tPiJB7h5gjyZ16ApUfcFyCsUgPpwnQGAHRPHM5pBzMp3MvIRH7Ej2zZob1GHg/fyuPOQK1nbA+lulzubAuJeIsiX/cSrf7lSSxXjfZY7MR79nlWoZujUc8wkYxNUL6jo250RXCBaildyN7Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: byJsjLt4SP6ypJgqnYA/mw== X-CSE-MsgGUID: QxDbWAbwSimkeun2Jkv2ZQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 06 Dec 2025 00:13:59 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.202]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id BF5224005E29; Sat, 6 Dec 2025 00:13:54 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v3 2/6] dmaengine: sh: rz_dmac: make register_dma_req() chip-specific Date: Fri, 5 Dec 2025 17:12:50 +0200 Message-ID: <20251205151254.2970669-3-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251205151254.2970669-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251205151254.2970669-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs use a completely different ICU unit compared to RZ/V2H, which requires a separate implementation. To prepare for adding support for these SoCs, add a chip-specific structure and put a pointer to the rzv2h_icu_register_dma_req() function in the .register_dma_req field of the chip-specific structure to allow for other implementations. Do the same for the default request value, RZV2H_ICU_DMAC_REQ_NO_DEFAULT, and place it into .dma_req_no_default. While at it, factor out the logic that calls .register_dma_req() or rz_dmac_set_dmars_register() into a separate function to remove some code duplication. Signed-off-by: Cosmin Tanislav --- V3: * replace -1 with direct usage of dma_req_no_default and remove the check inside rz_dmac_set_dma_req_no() V2: * remove notes drivers/dma/sh/rz-dmac.c | 65 ++++++++++++++++++++++------------------ 1 file changed, 36 insertions(+), 29 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 20a5c1766a58..e4b369f13cbc 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -95,9 +95,16 @@ struct rz_dmac_icu { u8 dmac_index; }; =20 +struct rz_dmac_info { + void (*register_dma_req)(struct platform_device *icu_dev, u8 dmac_index, + u8 dmac_channel, u16 req_no); + u16 dma_req_no_default; +}; + struct rz_dmac { struct dma_device engine; struct rz_dmac_icu icu; + const struct rz_dmac_info *info; struct device *dev; struct reset_control *rstc; void __iomem *base; @@ -106,8 +113,6 @@ struct rz_dmac { unsigned int n_channels; struct rz_dmac_chan *channels; =20 - bool has_icu; - DECLARE_BITMAP(modules, 1024); }; =20 @@ -319,6 +324,16 @@ static void rz_dmac_set_dmars_register(struct rz_dmac = *dmac, int nr, u32 dmars) rz_dmac_ext_writel(dmac, dmars32, dmars_offset); } =20 +static void rz_dmac_set_dma_req_no(struct rz_dmac *dmac, unsigned int inde= x, + int req_no) +{ + if (dmac->info->register_dma_req) + dmac->info->register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, + index, req_no); + else + rz_dmac_set_dmars_register(dmac, index, req_no); +} + static void rz_dmac_prepare_desc_for_memcpy(struct rz_dmac_chan *channel) { struct dma_chan *chan =3D &channel->vc.chan; @@ -336,13 +351,7 @@ static void rz_dmac_prepare_desc_for_memcpy(struct rz_= dmac_chan *channel) lmdesc->chext =3D 0; lmdesc->header =3D HEADER_LV; =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, - RZV2H_ICU_DMAC_REQ_NO_DEFAULT); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, 0); - } + rz_dmac_set_dma_req_no(dmac, channel->index, dmac->info->dma_req_no_defau= lt); =20 channel->chcfg =3D chcfg; channel->chctrl =3D CHCTRL_STG | CHCTRL_SETEN; @@ -393,12 +402,7 @@ static void rz_dmac_prepare_descs_for_slave_sg(struct = rz_dmac_chan *channel) =20 channel->lmdesc.tail =3D lmdesc; =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, channel->mid_rid); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, channel->mid_rid); - } + rz_dmac_set_dma_req_no(dmac, channel->index, channel->mid_rid); =20 channel->chctrl =3D CHCTRL_SETEN; } @@ -671,13 +675,7 @@ static void rz_dmac_device_synchronize(struct dma_chan= *chan) if (ret < 0) dev_warn(dmac->dev, "DMA Timeout"); =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, - RZV2H_ICU_DMAC_REQ_NO_DEFAULT); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, 0); - } + rz_dmac_set_dma_req_no(dmac, channel->index, dmac->info->dma_req_no_defau= lt); } =20 /* @@ -868,14 +866,13 @@ static int rz_dmac_parse_of_icu(struct device *dev, s= truct rz_dmac *dmac) uint32_t dmac_index; int ret; =20 - ret =3D of_parse_phandle_with_fixed_args(np, "renesas,icu", 1, 0, &args); - if (ret =3D=3D -ENOENT) + if (!dmac->info->register_dma_req) return 0; + + ret =3D of_parse_phandle_with_fixed_args(np, "renesas,icu", 1, 0, &args); if (ret) return ret; =20 - dmac->has_icu =3D true; - dmac->icu.pdev =3D of_find_device_by_node(args.np); of_node_put(args.np); if (!dmac->icu.pdev) { @@ -930,6 +927,7 @@ static int rz_dmac_probe(struct platform_device *pdev) if (!dmac) return -ENOMEM; =20 + dmac->info =3D device_get_match_data(&pdev->dev); dmac->dev =3D &pdev->dev; platform_set_drvdata(pdev, dmac); =20 @@ -947,7 +945,7 @@ static int rz_dmac_probe(struct platform_device *pdev) if (IS_ERR(dmac->base)) return PTR_ERR(dmac->base); =20 - if (!dmac->has_icu) { + if (!dmac->info->register_dma_req) { dmac->ext_base =3D devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(dmac->ext_base)) return PTR_ERR(dmac->ext_base); @@ -1067,9 +1065,18 @@ static void rz_dmac_remove(struct platform_device *p= dev) pm_runtime_disable(&pdev->dev); } =20 +static const struct rz_dmac_info rz_dmac_v2h_info =3D { + .register_dma_req =3D rzv2h_icu_register_dma_req, + .dma_req_no_default =3D RZV2H_ICU_DMAC_REQ_NO_DEFAULT, +}; + +static const struct rz_dmac_info rz_dmac_common_info =3D { + .dma_req_no_default =3D 0, +}; + static const struct of_device_id of_rz_dmac_match[] =3D { - { .compatible =3D "renesas,r9a09g057-dmac", }, - { .compatible =3D "renesas,rz-dmac", }, + { .compatible =3D "renesas,r9a09g057-dmac", .data =3D &rz_dmac_v2h_info }, + { .compatible =3D "renesas,rz-dmac", .data =3D &rz_dmac_common_info }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, of_rz_dmac_match); --=20 2.52.0