From nobody Fri Dec 19 16:39:15 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 997922FD7AC; Fri, 5 Dec 2025 15:03:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764947039; cv=none; b=Kh+96oR7yWc6GYLiHV3UJhh9YxgIbCqkJnw5+8rKxiKrzecPVgRoO4oYGilZ5YerI2QzDulT8WfF0oSOr9WUsWaazjWPI9b4YwUrDT2h3fNCijE4B6mZbf1oHxavYlwgjf13QDMRnnLjwqarIUuokj2313BDKbfWqGjXOW+DLXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764947039; c=relaxed/simple; bh=RZffuRu7uLUWim6uKoTBHAT7RNpmx4ovDliCZmMqsTM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DDrIPbWTBgC2wcu0fgURFyW25SuHxN1PFU2M3zD/SbrOOrND9bTUMXyME2pLSG53ezhkQj4Nw22QeAfEqARxaZQi4flUoM4ttLGzOmPXxXaj662CGgT4WtDQuDJPFInSlV8nVhhQwGiMYL6Fy/J3o56Skc4Tb5JgAqMr/bKIt5s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: QtplvdtVQNmSTFU8yIYYLw== X-CSE-MsgGUID: yCd5z+ntQSuAOJ3xuLVg6A== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 06 Dec 2025 00:03:53 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.202]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 64308427BFF0; Sat, 6 Dec 2025 00:03:49 +0900 (JST) From: Cosmin Tanislav To: Geert Uytterhoeven , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Lad Prabhakar Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v2 5/8] arm64: dts: renesas: r9a09g077: add GPIO IRQ support Date: Fri, 5 Dec 2025 17:02:31 +0200 Message-ID: <20251205150234.2958140-6-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251205150234.2958140-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251205150234.2958140-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) SoC includes pins which can be routed via the ICU to generate interrupts. Add support for using the pin controller as an interrupt chip. Signed-off-by: Cosmin Tanislav --- V2: * no changes arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index 0af41287e6a8..6812af127684 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -945,6 +945,9 @@ pinctrl: pinctrl@802c0000 { gpio-controller; #gpio-cells =3D <2>; gpio-ranges =3D <&pinctrl 0 0 288>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&icu>; power-domains =3D <&cpg>; }; =20 --=20 2.52.0