From nobody Fri Dec 19 17:27:00 2025 Received: from out198-24.us.a.mail.aliyun.com (out198-24.us.a.mail.aliyun.com [47.90.198.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E67D330C62D for ; Fri, 5 Dec 2025 08:12:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=47.90.198.24 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764922340; cv=none; b=BdJdgmRI0TC5hWXe0hTTsW1YhwYusKOGV/1oDFLJTyekWWRvcc7zesOAah1jxZwPp8FGN2Y5gxLrtDkhn26xQs/DYLcIMtzv/HeTUNcpyKpK0bb/p8BHpWOgsynmEDobKP2BXu4HnClcHjKREuX9csVfDKjy9Ni4lIp6mSMLo4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764922340; c=relaxed/simple; bh=hlHzpVoZ9Zo0L37uVuYwiXN/Wh3X1qyszBE6D1mf/r8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YaHcUwDDvPQwGZ1aQ+1JpmzN4yw9DThB8OVMEowWKz/9T9iEI2I9tnrfbmlNXXa8cY96FUzqz5+s4OmPJxtJRezMCfhiQ4Xv9bW0XWYdGK/T3ar+Qcf2sLvdWyMH2AkTU4cmx2Emrn+R9MUt+34cS8Tvvc6Ndo8Rk56Fc0c82BM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=open-hieco.net; spf=pass smtp.mailfrom=open-hieco.net; arc=none smtp.client-ip=47.90.198.24 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=open-hieco.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=open-hieco.net Received: from localhost.localdomain(mailfrom:shenxiaochen@open-hieco.net fp:SMTPD_---.fdRsuHo_1764922306 cluster:ay29) by smtp.aliyun-inc.com; Fri, 05 Dec 2025 16:11:48 +0800 From: Xiaochen Shen To: tony.luck@intel.com, reinette.chatre@intel.com, bp@alien8.de, fenghuay@nvidia.com Cc: babu.moger@amd.com, james.morse@arm.com, Dave.Martin@arm.com, x86@kernel.org, linux-kernel@vger.kernel.org, shenxiaochen@open-hieco.net Subject: [PATCH v2 1/2] x86/resctrl: Add missing resctrl initialization for Hygon Date: Fri, 5 Dec 2025 16:10:50 +0800 Message-ID: <20251205081051.2063153-2-shenxiaochen@open-hieco.net> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251205081051.2063153-1-shenxiaochen@open-hieco.net> References: <20251205081051.2063153-1-shenxiaochen@open-hieco.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Hygon CPUs supporting Platform QoS features currently undergo partial resctrl initialization through resctrl_cpu_detect() in the Hygon BSP init helper and AMD/Hygon common initialization code. However, several critical data structures remain uninitialized for Hygon CPUs in the following paths: - get_mem_config()-> __rdt_get_mem_config_amd(): rdt_resource::membw,alloc_capable hw_res::num_closid - rdt_init_res_defs()->rdt_init_res_defs_amd(): rdt_resource::cache hw_res::msr_base,msr_update Add the missing AMD/Hygon common initialization to ensure proper Platform QoS functionality on Hygon CPUs. Fixes: d8df126349da ("x86/cpu/hygon: Add missing resctrl_cpu_detect() in bs= p_init helper") Fixes: 923f3a2b48bd ("x86/resctrl: Query LLC monitoring properties once dur= ing boot") Signed-off-by: Xiaochen Shen Reviewed-by: Reinette Chatre Cc: stable@vger.kernel.org --- arch/x86/kernel/cpu/resctrl/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 3792ab4819dc..10de1594d328 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -825,7 +825,8 @@ static __init bool get_mem_config(void) =20 if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL) return __get_mem_config_intel(&hw_res->r_resctrl); - else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD) + else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || + boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) return __rdt_get_mem_config_amd(&hw_res->r_resctrl); =20 return false; @@ -987,7 +988,8 @@ static __init void rdt_init_res_defs(void) { if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL) rdt_init_res_defs_intel(); - else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD) + else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || + boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) rdt_init_res_defs_amd(); } =20 --=20 2.47.3