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AJvYcCWI/eqbU5imsCORTsUC2pi8srpPwqO63l0eTT+Eu5OUmu4fCNqcoYKMuvkzsZpBD7gNbVcpE0W4TCwp6aM=@vger.kernel.org X-Gm-Message-State: AOJu0YyLzYjaGqR7nYOETKSHcpuDLJr1jhmfZIH6+630Ys/hw0dvG/F6 MnCa//oRQT3wRq0I9w3tL6P4IQzRXFs3PKCPQtZxB1f/AP6WvneH3vonRa1cYgeOFw8PwKVjAGe qE/DHeU9TIzvarvdIQcosUn35zVBCtQ== X-Google-Smtp-Source: AGHT+IGYFV6MU4YB63AJyKdvva+eVU8KUbYz33XJWjAtkBwDnomi6wq1povsUBPPhQoD986KcORpY779p4tk4+RsEF0= X-Received: from pjbie17.prod.google.com ([2002:a17:90b:4011:b0:33b:dccb:b328]) (user=willmcvicker job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:2f83:b0:349:2125:be60 with SMTP id 98e67ed59e1d1-3492125c2b9mr7143191a91.8.1764897042691; Thu, 04 Dec 2025 17:10:42 -0800 (PST) Date: Fri, 5 Dec 2025 01:10:18 +0000 In-Reply-To: <20251205011027.720512-1-willmcvicker@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251205011027.720512-1-willmcvicker@google.com> X-Mailer: git-send-email 2.52.0.223.gf5cc29aaa4-goog Message-ID: <20251205011027.720512-6-willmcvicker@google.com> Subject: [PATCH v7 5/6] clocksource/drivers/exynos_mct: Add module support for ARM64 From: Will McVicker To: Catalin Marinas , Will Deacon , Daniel Lezcano , Thomas Gleixner , Krzysztof Kozlowski , Alim Akhtar Cc: Will McVicker , Donghoon Yu , Rob Herring , John Stultz , Youngmin Nam , Peter Griffin , Tudor Ambarus , "=?UTF-8?q?Andr=C3=A9=20Draszik?=" , Conor Dooley , Marek Szyprowski , "Russell King (Oracle)" , linux-samsung-soc@vger.kernel.org, kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On Arm64 platforms the Exynos MCT driver can be built as a module. On boot (and even after boot) the arch_timer is used as the clocksource and tick timer. Once the MCT driver is loaded, it can be used as the wakeup source for the arch_timer. Note, this commit was derived from https://android.googlesource.com/kernel/gs/+/8a52a8288ec7d88ff78f0b37480dbb= 0e9c65bbfd. Signed-off-by: Daniel Lezcano Reviewed-by: Youngmin Nam # AOSP -> Linux port Tested-by: Youngmin Nam # AOSP -> Linux port Signed-off-by: Will McVicker --- drivers/clocksource/Kconfig | 3 +- drivers/clocksource/exynos_mct.c | 51 ++++++++++++++++++++++++++++---- 2 files changed, 47 insertions(+), 7 deletions(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index ffcd23668763..9450cfaf982f 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -451,7 +451,8 @@ config ATMEL_TCB_CLKSRC Support for Timer Counter Blocks on Atmel SoCs. =20 config CLKSRC_EXYNOS_MCT - bool "Exynos multi core timer driver" if COMPILE_TEST + tristate "Exynos multi core timer driver" if ARM64 + default y if ARCH_EXYNOS || COMPILE_TEST depends on ARM || ARM64 depends on ARCH_ARTPEC || ARCH_EXYNOS || COMPILE_TEST help diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_= mct.c index 922c2b519a39..d9a888607726 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -15,9 +15,11 @@ #include #include #include +#include #include #include #include +#include #include #include =20 @@ -232,6 +234,7 @@ static struct clocksource mct_frc =3D { .mask =3D CLOCKSOURCE_MASK(32), .flags =3D CLOCK_SOURCE_IS_CONTINUOUS, .resume =3D exynos4_frc_resume, + .owner =3D THIS_MODULE, }; =20 /* @@ -256,7 +259,7 @@ static cycles_t exynos4_read_current_timer(void) } #endif =20 -static int __init exynos4_clocksource_init(struct mct_context *ctx, bool f= rc_shared) +static int __init_or_module exynos4_clocksource_init(struct mct_context *c= tx, bool frc_shared) { /* * When the frc is shared, the main processor should have already @@ -343,6 +346,7 @@ static struct mct_clock_event_device mct_comp_device = =3D { .set_state_oneshot =3D mct_set_state_shutdown, .set_state_oneshot_stopped =3D mct_set_state_shutdown, .tick_resume =3D mct_set_state_shutdown, + .owner =3D THIS_MODULE, }, }; =20 @@ -484,6 +488,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu) evt->features =3D CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERCPU; evt->rating =3D MCT_CLKEVENTS_RATING; + evt->owner =3D THIS_MODULE; =20 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); =20 @@ -520,7 +525,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) return 0; } =20 -static int __init exynos4_timer_resources(struct mct_context *ctx, +static int __init_or_module exynos4_timer_resources(struct mct_context *ct= x, struct device_node *np) { struct clk *mct_clk, *tick_clk; @@ -549,7 +554,7 @@ static int __init exynos4_timer_resources(struct mct_co= ntext *ctx, * @local_idx: array mapping CPU numbers to local timer indices * @nr_local: size of @local_idx array */ -static int __init exynos4_timer_interrupts(struct mct_context *ctx, +static int __init_or_module exynos4_timer_interrupts(struct mct_context *c= tx, struct device_node *np, const u32 *local_idx, size_t nr_local) @@ -662,7 +667,7 @@ static int __init exynos4_timer_interrupts(struct mct_c= ontext *ctx, return err; } =20 -static int __init mct_init_dt(struct mct_context *ctx, struct device_node = *np) +static int __init_or_module mct_init_dt(struct mct_context *ctx, struct de= vice_node *np) { bool frc_shared =3D of_property_read_bool(np, "samsung,frc-shared"); u32 local_idx[MCT_NR_LOCAL] =3D {0}; @@ -722,7 +727,9 @@ static const struct of_device_id exynos4_mct_match_tabl= e[] =3D { { .compatible =3D "samsung,exynos4412-mct", .data =3D &exynos4412_mct_dat= a, }, {} }; +MODULE_DEVICE_TABLE(of, exynos4_mct_match_table); =20 +#if defined(CONFIG_ARM) /* Note, legacy ARM 32-bit systems depend on the MCT as the only clocksour= ce * which requires this driver to be initialized very early. We need to kee= p this * special condition until we can transparently support modular and early = init @@ -748,13 +755,11 @@ static int __init mct_of_declare_init(struct device_n= ode *np) if (ret) goto out_ctx; =20 -#if defined(CONFIG_ARM) sched_clock_register(exynos4_read_sched_clock, 32, ctx->clk_rate); =20 exynos4_delay_timer.read_current_timer =3D &exynos4_read_current_timer; exynos4_delay_timer.freq =3D ctx->clk_rate; register_current_timer_delay(&exynos4_delay_timer); -#endif =20 return 0; =20 @@ -764,3 +769,37 @@ static int __init mct_of_declare_init(struct device_no= de *np) } TIMER_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_of_declare_init= ); TIMER_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_of_declare_init= ); +#else +static int exynos4_mct_probe(struct platform_device *pdev) +{ + struct mct_context *ctx; + struct device *dev =3D &pdev->dev; + + ctx =3D devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + ctx->drvdata =3D of_device_get_match_data(dev); + if (!ctx->drvdata) + return -EINVAL; + + return mct_init_dt(ctx, dev->of_node); +} + +static struct platform_driver exynos4_mct_driver =3D { + .probe =3D exynos4_mct_probe, + .driver =3D { + .name =3D "exynos-mct", + .of_match_table =3D exynos4_mct_match_table, + }, +}; + +static int __init exynos_mct_init(void) +{ + return platform_driver_register(&exynos4_mct_driver); +} +module_init(exynos_mct_init); + +MODULE_DESCRIPTION("Exynos Multi Core Timer Driver"); +MODULE_LICENSE("GPL"); +#endif /* CONFIG_ARM */ --=20 2.52.0.223.gf5cc29aaa4-goog