From nobody Fri Dec 19 21:12:42 2025 Received: from out198-24.us.a.mail.aliyun.com (out198-24.us.a.mail.aliyun.com [47.90.198.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1B19243951 for ; Thu, 4 Dec 2025 02:38:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=47.90.198.24 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764815944; cv=none; b=WZXaadJfUlng9bH0xx75F58WWIUc8HsKn+Z7KUdBY7JDaJB8Mxac30+y0SDz0JUVHg67ZyDel/BYF+omwIeizYvQWmNhSkd2udMBIK7+JhJjvmbfYoLOKduUzBOt5rPmkbHtUwFFqXoGa56bpgaLzabLxPOYlxGuzRIgw5vVICE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764815944; c=relaxed/simple; bh=m5qtaTV+5L1MsNOzZk/B6h9ks5pY6K60NlOUClz32Ko=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YMEW1khF7MteF0vQaS621/lBFuidcaVYE0QKxHCx0Qg2E1xRtlhPkeIfbCfXZdXsAJaeNA8oDQbIqKA4ZbxneLFa1nrWVslEkRH8k06LZiRGl15xtky3zS83cv875TDKgArJFkN0vcE4eNnZVVWFahJ3wiE5lgYkCShF7x+5EiA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=open-hieco.net; spf=pass smtp.mailfrom=open-hieco.net; arc=none smtp.client-ip=47.90.198.24 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=open-hieco.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=open-hieco.net Received: from localhost.localdomain(mailfrom:shenxiaochen@open-hieco.net fp:SMTPD_---.fcVtMRB_1764815919 cluster:ay29) by smtp.aliyun-inc.com; Thu, 04 Dec 2025 10:38:41 +0800 From: Xiaochen Shen To: tony.luck@intel.com, reinette.chatre@intel.com, bp@alien8.de, fenghuay@nvidia.com Cc: babu.moger@amd.com, james.morse@arm.com, Dave.Martin@arm.com, x86@kernel.org, linux-kernel@vger.kernel.org, shenxiaochen@open-hieco.net Subject: [PATCH 1/2] x86/resctrl: Add missing resctrl initialization for Hygon Date: Thu, 4 Dec 2025 10:37:49 +0800 Message-ID: <20251204023750.994143-2-shenxiaochen@open-hieco.net> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251204023750.994143-1-shenxiaochen@open-hieco.net> References: <20251204023750.994143-1-shenxiaochen@open-hieco.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Hygon CPUs supporting Platform QoS features currently undergo partial resctrl initialization through resctrl_cpu_detect() in the Hygon BSP init helper and AMD/Hygon common initialization code. However, several critical data structures remain uninitialized for Hygon CPUs in the following paths: - get_mem_config()-> __rdt_get_mem_config_amd(): rdt_resource::membw,alloc_capable hw_res::num_closid - rdt_init_res_defs()->rdt_init_res_defs_amd(): rdt_resource::cache hw_res::msr_base,msr_update Add the missing AMD/Hygon common initialization to ensure proper Platform QoS functionality on Hygon CPUs. Fixes: d8df126349da ("x86/cpu/hygon: Add missing resctrl_cpu_detect() in bs= p_init helper") Fixes: 923f3a2b48bd ("x86/resctrl: Query LLC monitoring properties once dur= ing boot") Cc: stable@vger.kernel.org Signed-off-by: Xiaochen Shen --- arch/x86/kernel/cpu/resctrl/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 3792ab4819dc..10de1594d328 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -825,7 +825,8 @@ static __init bool get_mem_config(void) =20 if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL) return __get_mem_config_intel(&hw_res->r_resctrl); - else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD) + else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || + boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) return __rdt_get_mem_config_amd(&hw_res->r_resctrl); =20 return false; @@ -987,7 +988,8 @@ static __init void rdt_init_res_defs(void) { if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL) rdt_init_res_defs_intel(); - else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD) + else if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || + boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) rdt_init_res_defs_amd(); } =20 --=20 2.47.3