From nobody Sun Dec 14 21:45:09 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF1E4301471 for ; Thu, 4 Dec 2025 04:43:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764823399; cv=none; b=amcdZ2f4vVuhXQrSPBAYRpjKwyKUyveOqXVduMAcSGAfxLMsSMjjjny7QXmQNie7iLdtb5ZGigYTIEzGnZdRZGM8N07OFeEIkBogRrBE36fpnQCqSx3LPE8aosoxHEscb4JCbok3tATJpjGthtg5S4u+n/CdKmfX9unZp7T+Jlc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764823399; c=relaxed/simple; bh=0cctjiu4mUm5N0O/l2W3akr4wwL/nWN7vsCpgeUxUnI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=D1kmZCom9CCs8f8gwrrJ+GyO3RzeHc2ndgCSC7LfeM9WG1hZg8xB/12F/B/9dm5mMszDAalyHUuysJOfZHg885EpI4Uc04l44U1KypB0y7XsMSsE84dvWcwxbIss/LEfYBe4iso775yxRc8p42LwTAjo3yJ+F8B6/KJRlk2CbzQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=kvwbA8er; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=VTs7CArP; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="kvwbA8er"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="VTs7CArP" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5B3GR08o1969626 for ; Thu, 4 Dec 2025 04:43:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 2qH6VhWxn/zSPj4QiRAg7fr+LOmrENATveDxzpql1NE=; b=kvwbA8erHs7ibcJD a1SX96/NqavGIaAHA3Sh7X0NqbLqfoefAOgYsMK4oOn7tOf65SmRq+XC84WIfZbH fBUy4/nqOwJp4lNRspiyyYvyj5/C1qH2BST8nUm6j9I3n5tx2CzP1Rh0eZ8n3AEK Jhizv8tzd7YIM7hrg4k/Wd0zeEnbueVUNdh7HImeWV/uEA5NXa6eU6f1RL1IAV3x ge+5/22j0AIA5CWWm1h/2o0ZTG+q/TPyfQr9yGrRgRms0xAb5TBcVyHq6g5dATtr NVKFxto3vBpepBHyWRxMRJ4iUORoCy31TWzX4rrJ2Mud6vQ3RyZpUhlgMujohT5x njHYcw== Received: from mail-ot1-f72.google.com (mail-ot1-f72.google.com [209.85.210.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4atjjs330r-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Dec 2025 04:43:14 +0000 (GMT) Received: by mail-ot1-f72.google.com with SMTP id 46e09a7af769-7c7542602a7so998092a34.2 for ; Wed, 03 Dec 2025 20:43:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1764823394; x=1765428194; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2qH6VhWxn/zSPj4QiRAg7fr+LOmrENATveDxzpql1NE=; b=VTs7CArPocUZPPYqqyb5va0vaHxU7fP+k++S9t5fqRv+SpUS76MUzIoVIaq6TXmo0f PzKdyvmxIX6jzcAYQVgsz2Nm03THnjF7UcweQelRBVPjeulnr4DjYBEvStUBOQpCaYOZ qI8AnSfUf+Tg28/4DBtEwdqTAT5cwgUNXEQDNORyuvb+1z2OGNe3KCIcU0pZ9jlLmI8B wo/CRaaL6FUMFoZ1WWYh+EgB2dn/imn+Vz3fpzYlLRWJ/rHwT2pKrnUmst1Ei4E1XkdQ nv9/AOFG6YGIjvABebBAUpy5o67/A2pouSdDhfZMSeMIUriVE6Io+prjI6bIRM5/5evP XN3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764823394; x=1765428194; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=2qH6VhWxn/zSPj4QiRAg7fr+LOmrENATveDxzpql1NE=; b=vsExFIsGG2Q1r25m7duT0oBBxHuTF/SX8OVjQElF4vSJZonP94TkiBTrzN+nQWBhw1 zC/PpZskzpXywwr9THyai90LRV2oHySA1SEKs0+xnz9Jc2yhe0HKYB/n9xBbc1rkO6F7 fvnxNTV8Brtq625lg+Yz0hq+CddwDAFNBnDpselgmkW5hgGfqE98FVwVtrBhSClbpjSm s+lYvDsnmjKIYnsekQo5zcZFCA+R4mIAm2ux19PF4WAE8wWKvt307BtrJjnf29FTFBg3 y9UdoWMNaGil3RG/2yJ7Ekez6c3O/SiA2VKltU5AySDth3WyKfO7NcZjFFGofc01kUoa GMHQ== X-Forwarded-Encrypted: i=1; AJvYcCX1mE1TOcvm9eE04i+JhoaVSs/IHsNKwwi/7EEnxmAaowj+0SI65CJTgc57Qe1Vdp3MpX/acS/7qm3Sy2g=@vger.kernel.org X-Gm-Message-State: AOJu0YzUeS8lKx2C0iOJNvsVa//N4mY1jUeVPwytoqAZizmrztQZB+sL /SldAYhG4+jXsq6Tex5AUQXSyeeUuiHkiTe5THBCMAIvcxt+/rYmZXe7oCaXcV/qmLfcxCeqZNd 6eExArCeVPFYLoaUIHcUlXmO80YN2ivKa8k6OkTSYemn/jaAlExdVowdbPm7YeG3FTgM= X-Gm-Gg: ASbGncsRN3fyftUnFqb4gMbWtsYePTxTJIA4HWqvZPagHvD71aEf5REq3ZTdpJbQPwh +Hj8XGAR2uOzGz4cc0Y5xLV6y1kISctsOFyOSX97xzZrBtaSVZl8fFxXz9QkERiJ7TRUT6RVPye TzJwxmB4Ficy6hcXemyku4oFub38zlGpONDptTZtlT+3s6GKhX/V1icDe6gp+woUaGOVtSxfW/y bLUgCAVIEHGT6mNlhJ1U0FFNHSW+arq/mM9/Y3JbKu4OSnplNMkI6pBGchx5wmKWHzearK8XQuF 304XdM5u/2YJ3ucMoWgivgkT0a47O66tN7CzU6PXJ2UtoMnsPrvqfixAEb7Jan9Zf1RGg0zX2Cc m0KndNbHf4m6IqooTeZhpAzV9UbWmaAx+2jU7WhMIFgtS/DEe9cwpk50XBmVIOZRQuB8= X-Received: by 2002:a05:6830:928:b0:7c7:4f2:e15d with SMTP id 46e09a7af769-7c94da8d653mr3905747a34.16.1764823394034; Wed, 03 Dec 2025 20:43:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IEfTC4VxSFkNGVr4Z5bujBFVddU6sL6eyMbA/c6ZS4EDGp+VnJNrluZK6lZDDhee9esv+QgHQ== X-Received: by 2002:a05:6830:928:b0:7c7:4f2:e15d with SMTP id 46e09a7af769-7c94da8d653mr3905734a34.16.1764823393701; Wed, 03 Dec 2025 20:43:13 -0800 (PST) Received: from hu-yuanfang-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-6597ec5b35csm213766eaf.7.2025.12.03.20.43.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Dec 2025 20:43:13 -0800 (PST) From: Yuanfang Zhang Date: Wed, 03 Dec 2025 20:43:08 -0800 Subject: [PATCH RESEND v5 2/3] coresight-tnoc: add platform driver to support Interconnect TNOC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251203-itnoc-v5-2-5b97c63f2268@oss.qualcomm.com> References: <20251203-itnoc-v5-0-5b97c63f2268@oss.qualcomm.com> In-Reply-To: <20251203-itnoc-v5-0-5b97c63f2268@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Shishkin Cc: kernel@oss.qualcomm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yuanfang Zhang , Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764823388; l=6708; i=yuanfang.zhang@oss.qualcomm.com; s=20250814; h=from:subject:message-id; bh=0cctjiu4mUm5N0O/l2W3akr4wwL/nWN7vsCpgeUxUnI=; b=tkVi5jpLE980exzS+Ml41aR0N2Jk1T47l1iyiqMOLHp6mL/4uVVz7qGscZWkpxkGowYQJ6Zeu 7Jo3qrDk1yNDot9ZSqeELlNhsyl0YKP0Ba5HB0Nc997/lEm6al1EhyA X-Developer-Key: i=yuanfang.zhang@oss.qualcomm.com; a=ed25519; pk=9oS/FoPW5k0CsqSDDrPlnV+kVIOUaAe0O5pr4M1wHgY= X-Proofpoint-ORIG-GUID: hmJxdNNmU0RUIERGLpccd3xFxqjtGMBL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA0MDAzNSBTYWx0ZWRfXx0x+8SEig1sA PWjOAxBUaJt5l8gZDsJRyCvGLb3VZFmVMQYkoDeP51ZyfW5EGtgneYL8/jS8GeYmBRSjrWZXDB7 2Jf8yyAPOmjN24cklu9IXuUBOqRtSnUT45B6a1DADFd7VgywXAtaq7b2U1x3M30+2i2BIOcxz/i JYwytya+5eNxpcrT6MPJAi3YKQMryPyDAsL8Cy8J5Nc86axSGhjwTt17m/0ESdNwobUlrrBqZzW hArPR+Mn7kzq/Kx4RnKYTRlg3bigfECFV36CYPlSET0BVMb0Rf/Z9PlBvJPxbdapQmKvDRkRJCU nLooQ+xa8GSqpa4wKhANIwcDcnyMsVEFdAZkkfnyrlJQ4Pq0Ugj/m32bXIoTly66GJMaC8h2tGW 5a6XwZkzwA4lpN5vs7T0qd1u/1kKeA== X-Proofpoint-GUID: hmJxdNNmU0RUIERGLpccd3xFxqjtGMBL X-Authority-Analysis: v=2.4 cv=ZqDg6t7G c=1 sm=1 tr=0 ts=69311162 cx=c_pps a=+3WqYijBVYhDct2f5Fivkw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=7CQSdrXTAAAA:8 a=pUju2gecW9X7egxZnGUA:9 a=QEXdDO2ut3YA:10 a=eYe2g0i6gJ5uXG_o6N4q:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-04_01,2025-12-03_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 spamscore=0 bulkscore=0 adultscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512040035 This patch adds platform driver support for the CoreSight Interconnect TNOC, Interconnect TNOC is a CoreSight link that forwards trace data from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it does not have aggregation and ATID functionality. Key changes: - Add platform driver `coresight-itnoc` with device tree match support. - Refactor probe logic into a common `_tnoc_probe()` function. - Conditionally initialize ATID only for AMBA-based TNOC blocks. Signed-off-by: Yuanfang Zhang Reviewed-by: Leo Yan --- drivers/hwtracing/coresight/coresight-tnoc.c | 113 +++++++++++++++++++++++= +--- 1 file changed, 102 insertions(+), 11 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtraci= ng/coresight/coresight-tnoc.c index d542df46ea39314605290311f683010337bfd4bd..5be882300d79bc0173aa6a19d7d= a1d48c4aaca9c 100644 --- a/drivers/hwtracing/coresight/coresight-tnoc.c +++ b/drivers/hwtracing/coresight/coresight-tnoc.c @@ -34,6 +34,7 @@ * @base: memory mapped base address for this component. * @dev: device node for trace_noc_drvdata. * @csdev: component vitals needed by the framework. + * @pclk: APB clock if present, otherwise NULL * @spinlock: serialize enable/disable operation. * @atid: id for the trace packet. */ @@ -41,8 +42,9 @@ struct trace_noc_drvdata { void __iomem *base; struct device *dev; struct coresight_device *csdev; + struct clk *pclk; spinlock_t spinlock; - u32 atid; + int atid; }; =20 DEFINE_CORESIGHT_DEVLIST(trace_noc_devs, "traceNoc"); @@ -51,6 +53,12 @@ static void trace_noc_enable_hw(struct trace_noc_drvdata= *drvdata) { u32 val; =20 + /* No valid ATID, simply enable the unit */ + if (drvdata->atid =3D=3D -EOPNOTSUPP) { + writel(TRACE_NOC_CTRL_PORTEN, drvdata->base + TRACE_NOC_CTRL); + return; + } + /* Set ATID */ writel_relaxed(drvdata->atid, drvdata->base + TRACE_NOC_XLD); =20 @@ -124,6 +132,11 @@ static int trace_noc_init_default_data(struct trace_no= c_drvdata *drvdata) { int atid; =20 + if (!dev_is_amba(drvdata->dev)) { + drvdata->atid =3D -EOPNOTSUPP; + return 0; + } + atid =3D coresight_trace_id_get_system_id(); if (atid < 0) return atid; @@ -149,8 +162,21 @@ static struct attribute *coresight_tnoc_attrs[] =3D { NULL, }; =20 +static umode_t trace_id_is_visible(struct kobject *kobj, + struct attribute *attr, int idx) +{ + struct device *dev =3D kobj_to_dev(kobj); + struct trace_noc_drvdata *drvdata =3D dev_get_drvdata(dev->parent); + + if (attr =3D=3D &dev_attr_traceid.attr && drvdata->atid < 0) + return 0; + + return attr->mode; +} + static const struct attribute_group coresight_tnoc_group =3D { .attrs =3D coresight_tnoc_attrs, + .is_visible =3D trace_id_is_visible, }; =20 static const struct attribute_group *coresight_tnoc_groups[] =3D { @@ -158,9 +184,8 @@ static const struct attribute_group *coresight_tnoc_gro= ups[] =3D { NULL, }; =20 -static int trace_noc_probe(struct amba_device *adev, const struct amba_id = *id) +static int _tnoc_probe(struct device *dev, struct resource *res) { - struct device *dev =3D &adev->dev; struct coresight_platform_data *pdata; struct trace_noc_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; @@ -173,16 +198,20 @@ static int trace_noc_probe(struct amba_device *adev, = const struct amba_id *id) pdata =3D coresight_get_platform_data(dev); if (IS_ERR(pdata)) return PTR_ERR(pdata); - adev->dev.platform_data =3D pdata; + dev->platform_data =3D pdata; =20 drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) return -ENOMEM; =20 - drvdata->dev =3D &adev->dev; + drvdata->dev =3D dev; dev_set_drvdata(dev, drvdata); =20 - drvdata->base =3D devm_ioremap_resource(dev, &adev->res); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, NULL); + if (ret) + return ret; + + drvdata->base =3D devm_ioremap_resource(dev, res); if (IS_ERR(drvdata->base)) return PTR_ERR(drvdata->base); =20 @@ -195,20 +224,31 @@ static int trace_noc_probe(struct amba_device *adev, = const struct amba_id *id) desc.ops =3D &trace_noc_cs_ops; desc.type =3D CORESIGHT_DEV_TYPE_LINK; desc.subtype.link_subtype =3D CORESIGHT_DEV_SUBTYPE_LINK_MERG; - desc.pdata =3D adev->dev.platform_data; - desc.dev =3D &adev->dev; + desc.pdata =3D pdata; + desc.dev =3D dev; desc.access =3D CSDEV_ACCESS_IOMEM(drvdata->base); desc.groups =3D coresight_tnoc_groups; drvdata->csdev =3D coresight_register(&desc); if (IS_ERR(drvdata->csdev)) { - coresight_trace_id_put_system_id(drvdata->atid); + if (drvdata->atid > 0) + coresight_trace_id_put_system_id(drvdata->atid); return PTR_ERR(drvdata->csdev); } - pm_runtime_put(&adev->dev); =20 return 0; } =20 +static int trace_noc_probe(struct amba_device *adev, const struct amba_id = *id) +{ + int ret; + + ret =3D _tnoc_probe(&adev->dev, &adev->res); + if (!ret) + pm_runtime_put(&adev->dev); + + return ret; +} + static void trace_noc_remove(struct amba_device *adev) { struct trace_noc_drvdata *drvdata =3D dev_get_drvdata(&adev->dev); @@ -236,7 +276,58 @@ static struct amba_driver trace_noc_driver =3D { .id_table =3D trace_noc_ids, }; =20 -module_amba_driver(trace_noc_driver); +static int itnoc_probe(struct platform_device *pdev) +{ + struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + int ret; + + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + ret =3D _tnoc_probe(&pdev->dev, res); + pm_runtime_put(&pdev->dev); + if (ret) + pm_runtime_disable(&pdev->dev); + + return ret; +} + +static void itnoc_remove(struct platform_device *pdev) +{ + struct trace_noc_drvdata *drvdata =3D platform_get_drvdata(pdev); + + coresight_unregister(drvdata->csdev); + pm_runtime_disable(&pdev->dev); +} + +static const struct of_device_id itnoc_of_match[] =3D { + { .compatible =3D "qcom,coresight-itnoc" }, + {} +}; +MODULE_DEVICE_TABLE(of, itnoc_of_match); + +static struct platform_driver itnoc_driver =3D { + .probe =3D itnoc_probe, + .remove =3D itnoc_remove, + .driver =3D { + .name =3D "coresight-itnoc", + .of_match_table =3D itnoc_of_match, + .suppress_bind_attrs =3D true, + }, +}; + +static int __init tnoc_init(void) +{ + return coresight_init_driver("tnoc", &trace_noc_driver, &itnoc_driver, TH= IS_MODULE); +} + +static void __exit tnoc_exit(void) +{ + coresight_remove_driver(&trace_noc_driver, &itnoc_driver); +} +module_init(tnoc_init); +module_exit(tnoc_exit); =20 MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Trace NOC driver"); --=20 2.34.1