From nobody Mon Dec 1 22:05:37 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C767E2EC090; Mon, 1 Dec 2025 11:50:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589832; cv=none; b=LxmJysHOHo9Q7Vy6z8BBMbUZ1smkDZJc1lkYnEEciAkwqrTx3d+GHkGu+yOko2MnYc24CdIfabo7AcgyPQroVpkK55ppPRNqV8bd5ro5D2ozTGMzZOBalr5nSxUR/S+waHYwkQmyriAxFiBiCigJeTqnbvZk8/8M7iSrzjksPME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589832; c=relaxed/simple; bh=vRxJwFcDzUf2HlLjmMzxLbO0GlkYzUeR6Yd8tjAVSd0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bxzuSArbHDZDL8vYurD6AlJvIgyX3loVV/ciww7Cn36NKt0AXrDRUxaiU5qDmShs0vg6uV2YvH1DjP7JBYqsAE36r1MBn6etIqKCy9X0ejZXXxsQAdfSYGkWsugzkOgIQxSslu5kBkHoPAqj5QNDEnjktx0Wve8bhQQGIjVRe44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: B+9tSAnfRteEoVu5vanZ1A== X-CSE-MsgGUID: lf8hMcwCQ+GJjI766vfPDw== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:28 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id D0E0741F9E1E; Mon, 1 Dec 2025 20:50:23 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g077: add DMAC support Date: Mon, 1 Dec 2025 13:49:09 +0200 Message-ID: <20251201114910.515178-6-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) SoC has three instances of the DMAC IP. Add support for them. Signed-off-by: Cosmin Tanislav --- V2: * pick up Fab's Reviewed-by arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index 6812af127684..ee11efb68638 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -376,6 +376,96 @@ i2c2: i2c@81008000 { status =3D "disabled"; }; =20 + dmac0: dma-controller@800c0000 { + compatible =3D "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c0000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 0>; + }; + + dmac1: dma-controller@800c1000 { + compatible =3D "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c1000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 1>; + }; + + dmac2: dma-controller@800c2000 { + compatible =3D "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c2000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 2>; + }; + gmac0: ethernet@80100000 { compatible =3D "renesas,r9a09g077-gbeth", "snps,dwmac-5.20"; reg =3D <0 0x80100000 0 0x10000>; --=20 2.52.0