From nobody Mon Dec 1 21:31:56 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DAAF12EA498; Mon, 1 Dec 2025 11:50:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589808; cv=none; b=K7Li630XWb4cnT8YtoKppfhtQCaovWQ0TQ7krg7/b/UDi9FJMp9rXcXLc483CZRoRiSMB6pp72MFM0qP2+gvHOgHr7c5ex8rRDogNIvzfR80j8np9Q+YWX5aKmIOfcfZ03RtBg5zEp7ZGUygshv6rMsSLmXmVi0R0Fo6s0xCwlE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589808; c=relaxed/simple; bh=wwU7sF+SGIZ7+oHTz+yuRshRcLVvH8YW4fY+bnGYzZ8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WOp6ulYCubwTPB8QYERlHroryAh1JBH0JKCNIS5dHiKOuVo2aQpO8KBqdhXckZnYNXkZ9MniUbfcyEpUiKG2IHsKsKt7lnJxtPTX4qC4rq/DweEhuXzGAF6NOSlo74/3dICejQpfLUFfb8vovtlBBbt+m4fuJ33nkBeOBWxktRo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: S8op3OR9RcuPC+74PiogMQ== X-CSE-MsgGUID: uvqBFquBQGSTGpeY+8Eg3Q== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:05 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id D819741F9E08; Mon, 1 Dec 2025 20:50:00 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 1/6] dmaengine: sh: rz_dmac: make error interrupt optional Date: Mon, 1 Dec 2025 13:49:05 +0200 Message-ID: <20251201114910.515178-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs do not have an error interrupt for the DMACs, and the current driver implementation does not make much use of it. To prepare for adding support for these SoCs, do not error out if the error interrupt is missing. Signed-off-by: Cosmin Tanislav --- V2: * pick up Fab's Reviewed-by drivers/dma/sh/rz-dmac.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 38137e8d80b9..20a5c1766a58 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -954,16 +954,15 @@ static int rz_dmac_probe(struct platform_device *pdev) } =20 /* Register interrupt handler for error */ - irq =3D platform_get_irq_byname(pdev, irqname); - if (irq < 0) - return irq; - - ret =3D devm_request_irq(&pdev->dev, irq, rz_dmac_irq_handler, 0, - irqname, NULL); - if (ret) { - dev_err(&pdev->dev, "failed to request IRQ %u (%d)\n", - irq, ret); - return ret; + irq =3D platform_get_irq_byname_optional(pdev, irqname); + if (irq > 0) { + ret =3D devm_request_irq(&pdev->dev, irq, rz_dmac_irq_handler, 0, + irqname, NULL); + if (ret) { + dev_err(&pdev->dev, "failed to request IRQ %u (%d)\n", + irq, ret); + return ret; + } } =20 /* Initialize the channels. */ --=20 2.52.0 From nobody Mon Dec 1 21:31:56 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B17792EC09F; Mon, 1 Dec 2025 11:50:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589814; cv=none; b=YP+EVYI6yCtccKP9H5hy8PeGxHm67cRrwgAPs2zk8rfH5VLFPWt+8fVl8cTV9gdFH2shHifVo/yKCftTCVDwukPTlsu0pZ6Z7b2X8WV7yZSaAFwcPQzIuqwZR5WKuMMOOxpmuOw/jR/FmiGzMsWepP9cehQN7iRvr5oKOEWD6so= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589814; c=relaxed/simple; bh=If5hnNNIs45TLrR10ZXCO1ZIeXFqBLjVtJ6yi6O56wM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VfjlSRnAtAcMuG5ba6YrsLX5U6IUjb31r7MxggyCUuXpxEXSzMd2hCGuh4lRdd+x/fjO49176x3qELeJ4KrL9pe7FeT8xBU/MyK5hLnnLENxJN1FaHPT0cQ3d13+a5Hl6LdHx07Vk2JF5vcLeJRV2kYaL+rrfTZALH/E4kCVzMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: c1vkYOkZRo+8/B1F0TfJ8Q== X-CSE-MsgGUID: QMTyaJEKTWO0yweQLAx3Rg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:11 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id B31D241F9E1E; Mon, 1 Dec 2025 20:50:06 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/6] dmaengine: sh: rz_dmac: make register_dma_req() chip-specific Date: Mon, 1 Dec 2025 13:49:06 +0200 Message-ID: <20251201114910.515178-3-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs use a completely different ICU unit compared to RZ/V2H, which requires a separate implementation. To prepare for adding support for these SoCs, add a chip-specific structure and put a pointer to the rzv2h_icu_register_dma_req() function in the .register_dma_req field of the chip-specific structure to allow for other implementations. Do the same for the default request value, RZV2H_ICU_DMAC_REQ_NO_DEFAULT. While at it, factor out the logic that calls .register_dma_req() or rz_dmac_set_dmars_register() into a separate function to remove some code duplication. Since the default values are different between the two, use -1 for designating that the default value should be used. Signed-off-by: Cosmin Tanislav --- V2: * add .dma_req_no_default field to the struct rz_dmac_info (to be able to use the different define for RZ/T2H ICU) * commonize rzv2h_icu_register_dma_req()/rz_dmac_set_dmars_register() calls into a separate function, rz_dmac_set_dma_req_no() drivers/dma/sh/rz-dmac.c | 68 +++++++++++++++++++++++----------------- 1 file changed, 39 insertions(+), 29 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 20a5c1766a58..f94be3f8e232 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -95,9 +95,16 @@ struct rz_dmac_icu { u8 dmac_index; }; =20 +struct rz_dmac_info { + void (*register_dma_req)(struct platform_device *icu_dev, u8 dmac_index, + u8 dmac_channel, u16 req_no); + u16 dma_req_no_default; +}; + struct rz_dmac { struct dma_device engine; struct rz_dmac_icu icu; + const struct rz_dmac_info *info; struct device *dev; struct reset_control *rstc; void __iomem *base; @@ -106,8 +113,6 @@ struct rz_dmac { unsigned int n_channels; struct rz_dmac_chan *channels; =20 - bool has_icu; - DECLARE_BITMAP(modules, 1024); }; =20 @@ -319,6 +324,19 @@ static void rz_dmac_set_dmars_register(struct rz_dmac = *dmac, int nr, u32 dmars) rz_dmac_ext_writel(dmac, dmars32, dmars_offset); } =20 +static void rz_dmac_set_dma_req_no(struct rz_dmac *dmac, unsigned int inde= x, + int req_no) +{ + if (req_no < 0) + req_no =3D dmac->info->dma_req_no_default; + + if (dmac->info->register_dma_req) + dmac->info->register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, + index, req_no); + else + rz_dmac_set_dmars_register(dmac, index, req_no); +} + static void rz_dmac_prepare_desc_for_memcpy(struct rz_dmac_chan *channel) { struct dma_chan *chan =3D &channel->vc.chan; @@ -336,13 +354,7 @@ static void rz_dmac_prepare_desc_for_memcpy(struct rz_= dmac_chan *channel) lmdesc->chext =3D 0; lmdesc->header =3D HEADER_LV; =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, - RZV2H_ICU_DMAC_REQ_NO_DEFAULT); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, 0); - } + rz_dmac_set_dma_req_no(dmac, channel->index, -1); =20 channel->chcfg =3D chcfg; channel->chctrl =3D CHCTRL_STG | CHCTRL_SETEN; @@ -393,12 +405,7 @@ static void rz_dmac_prepare_descs_for_slave_sg(struct = rz_dmac_chan *channel) =20 channel->lmdesc.tail =3D lmdesc; =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, channel->mid_rid); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, channel->mid_rid); - } + rz_dmac_set_dma_req_no(dmac, channel->index, channel->mid_rid); =20 channel->chctrl =3D CHCTRL_SETEN; } @@ -671,13 +678,7 @@ static void rz_dmac_device_synchronize(struct dma_chan= *chan) if (ret < 0) dev_warn(dmac->dev, "DMA Timeout"); =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, - RZV2H_ICU_DMAC_REQ_NO_DEFAULT); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, 0); - } + rz_dmac_set_dma_req_no(dmac, channel->index, -1); } =20 /* @@ -868,14 +869,13 @@ static int rz_dmac_parse_of_icu(struct device *dev, s= truct rz_dmac *dmac) uint32_t dmac_index; int ret; =20 - ret =3D of_parse_phandle_with_fixed_args(np, "renesas,icu", 1, 0, &args); - if (ret =3D=3D -ENOENT) + if (!dmac->info->register_dma_req) return 0; + + ret =3D of_parse_phandle_with_fixed_args(np, "renesas,icu", 1, 0, &args); if (ret) return ret; =20 - dmac->has_icu =3D true; - dmac->icu.pdev =3D of_find_device_by_node(args.np); of_node_put(args.np); if (!dmac->icu.pdev) { @@ -930,6 +930,7 @@ static int rz_dmac_probe(struct platform_device *pdev) if (!dmac) return -ENOMEM; =20 + dmac->info =3D device_get_match_data(&pdev->dev); dmac->dev =3D &pdev->dev; platform_set_drvdata(pdev, dmac); =20 @@ -947,7 +948,7 @@ static int rz_dmac_probe(struct platform_device *pdev) if (IS_ERR(dmac->base)) return PTR_ERR(dmac->base); =20 - if (!dmac->has_icu) { + if (!dmac->info->register_dma_req) { dmac->ext_base =3D devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(dmac->ext_base)) return PTR_ERR(dmac->ext_base); @@ -1067,9 +1068,18 @@ static void rz_dmac_remove(struct platform_device *p= dev) pm_runtime_disable(&pdev->dev); } =20 +static const struct rz_dmac_info rz_dmac_v2h_info =3D { + .register_dma_req =3D rzv2h_icu_register_dma_req, + .dma_req_no_default =3D RZV2H_ICU_DMAC_REQ_NO_DEFAULT, +}; + +static const struct rz_dmac_info rz_dmac_common_info =3D { + .dma_req_no_default =3D 0, +}; + static const struct of_device_id of_rz_dmac_match[] =3D { - { .compatible =3D "renesas,r9a09g057-dmac", }, - { .compatible =3D "renesas,rz-dmac", }, + { .compatible =3D "renesas,r9a09g057-dmac", .data =3D &rz_dmac_v2h_info }, + { .compatible =3D "renesas,rz-dmac", .data =3D &rz_dmac_common_info }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, of_rz_dmac_match); --=20 2.52.0 From nobody Mon Dec 1 21:31:56 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8031D2ECE85; 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dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: OMUBVpxqRHGKZh2/J8UOCQ== X-CSE-MsgGUID: kSXfcrezSlGiQG91NrvNMg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:17 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 894BB41FA260; Mon, 1 Dec 2025 20:50:12 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 3/6] dt-bindings: dma: renesas,rz-dmac: document RZ/{T2H,N2H} Date: Mon, 1 Dec 2025 13:49:07 +0200 Message-ID: <20251201114910.515178-4-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have three DMAC instances. Compared to the previously supported RZ/V2H, these SoCs are missing the error interrupt line and the reset lines, and they use a different ICU IP. Document them, and use RZ/T2H as a fallback for RZ/N2H as the DMACs are entirely compatible. Signed-off-by: Cosmin Tanislav --- V2: * pick up Fab's Reviewed-by .../bindings/dma/renesas,rz-dmac.yaml | 100 ++++++++++++++---- 1 file changed, 82 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/D= ocumentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index f891cfcc48c7..f7bcdb4a29ca 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -28,6 +28,13 @@ properties: =20 - const: renesas,r9a09g057-dmac # RZ/V2H(P) =20 + - const: renesas,r9a09g077-dmac # RZ/T2H + + - items: + - enum: + - renesas,r9a09g087-dmac # RZ/N2H + - const: renesas,r9a09g077-dmac + reg: items: - description: Control and channel register block @@ -35,27 +42,12 @@ properties: minItems: 1 =20 interrupts: + minItems: 16 maxItems: 17 =20 interrupt-names: - items: - - const: error - - const: ch0 - - const: ch1 - - const: ch2 - - const: ch3 - - const: ch4 - - const: ch5 - - const: ch6 - - const: ch7 - - const: ch8 - - const: ch9 - - const: ch10 - - const: ch11 - - const: ch12 - - const: ch13 - - const: ch14 - - const: ch15 + minItems: 16 + maxItems: 17 =20 clocks: items: @@ -121,6 +113,35 @@ required: allOf: - $ref: dma-controller.yaml# =20 + - if: + properties: + compatible: + contains: + enum: + - renesas,rz-dmac + - renesas,r9a09g057-dmac + then: + properties: + interrupt-names: + items: + - const: error + - const: ch0 + - const: ch1 + - const: ch2 + - const: ch3 + - const: ch4 + - const: ch5 + - const: ch6 + - const: ch7 + - const: ch8 + - const: ch9 + - const: ch10 + - const: ch11 + - const: ch12 + - const: ch13 + - const: ch14 + - const: ch15 + - if: properties: compatible: @@ -188,6 +209,49 @@ allOf: - renesas,icu - resets =20 + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-dmac + then: + properties: + reg: + maxItems: 1 + clocks: + maxItems: 1 + + clock-names: false + resets: false + reset-names: false + + interrupts: + maxItems: 16 + + interrupt-names: + items: + - const: ch0 + - const: ch1 + - const: ch2 + - const: ch3 + - const: ch4 + - const: ch5 + - const: ch6 + - const: ch7 + - const: ch8 + - const: ch9 + - const: ch10 + - const: ch11 + - const: ch12 + - const: ch13 + - const: ch14 + - const: ch15 + + required: + - clocks + - power-domains + - renesas,icu + additionalProperties: false =20 examples: --=20 2.52.0 From nobody Mon Dec 1 21:31:56 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 37CC72EFD9B; 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dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: 77ZHTJs1Scyx6hgSnAMbeQ== X-CSE-MsgGUID: BG38dAjHTuKRsKMJRNBQpg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:22 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 3D07441F9E1E; Mon, 1 Dec 2025 20:50:17 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 4/6] dmaengine: sh: rz_dmac: add RZ/{T2H,N2H} support Date: Mon, 1 Dec 2025 13:49:08 +0200 Message-ID: <20251201114910.515178-5-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs use a completely different ICU unit compared to RZ/V2H, which requires a separate implementation. Add support for them. RZ/N2H will use RZ/T2H as a fallback. Signed-off-by: Cosmin Tanislav --- V2: * pick up Fab's Reviewed-by drivers/dma/sh/rz-dmac.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index f94be3f8e232..c0c23c39a626 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1073,12 +1074,18 @@ static const struct rz_dmac_info rz_dmac_v2h_info = =3D { .dma_req_no_default =3D RZV2H_ICU_DMAC_REQ_NO_DEFAULT, }; =20 +static const struct rz_dmac_info rz_dmac_t2h_info =3D { + .register_dma_req =3D rzt2h_icu_register_dma_req, + .dma_req_no_default =3D RZT2H_ICU_DMAC_REQ_NO_DEFAULT, +}; + static const struct rz_dmac_info rz_dmac_common_info =3D { .dma_req_no_default =3D 0, }; =20 static const struct of_device_id of_rz_dmac_match[] =3D { { .compatible =3D "renesas,r9a09g057-dmac", .data =3D &rz_dmac_v2h_info }, + { .compatible =3D "renesas,r9a09g077-dmac", .data =3D &rz_dmac_t2h_info }, { .compatible =3D "renesas,rz-dmac", .data =3D &rz_dmac_common_info }, { /* Sentinel */ } }; --=20 2.52.0 From nobody Mon Dec 1 21:31:56 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C767E2EC090; Mon, 1 Dec 2025 11:50:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589832; cv=none; b=LxmJysHOHo9Q7Vy6z8BBMbUZ1smkDZJc1lkYnEEciAkwqrTx3d+GHkGu+yOko2MnYc24CdIfabo7AcgyPQroVpkK55ppPRNqV8bd5ro5D2ozTGMzZOBalr5nSxUR/S+waHYwkQmyriAxFiBiCigJeTqnbvZk8/8M7iSrzjksPME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589832; c=relaxed/simple; bh=vRxJwFcDzUf2HlLjmMzxLbO0GlkYzUeR6Yd8tjAVSd0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bxzuSArbHDZDL8vYurD6AlJvIgyX3loVV/ciww7Cn36NKt0AXrDRUxaiU5qDmShs0vg6uV2YvH1DjP7JBYqsAE36r1MBn6etIqKCy9X0ejZXXxsQAdfSYGkWsugzkOgIQxSslu5kBkHoPAqj5QNDEnjktx0Wve8bhQQGIjVRe44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: B+9tSAnfRteEoVu5vanZ1A== X-CSE-MsgGUID: lf8hMcwCQ+GJjI766vfPDw== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:28 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id D0E0741F9E1E; Mon, 1 Dec 2025 20:50:23 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g077: add DMAC support Date: Mon, 1 Dec 2025 13:49:09 +0200 Message-ID: <20251201114910.515178-6-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) SoC has three instances of the DMAC IP. Add support for them. Signed-off-by: Cosmin Tanislav --- V2: * pick up Fab's Reviewed-by arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index 6812af127684..ee11efb68638 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -376,6 +376,96 @@ i2c2: i2c@81008000 { status =3D "disabled"; }; =20 + dmac0: dma-controller@800c0000 { + compatible =3D "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c0000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 0>; + }; + + dmac1: dma-controller@800c1000 { + compatible =3D "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c1000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 1>; + }; + + dmac2: dma-controller@800c2000 { + compatible =3D "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c2000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G077_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 2>; + }; + gmac0: ethernet@80100000 { compatible =3D "renesas,r9a09g077-gbeth", "snps,dwmac-5.20"; reg =3D <0 0x80100000 0 0x10000>; --=20 2.52.0 From nobody Mon Dec 1 21:31:56 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D5CE12ECD28; Mon, 1 Dec 2025 11:50:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589836; cv=none; b=rC3ycyMsDjLZsVgPZnefjAocTpdt/2WTGSs8H74tE8k8apROcKLUdx/WkvD9waeS4sR1kdLZP3rNVCFTMZTJ41BMP4KGpPKl4ovL3wvY3hquRiCo9og1bEPP5cEPsI+9pjJLrBi1q+l4N+AcEQuotvdaJ6ai5t5QvoSpfbJt0nQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764589836; c=relaxed/simple; bh=AwyOcMv87etOKVfQMyLHbCVxytfi7WUu67I2+NOG5xw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=faa502eOL3qRs47ozvKBr9LnIgeF8gKKxov2ZciWQTPhCHC6SFBgCXAt5vLlBXzkcn1EnNJBZHE6aMyTZaFI4CN9ug/g4o7saWirFixnDsAjnL57iJA3qFoJvwAgRH7KEZt2jwCOgQLVpRqnKtuiZ3iNYk0lgKUfhHpUhTIzY5U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: KB9l88vsRaSIy5UD6HvClg== X-CSE-MsgGUID: 89MMhAoFQz6PePy3pqS0OQ== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 01 Dec 2025 20:50:34 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id A189741FA260; Mon, 1 Dec 2025 20:50:29 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 6/6] arm64: dts: renesas: r9a09g087: add DMAC support Date: Mon, 1 Dec 2025 13:49:10 +0200 Message-ID: <20251201114910.515178-7-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201114910.515178-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/N2H (R9A09G087) SoC has three instances of the DMAC IP. Add support for them. Signed-off-by: Cosmin Tanislav --- V2: * pick up Fab's Reviewed-by arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g087.dtsi index 19475c72017f..7b1f2c1c9e85 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -376,6 +376,96 @@ i2c2: i2c@81008000 { status =3D "disabled"; }; =20 + dmac0: dma-controller@800c0000 { + compatible =3D "renesas,r9a09g087-dmac", "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c0000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 0>; + }; + + dmac1: dma-controller@800c1000 { + compatible =3D "renesas,r9a09g087-dmac", "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c1000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 1>; + }; + + dmac2: dma-controller@800c2000 { + compatible =3D "renesas,r9a09g087-dmac", "renesas,r9a09g077-dmac"; + reg =3D <0 0x800c2000 0 0x1000>; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKH>; + power-domains =3D <&cpg>; + #dma-cells =3D <1>; + dma-channels =3D <16>; + renesas,icu =3D <&icu 2>; + }; + gmac0: ethernet@80100000 { compatible =3D "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth", "snps,dwmac-5.20"; --=20 2.52.0