From nobody Mon Dec 1 22:05:34 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BEC3D25A2B4; Mon, 1 Dec 2025 11:30:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764588640; cv=none; b=SNhG5aQAMFwCy+axkpbL54DUHnrYNvvFHGyvGUMas9VYGGKp1P0DQWqbhqLhgH7R8cXNVct9ZPQnJwuZqnc6xV1Hj17QnljbQxPpIhSmnmMXVVSj0IfePMykYlWuIr8YKMln7MY7hJ11DU4KK4vTtWedTSlg5exgPqLNAl7PfcA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764588640; c=relaxed/simple; bh=X/Mx2w+IbAQkSLaka70txr2uyrIrdWgpWbgD08a2cCU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OQ6epMG/ZPG3xk6g8Xh6xQ0L3sq9cqMsQ5EJpAuGYosKvhpBs29aVpa1jPHYbG2CRl3M85TSQ/ew+JI5LrqwQs/fDArwF8gJ/IAdHjtmO6SkTAdImsnompsfHMMNp3fry9hcYqcyaTsKSXPiGTqnQjo3DXMNTgWDSw5SwlxORG4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: j0LTLnaRTfikQ7Q9lvO5vw== X-CSE-MsgGUID: uPPw9+fITcGiSOmGVUVqyA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 01 Dec 2025 20:30:37 +0900 Received: from demon-pc.localdomain (unknown [10.226.93.83]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 87E7341F1B9F; Mon, 1 Dec 2025 20:30:34 +0900 (JST) From: Cosmin Tanislav To: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v2 4/4] arm64: dts: renesas: r9a09g087: add ICU support Date: Mon, 1 Dec 2025 13:29:33 +0200 Message-ID: <20251201112933.488801-5-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251201112933.488801-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251201112933.488801-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/N2H (R9A09G087) SoC has an Interrupt Controller (ICU) block that routes external interrupts to the GIC's SPIs, with the ability of level-translation, and can also produce software and aggregate error interrupts. Add support for it. Signed-off-by: Cosmin Tanislav --- V2: * no changes arch/arm64/boot/dts/renesas/r9a09g087.dtsi | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g087.dtsi index f9f49bd3e8b0..6b5693e5c1f9 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g087.dtsi @@ -865,6 +865,79 @@ cpg: clock-controller@80280000 { #power-domain-cells =3D <0>; }; =20 + icu: interrupt-controller@802a0000 { + compatible =3D "renesas,r9a09g087-icu", "renesas,r9a09g077-icu"; + reg =3D <0 0x802a0000 0 0x10000>, + <0 0x812a0000 0 0x50>; + #interrupt-cells =3D <2>; + #address-cells =3D <0>; + interrupt-controller; + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "intcpu0", "intcpu1", "intcpu2", + "intcpu3", "intcpu4", "intcpu5", + "intcpu6", "intcpu7", "intcpu8", + "intcpu9", "intcpu10", "intcpu11", + "intcpu12", "intcpu13", "intcpu14", + "intcpu15", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "irq8", "irq9", "irq10", "irq11", + "irq12", "irq13", "irq14", "irq15", + "sei", + "ca55-err0", "ca55-err1", + "cr520-err0", "cr520-err1", + "cr521-err0", "cr521-err1", + "peri-err0", "peri-err1", + "dsmif-err0", "dsmif-err1", + "encif-err0", "encif-err1"; + clocks =3D <&cpg CPG_CORE R9A09G087_CLK_PCLKM>; + power-domains =3D <&cpg>; + }; + pinctrl: pinctrl@802c0000 { compatible =3D "renesas,r9a09g087-pinctrl"; reg =3D <0 0x802c0000 0 0x10000>, --=20 2.52.0