From nobody Mon Dec 1 22:05:11 2025 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FD1930E84A for ; Mon, 1 Dec 2025 12:19:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764591580; cv=none; b=FhYzagP4k+BClbu9e1YDzitgsFlbUl8Glnz+vRTmLRR1UJdFZfk8MiP+SgZfMqgZSlVj1WkOxuv/KMwv6UiSuzmVT+A92CfjILex1LwIULmrMMJw8N34T6TeQZbEGe9ksxPgf7S0s33pHGEAJvyVJQrliEVrmod88gtZJhCsSvw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764591580; c=relaxed/simple; bh=L1FSsg0Qh6Izmf4vGGUqKbG48MvEYOAEvR+4KJGxUuI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ItICYNoLFxCR6OCyomS5+bSvkYLJrltD1CYcaAPUT+ru4xRyB6IByJJvwrZvqGZGxQluayitU5vH+6PLAWYtcnIx+Gm4piXHqpWphpaTJE3SRjHQbhwdxUSHcr/OQsD+QTMnXT3TapqeUNjG/b4Tt7rbboxcw7tjVkDuGOxIpaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=hDa4Za0s; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="hDa4Za0s" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 6E9561F06; Mon, 1 Dec 2025 13:17:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1764591435; bh=L1FSsg0Qh6Izmf4vGGUqKbG48MvEYOAEvR+4KJGxUuI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hDa4Za0sW5Oo7XHFNupAV4PRc1Nt3gz8rkNRYzCipCzmK9Spwgf+sHcBZN33VZWFm ue3oEbiI0Y1bOQwmJoAHrxDRpDpEmhvlLbttJ6uhsG8b3TtVtC8kADdgzBBtWeyB+m yY3iVoFec7XJQLrd3Ld0juK32m8VNMwcM3iQ1YRU= From: Tomi Valkeinen Date: Mon, 01 Dec 2025 14:18:51 +0200 Subject: [PATCH v7 09/11] drm: xlnx: zynqmp: Add support for Y8 and Y10_P32 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251201-xilinx-formats-v7-9-1e1558adfefc@ideasonboard.com> References: <20251201-xilinx-formats-v7-0-1e1558adfefc@ideasonboard.com> In-Reply-To: <20251201-xilinx-formats-v7-0-1e1558adfefc@ideasonboard.com> To: Vishal Sagar , Anatoliy Klymenko , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Laurent Pinchart , Michal Simek Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven , Dmitry Baryshkov , Pekka Paalanen , Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2007; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=L1FSsg0Qh6Izmf4vGGUqKbG48MvEYOAEvR+4KJGxUuI=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBpLYfFIqEgs4lbSgiKpq5FRbRJAzhzSWQ/j6qGC jjdjCvPduaJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaS2HxQAKCRD6PaqMvJYe 9fbKD/9Tsg0ErQBoTlrY4x2PU0Sj9mgyinbQx0UA4azdeiRfgPieTK3wwRtXvLOGsRCib/RONoP Dp6JgoIwa593CLxWBSJzfEyzvARseCPXqYDQSqyrejEdVD5+GpiQIEOkPu3OjAKkJ917CknJaPs dfzswwEV/9ueE3TtkafujVXD/RgQkJAjkJ5nf4RJ7C4YhiPiIPK84kvWX7ZORFjHo/KTCq+sMmI USBjpbfZJn+XFIczwKPbVtoCGe1Qh5OjxMBE1ge5Czwa0NH8cObca96rDWkAHi8WPO5Mpgjto4Q Q3vraT3OTWCSLiHGVIxq41NzU9BRjBq2hG5LICluWtHw5r9qh2Vsd3Pud/PR+gb6rCiFEZzVsBE G91wHIngOKNgZjyVLbk6vpvDdn2MOi1atQOBjWLS3OnwfKYbGyQoEzuh71GVG5tvTKCmbrRmdsH XCg80x/je0VPDPpdieQuqyR4/z0BuKPSMD4mEW+S1dWB9twX1O5Qfc5Ewf+bEnzDw57C+x0Kq8l HktEao+p3IV5hR3IgGAyfR5O0ardTL9dr4YEhtOyMyA8JCBU2OKWOExDu+qFVc3ijXMEcdZDPIg h4M7SteiJ6Mf7XZzHH1bKngMuYaRmXlvWdimCitGcVhfG3Eq1bImW86rms8k6Ayg9ZUC9HsHAJR +0we/uJW10GHkuQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Add support for Y8 and Y10_P32 formats. We also need to add new csc matrices for the y-only formats. Reviewed-by: Vishal Sagar Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/xlnx/zynqmp_disp.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynq= mp_disp.c index 1dc77f2e4262..fe111fa8cc13 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c @@ -307,6 +307,16 @@ static const struct zynqmp_disp_format avbuf_vid_fmts[= ] =3D { .buf_fmt =3D ZYNQMP_DISP_AV_BUF_FMT_NL_VID_YV16CI_10, .swap =3D false, .sf =3D scaling_factors_101010, + }, { + .drm_fmt =3D DRM_FORMAT_Y8, + .buf_fmt =3D ZYNQMP_DISP_AV_BUF_FMT_NL_VID_MONO, + .swap =3D false, + .sf =3D scaling_factors_888, + }, { + .drm_fmt =3D DRM_FORMAT_Y10_P32, + .buf_fmt =3D ZYNQMP_DISP_AV_BUF_FMT_NL_VID_YONLY_10, + .swap =3D false, + .sf =3D scaling_factors_101010, }, }; =20 @@ -697,6 +707,16 @@ static const u32 csc_sdtv_to_rgb_offsets[] =3D { 0x0, 0x1800, 0x1800 }; =20 +static const u16 csc_sdtv_to_rgb_yonly_matrix[] =3D { + 0x0, 0x0, 0x1000, + 0x0, 0x0, 0x1000, + 0x0, 0x0, 0x1000, +}; + +static const u32 csc_sdtv_to_rgb_yonly_offsets[] =3D { + 0x0, 0x0, 0x0 +}; + /** * zynqmp_disp_blend_set_output_format - Set the output format of the blen= der * @disp: Display controller @@ -846,7 +866,11 @@ static void zynqmp_disp_blend_layer_enable(struct zynq= mp_disp *disp, ZYNQMP_DISP_V_BLEND_LAYER_CONTROL(layer->id), val); =20 - if (layer->drm_fmt->is_yuv) { + if (layer->drm_fmt->format =3D=3D DRM_FORMAT_Y8 || + layer->drm_fmt->format =3D=3D DRM_FORMAT_Y10_P32) { + coeffs =3D csc_sdtv_to_rgb_yonly_matrix; + offsets =3D csc_sdtv_to_rgb_yonly_offsets; + } else if (layer->drm_fmt->is_yuv) { coeffs =3D csc_sdtv_to_rgb_matrix; offsets =3D csc_sdtv_to_rgb_offsets; } else { --=20 2.43.0