From nobody Mon Dec 1 21:30:48 2025 Received: from BYAPR05CU005.outbound.protection.outlook.com (mail-westusazon11010006.outbound.protection.outlook.com [52.101.85.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E6F43074BE; Mon, 1 Dec 2025 11:09:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.85.6 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587359; cv=fail; b=upNeOy5Z2ST+24rCIrXIdP2fkTMtcLAE3pxiK7pho2zcpTiQ+wp7SqtEfllSQFpbOEDNg/f0dqh0LNyIk1jnbwjAD89r7IIShEBjFQWYy4G8WlLe5aVGoYPqja2eZzr8Wl/6na8GeD/2EKlzikLcplpF91aEcfTNPKz84VaguWQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587359; c=relaxed/simple; bh=WNO0Wy5K5wTMtZyFMxcPyYSImLbwFKtO7i9+gf4yqe8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=rKCty3wjr67pYQjC0NHIiKdylXy46vDL0vvRhOcz3+jpS0GDjF37jM1R4DJwA5GUo5+ymSf5svRnJnb7xCq3wRGTcle3MVw1B+/jwRADFdN5NKHYWNCDNzx9Udg3QOrzmovSAhFk4dAPjt8tcyKYEpS3KwDCu2e3oGfOYNJp9NE= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=XYs1fVkb; arc=fail smtp.client-ip=52.101.85.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="XYs1fVkb" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=f7RWsQxeHLhGnS4HZ0qv+9cGFU5YvcoDxkherJYyN1ZMD6k7Ufqg0uxDsDeIBnxnzbuU1zIC6cVdAvh2auqFCSIbdGEoOoBksRuSaEK+F5446rAMhA+XTQN/oNdLLQunk/ldXAWiG7QiMCjAzbI/om/Ma1iRrqwZHhYQLH2Jz+45O/kHXl1iT71V0uGaDJ/4nkOkKXDzHCRc7i4Qi6pLG+ixpi0JbxXccJAuSUcNaMYMbdBZXwpUULPnY6O/Rtu56JAcWDIv/Fpaz3R+WTRQnYQzjaTA6CgSc3bVr60ZXn0JhoGIGGhKNMj2yuj5rbc7Cc/1BKrO8ourY2m0vLk7JQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vyIWtr2z8j8UuD8E45E2bJfKHtju77iqpFw2K2Xzfvc=; b=E6QUbMVhRjLIuO016vzH8TZ8c9t0Lw6N1QO/SEXrAbaKEn2xXhaS0acNZRf7Pq+2THE/+fAyVRTiORKBavGjr/yHUBzx/1Y5EhRvIYH9/vwf4UiKwuRg7ZKtQYN0jpzeorOIPO3T4IQyfk4P1ZDPy7KvqGvSQtJisWRMpuVLQZWxHBbiXsuGesirP23J/M8YTxqxTpMDSYT4SNNpc09RROl1HndKTYPq0k76o2yLYv/n7Z272ZUteS5y7vQbkpO5xSrlLtpDvbwDo0f1uIvlZjXFOXqdffb2+iyLK2OHVSNQWywmWsK9bT5cu7Q6/toFqd8MQprTCBpM4hZDa59eow== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vyIWtr2z8j8UuD8E45E2bJfKHtju77iqpFw2K2Xzfvc=; b=XYs1fVkbdPceJYocuNwBQaQCesM5x0KQ40NT30fV5Nzduj4Hj2TBbtVe7AD6zJaU4yRz16BwXrZQpWExTeeGYzIIYngY7FRfKPNObqIHlF55YBtLTrqeHWt85zU5/dvz37djkZm0mjwCAmPjoHPKqHza+eegx1c24tK2WzvzPiU= Received: from MN2PR20CA0024.namprd20.prod.outlook.com (2603:10b6:208:e8::37) by CH2PR12MB4101.namprd12.prod.outlook.com (2603:10b6:610:a8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9366.17; Mon, 1 Dec 2025 11:09:13 +0000 Received: from MN1PEPF0000F0E4.namprd04.prod.outlook.com (2603:10b6:208:e8:cafe::2f) by MN2PR20CA0024.outlook.office365.com (2603:10b6:208:e8::37) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9366.17 via Frontend Transport; Mon, 1 Dec 2025 11:09:11 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E4.mail.protection.outlook.com (10.167.242.42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Mon, 1 Dec 2025 11:09:12 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 1 Dec 2025 05:09:08 -0600 From: "Yo-Jung Leo Lin (AMD)" Date: Mon, 1 Dec 2025 19:08:09 +0800 Subject: [PATCH v4 1/5] drm/amdgpu: parse UMA size-getting/setting bits in ATCS mask Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251201-vram-carveout-tuning-for-upstream-v4-1-9e151363b5ab@amd.com> References: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> In-Reply-To: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet CC: , , , , "Tsao, Anson" , "Mario Limonciello (AMD) (kernel.org)" , "Yo-Jung Leo Lin (AMD)" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2520; i=Leo.Lin@amd.com; h=from:subject:message-id; bh=WNO0Wy5K5wTMtZyFMxcPyYSImLbwFKtO7i9+gf4yqe8=; b=owEBbQKS/ZANAwAKAV8XsZZKKe6GAcsmYgBpLXdOVTGFW1JI0fjoasxRDNMzevDURAuIkp0Jo 54Q97HXYeCJAjMEAAEKAB0WIQQzqV4kW+yguuqHrw5fF7GWSinuhgUCaS13TgAKCRBfF7GWSinu huWgD/4kG7qHmYZLjlyAQgWtGJtg/wLufGo+zXuZE1xub1B89Jv48EsJbbg83nlyrNV6yFl+Uwj I227I0jJPN6g897v19+Axlhyish5kJI9Mc8vt0irz9nqthomou8VQXyrF9A3NBsT0KgIsuGvVHz IBOp/BSWNG5HcJp1GjIVK7Zd/ImeTk2uOQ6sWt4vEIruugScXpS78cVqefDmcXfY998ZvIUDLp+ Jwgj8Nr5xLWuz0iTpULUeBRg1B6zGjPh51/qx/csk5qp6IwfCJ8wnNJwuyydrmh//QQXQNX6SjB uqK1es7EdLMbHqYja/slw1mulNY4vrm+FUnlSJWbF3imc6i5YYAI4O6hv2TZLc6b5ObPHQnJDze 936ghsyfrJYPHKncnqxmZrvUfH+G/Yz8NSHH/OUDvpI/4T1IpzaUlYSA9xqGyN83Cu6ldXbyhKp UHFWOgtkAKbMLOAl9ALmQpcB8Zw+xRjpM/wpT8JhcOSfGLBZH5F2ZJsCAzMzFRlsz9fqHk1YShZ uIw4Ln8dkW+XCSt21d979PbUMvujB+Y5DviqoqQeQvGpMG214IzC9/F6NYi+fHJ3ssaiIWPyStH sKPUWRQE/hOoFcAfF0BO+uL3v7boZKgQPzDUmuO0QLnGD4X2BjqJt/q+q6ag8bBad4AEf6sVgn8 osubztp7TKtzKiA== X-Developer-Key: i=Leo.Lin@amd.com; a=openpgp; fpr=33A95E245BECA0BAEA87AF0E5F17B1964A29EE86 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E4:EE_|CH2PR12MB4101:EE_ X-MS-Office365-Filtering-Correlation-Id: c9c732c5-e5a4-442b-8276-08de30ca0ee2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?B?bVFlYnN2dE01QVdidU01NS9yczhEKzZqTW9NSTQrOGoxeTBHWDRJcTNRZmVz?= =?utf-8?B?ZHorelozTnpLTzVmTFFObXVLNk1xcnpyakJMbWtCNG5mS1F3V2JuMGl6NC9E?= =?utf-8?B?azJ3OVlwQ2gyZnBzcDRDTnFjdVhNMjdxbWg1UVpzMGllSTBSZ1FpSWZwUTIz?= =?utf-8?B?NGxhM3FmdDc4Si90OW04U1l1ZFU1cWFlRGEzSXNvVThnMEpNei8yaFZ1cmhM?= =?utf-8?B?U2pMSDNpMERGTlQvcXY4aDJXZHdYUno4MC84bDRaeXNISE90eWk2MXUvSnE5?= =?utf-8?B?OG1VVUFuZTZDN05UY09NZ0VOQnJRV01NNkliL1E0VDYvZ1VZMGZPRVNOWENn?= =?utf-8?B?NTlVcjlpb280bjNZc2VqM0ZLeWxUKzZLaTdoaTMwZUlhbVZjMGROMjRIN0pR?= =?utf-8?B?YnJBUUdYajJlTWdadzd6TTJYb2JHemEya2Z1dUloTEJ1cGVDcXF5b0trUDFv?= =?utf-8?B?VncySEdzU1dqcC9NanF0ZzgzMFAxbjE0ZzM4eE1nRFQxQWk3QkdCRUJrTFk3?= =?utf-8?B?OEoyYkNJNCs0YlpHaWlDdzJDeFZIcGxvRnhWY2c5cmtXQmNVc1h5RlNOcGZp?= =?utf-8?B?ZkwzSFBha200MWN4U1lxL0JIejhReU1lVnlPQjR6dmo0ZW0zU0Z4amlWb2lt?= =?utf-8?B?NzVKZGkzUFRLUXZCbG5VUEt2NkhDSHYyNkV6a21ldnJ3dGFnbHVjMjZvZFNr?= =?utf-8?B?VmtmanN3MFlwMXMybXR6YTZvZW5lNzlkQlgrR3ltdjlwdUx2THRSMmNhQmxO?= =?utf-8?B?ZSsvUzRXTVN4cWUxRHoyZERXS29CYTI0S0Zvbmp5Vk16NTdFVWZia1BMblhq?= =?utf-8?B?NzMyM1BkdzVDaC9TU1Z3NDZzVWJrdUl0MDRwZ01uWDBQYnN2UndXMDEzc3dQ?= =?utf-8?B?ZVIrOXlIU21BZmxCZWszTTdHZ21LUTk4MkNnanprKytrd1MzbDYxZmsybSto?= =?utf-8?B?SnhLNFB1Q0dNVjQxK2tKM1p5Y3UvVVhoMnk0TUwwNE1kODhsZlRKWWY0Tm5o?= =?utf-8?B?TXR2UXpHSGRCeGM2eHIyZmU0Qi9XS1YrR09ZWDVvNVZxaTU0WDFHWDBNZTQ4?= =?utf-8?B?cnBxTnM2QlhxZ3EvaUZrWVpqR21EYTM4bVFYQUZlRGFzdHQycTVNSkloMTJU?= =?utf-8?B?dVJ6dUFrUHZRQ1pQaWx5QmZYZHFiblRkRE94N25TWDFQYkw3ZVc2WHJ1OXJW?= =?utf-8?B?emdhNFRvU0h5c0JZdTZFN01sSDQ4bVFONEpzV1o3N2x0Q2doTVowTDdjNHMv?= =?utf-8?B?c0RHWWRZS0VEakJzQmdHVlZVaUZ6RFE2aVdDQ1Q3aWhRckhoMi93c1p5bXpl?= =?utf-8?B?MWU4dzlrUGFXY0M1Y2JLelFjRnpSRjZqRXQ4U2ZjTm9nQlE1dVVncnV4WjR2?= =?utf-8?B?eldyWEMrOFBjdjdJeDNvSWRZNXhlOVFPVElVWnFnL0dKV3VsUkZYT0VCa01H?= =?utf-8?B?Y2lyU3FCZ0dSdEY5QjZ5OUhCMVkzdUFSdVNKUmhWWnNiQzNpQzVKL2p1dnU0?= =?utf-8?B?YlhGTXRidkM4UmRkTHhGb0wwYWVHcWdmbm5pSWlTUmV0djVTL1dOejN1QlYw?= =?utf-8?B?bEdpdWxZNmVIcUtsR0IxOWczUTVsQUhtZkdNMU9PTldCbmpBK1NMbXliaXBv?= =?utf-8?B?bVZic1Y3V2t0cGJOdUk1NTZ0R2VlM0x5OVIveUh0YUkwVkpuc1FoTFEvZzJQ?= =?utf-8?B?U1lWVytKd2RzcDNUV2laRWNibHNYUTRua3pKZ1dvcHptMXhDeTNVTGw2YXdV?= =?utf-8?B?b3lrekhNRUxLT2dmNzkvSG16NzRRYW9DWllHSkZiWEJZbndHY1dJR1FPMWpW?= =?utf-8?B?a2ZIamhNV3FpVlJCSmUxNlloSmhkQ1ljWjhZbnB3RG1wdk4rMVBJRlV1QzRy?= =?utf-8?B?VmcxSW9kbVpLelRXUEZNM1VRQkR2MHljZ3YrSVB1S0xJSGthWE45YXlHSWNW?= =?utf-8?B?QmpDSFRCTnVLYXVpR1JKQ3RNY0QvZkxPRlJWRHM5ZzVXRnFDYmtEYXRpclE1?= =?utf-8?B?OUlzVWFGNTdZM0pOMnZ6RkVXbzluNmZMaGNWOGdDTmhLOHZua3RkSHF4NlBC?= =?utf-8?B?aWZPWVdMMmF2eElGUHdkM1o2TlJ3M0x1ZEIxTFhEUlNHMmZYWjRLVVltdVJu?= =?utf-8?Q?JxGo=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(376014)(1800799024)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2025 11:09:12.4008 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c9c732c5-e5a4-442b-8276-08de30ca0ee2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4101 The capabilities of getting and setting VRAM carveout size are exposed in the ATCS mask. Parse and store these capabilities for future use. Co-developed-by: Mario Limonciello (AMD) Signed-off-by: Mario Limonciello (AMD) Reviewed-by: Alex Deucher Signed-off-by: Yo-Jung Leo Lin (AMD) --- drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 ++++ drivers/gpu/drm/amd/include/amd_acpi.h | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_acpi.c index d31460a9e958..610449d73a6c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -116,7 +116,9 @@ struct amdgpu_atcs_functions { bool pcie_perf_req; bool pcie_dev_rdy; bool pcie_bus_width; + bool get_uma_size; bool power_shift_control; + bool set_uma_allocation_size; }; =20 struct amdgpu_atcs { @@ -587,7 +589,9 @@ static void amdgpu_atcs_parse_functions(struct amdgpu_a= tcs_functions *f, u32 mas f->pcie_perf_req =3D mask & ATCS_PCIE_PERFORMANCE_REQUEST_SUPPORTED; f->pcie_dev_rdy =3D mask & ATCS_PCIE_DEVICE_READY_NOTIFICATION_SUPPORTED; f->pcie_bus_width =3D mask & ATCS_SET_PCIE_BUS_WIDTH_SUPPORTED; + f->get_uma_size =3D mask & ACPI_ATCS_GET_UMA_SIZE_SUPPORTED; f->power_shift_control =3D mask & ATCS_SET_POWER_SHIFT_CONTROL_SUPPORTED; + f->set_uma_allocation_size =3D mask & ACPI_ATCS_SET_UMA_ALLOCATION_SIZE_S= UPPORTED; } =20 /** diff --git a/drivers/gpu/drm/amd/include/amd_acpi.h b/drivers/gpu/drm/amd/i= nclude/amd_acpi.h index 06badbf0c5b9..e582339e8e8e 100644 --- a/drivers/gpu/drm/amd/include/amd_acpi.h +++ b/drivers/gpu/drm/amd/include/amd_acpi.h @@ -427,7 +427,9 @@ struct atcs_pwr_shift_input { # define ATCS_PCIE_PERFORMANCE_REQUEST_SUPPORTED (1 << 1) # define ATCS_PCIE_DEVICE_READY_NOTIFICATION_SUPPORTED (1 << 2) # define ATCS_SET_PCIE_BUS_WIDTH_SUPPORTED (1 << 3) -# define ATCS_SET_POWER_SHIFT_CONTROL_SUPPORTED (1 << 7) +# define ACPI_ATCS_GET_UMA_SIZE_SUPPORTED (1 << 5) +# define ATCS_SET_POWER_SHIFT_CONTROL_SUPPORTED (1 << 7) +# define ACPI_ATCS_SET_UMA_ALLOCATION_SIZE_SUPPORTED (1 << 9) #define ATCS_FUNCTION_GET_EXTERNAL_STATE 0x1 /* ARG0: ATCS_FUNCTION_GET_EXTERNAL_STATE * ARG1: none --=20 2.43.0 From nobody Mon Dec 1 21:30:48 2025 Received: from CH1PR05CU001.outbound.protection.outlook.com (mail-northcentralusazon11010020.outbound.protection.outlook.com [52.101.193.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96AF43081D6; Mon, 1 Dec 2025 11:09:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.193.20 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587365; cv=fail; b=efhpfnTwEjIc+H74uAdyRjKw/Yh5PZjnv4dou/sA7MjagM8L6UfrrnuNsDZzyKKB6knHXbVVqh4UuTaBhZTVXepK9Y1boRCJiXgBP1CFO4YDwutFrjKDohWeKBiBIFiU+YVnqYy1qcUlnXMGaz/SQnyANzECTb+I4DYQCnMmOXU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587365; c=relaxed/simple; bh=eA8BpgnmJjtHcwq/axi4BLexWKy79hpik/sofYeVprA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=PrJnqic89gqOtBrzRKeQsICC/3sC1UaNFpujPqqckMcn6E25R+s2bVCPQThEXqY52u3cFx+YL4kKzKTCy2njWPe2hbeo8xE2Fmjek+Tir7xpuikqyh2+UUyOC/n9Xhy9aFW4+wCBvF2GT76RJP6Q5SAcgmicDiwKRl46LMo2b8U= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=37zZphhP; arc=fail smtp.client-ip=52.101.193.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="37zZphhP" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ycqt1k5e9ecY1pgndlsGKdWKHTKEM47zwm7FnP1XVdxD+3d+DwW4mTbiwcu0mQTUejP4Evu0PtofIOBYBa34xQBN+bzk641uV6sqqbL2JyqUvlLKzqaUII/xV550l5+GiPRN0MLYEwWORSjqHSw293RpsawvhX8agcqi3pbhObvdGliR+N8qkKFN/ANaNzXcMzvQjbR+D63TOIddYsQ0BrGPCprf6DhH0OWKbVhguB6JeMXaS7lOtCLliMZKigOY+x2PSsUBvJ8QMQ0OOxMCuLMJp5Jziu+VhMbGCRJEIKmxyesCP1KU9UbST6g6vjwPSYbjvtmaIBQiT34Y0q2swA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vqEYGfiR8q0cjq5iWXP1NeuvvNLM9lyiBSKW6MFxoK0=; b=yRNjs/3AN2Ugel60HyAfUENynR14NNHqmfb0qKoyFV5qflYpW1xhShxuyAzpIHkTdR6Bw8lyV8lWJfgfzKFEEJQQK2PtRa5nx7kLAsz+1D+WXC4Ef+sdrgyQeuiCVUwBXiOvR5nW1ENgzjEYPNg2EHfAzSH6q7NyXDiGMauPXZRiXakdmGIpK/woDrwDDw9APEXIGFGJWzREPA5UUSUpwjfSR//AeG5vPWJHkAfmL2cIRTRa8hrwCjwnYgNYASfr7bHObl6yPOj7hEGkbPhcstMQqIjEY+dSud9V2khszbzHj5oyVrcMBusygNZW4IkffXyfBpnt+E8fzTVc8pf2UA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=vqEYGfiR8q0cjq5iWXP1NeuvvNLM9lyiBSKW6MFxoK0=; b=37zZphhP4pEh+hiqCZQqgbUS9J+9TqDJsdZNke2Uh0bRadZdc9/1htZ0Vxbhn4XUZCCq3yJLnwZIZZKGzhSbrrnJD6FxMasmXcYC0SjLfXQd5JX5IWhQEoJqRSxCqCaf+yr3N18Oo7aUw9nbxDt2EGLVDqn845/u5/uW1UQZz1w= Received: from BL1PR13CA0405.namprd13.prod.outlook.com (2603:10b6:208:2c2::20) by CH1PPFD8936FA16.namprd12.prod.outlook.com (2603:10b6:61f:fc00::624) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9366.17; Mon, 1 Dec 2025 11:09:18 +0000 Received: from MN1PEPF0000F0E0.namprd04.prod.outlook.com (2603:10b6:208:2c2:cafe::f3) by BL1PR13CA0405.outlook.office365.com (2603:10b6:208:2c2::20) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9388.9 via Frontend Transport; Mon, 1 Dec 2025 11:08:53 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E0.mail.protection.outlook.com (10.167.242.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Mon, 1 Dec 2025 11:09:15 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 1 Dec 2025 05:09:12 -0600 From: "Yo-Jung Leo Lin (AMD)" Date: Mon, 1 Dec 2025 19:08:10 +0800 Subject: [PATCH v4 2/5] drm/amdgpu: add helper to read UMA carveout info Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251201-vram-carveout-tuning-for-upstream-v4-2-9e151363b5ab@amd.com> References: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> In-Reply-To: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet CC: , , , , "Tsao, Anson" , "Mario Limonciello (AMD) (kernel.org)" , "Yo-Jung Leo Lin (AMD)" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6319; i=Leo.Lin@amd.com; h=from:subject:message-id; bh=eA8BpgnmJjtHcwq/axi4BLexWKy79hpik/sofYeVprA=; b=owEBbQKS/ZANAwAKAV8XsZZKKe6GAcsmYgBpLXdPXrqOoT/8S3H3eQHs4ZxLwtEQDExIsj2Mt 4uKWxaNbtWJAjMEAAEKAB0WIQQzqV4kW+yguuqHrw5fF7GWSinuhgUCaS13TwAKCRBfF7GWSinu hq/cD/4mNR94YoVSPxkqbIkO5ckxi88C4XziSIqhI3huJ1Qur4q+NXXz6K6xu5JT0bHSXZ1iCF3 Jcn6DlngCbNjKlICRJkVQQKUQ9nU6m2TdofVPLKhqIeIQdJQGWH3GXimp3n0Q8EoBz1YKBPfoB5 OiayhknauMaOAocdOxAetctZrvddZkeNPtstHH9DbrJUcr4Dgif9zSJKXFVtHeTOfxPRwjlXviP Tk/Ib9un/siH0l/PXOAq1GofFGAD2Q/lxV2PzjFD6iWVtDqEGizOva8xoesntGlhiHh8sgehTEA lshAs41Tm8RUBoo9oukCgQtL1fbwD4o8B3b7sZttYnwwruvplXtOU2XO5w2Zu2Yx+QF4pw8j9HB t04MufE+g5VmGFhc0CAPwLGZFISCzRje+4FkLwPtzZobNlRtmA1xSiv41meEyFHvtBpzvX6l32I Sj/QcDmv61zbdCOAdyo7jx9YoRjdrwVfK2qgW/gL19vsk1el0u46IckFOHsICziGXxb9NI3KsKt w5JR7mbMLnDu70U/+ntv+4W7uMLkQJiTdXrNUh6XplM5TPjvKJTJqheBQe8xS1nj2/DwpA+1vlK H9GBS6KWNk4IC6OmGJPLg/HMQrpTb0JjXmjmb3ND4N0J8T7WUJx2m2uIEsOJQsJsTBzGp/LBqpH QA8SAfGyfymdDbA== X-Developer-Key: i=Leo.Lin@amd.com; a=openpgp; fpr=33A95E245BECA0BAEA87AF0E5F17B1964A29EE86 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|CH1PPFD8936FA16:EE_ X-MS-Office365-Filtering-Correlation-Id: c6a31e6b-8ca8-483f-e265-08de30ca10f9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aitjNnpFY0tueWZ3QUlGcXlxUG9INXBaeWJWVmF3ZXFQNlNpMzBpT3ljWkVV?= =?utf-8?B?dVdQckxxUXVlN3pFanp6N21PbkhnRTVuaHk4ZC82WDRQd3d1UnVoOXVQMVAx?= =?utf-8?B?cVVvb3NWeXRMYlN1TW9LK1BwZWJkZmJaOFc3YkpSUkMrWVI1NzdtYWIwd21C?= =?utf-8?B?amdZdjVtY1kydFBEcStDaU5pbGY0OEZneFBzWklYV3B1RTBPeXZ6QnpIWlZL?= =?utf-8?B?TDNNaWhGc3YvQmpmMDA1aGF1RUVOQnpTNkNzZTRNOXJzRjVianpOYXpBWXdF?= =?utf-8?B?algyUjJmelBFdExYcVVxSXdSb01ZNFhMVVJvei94b0U5TlVrUHZKMHpOMDhw?= =?utf-8?B?Z2ZTM2pMTXlwZ29NTkp4NW1lMWRiblZVdXZYcXBaUGo2YjlpZUxpcDkrendY?= =?utf-8?B?aFhXYjREZVQxSThHbnM2VXYyV2NtYVRxellPOWZ6VDlJTng0V244bERvWlla?= =?utf-8?B?SFF6Y1lzbVNDTUVEaHd5d1R5d292K0UvYm1TYWJZYlMzRjFSSFVyVm83dkhy?= =?utf-8?B?cHZaQVIwVEZnOE0vZkRhUllOWXFzVTZXMGk4Mzl0Z1NzOWZTbElRenA2bkpZ?= =?utf-8?B?dk92bjNaSjgvWU5kNzBmdHRsYW9ZSkh6ME9rejJRbGdCUzZjd1RvTGFyU3U5?= =?utf-8?B?MG1JbmlzWHZtUnQ3RTZuc2tZNzZsL0gwK2xuelU2eUdDYU16YXVRWFpPUjhw?= =?utf-8?B?WHlLU3ZrVjBnOE5DZjllazB0TCttTVFOSHdJL252UVMvNkpGUE0vdktMZ2dL?= =?utf-8?B?YTdxT2FkYWFmek50SmNidllKdkhKMCtxTHF0dkhXemVLbFZPM1RFVmsxOXJX?= =?utf-8?B?bGtQUFF6RGRaRDZ4SVV6bUVlYTRXbFJXN1drZ2tEbDIxbDVvSXQxQlkveDBi?= =?utf-8?B?OG1VWjBreEZKNDFOTnAvRXlTeERhQU5nSE1vbXdBR2M3cHZsWEF6bEd1QXgw?= =?utf-8?B?RzU0ZVY0ZjRwRlRhL3BURmNJemhzcml3T1pNRk5QTTBpWkd6K2VzWUZTdk5x?= =?utf-8?B?TmZpcFdneElUd2N3aHB5Q2RyMXZWbEdReDV1WHFxUGdyWUh6bWI4Ky9ZWlBD?= =?utf-8?B?RUFKRGF3U0ZkdVZMbGZqcUFMSklRaVl5VTd3UDNCS28waUhoY0s4RnRZWGZ2?= =?utf-8?B?Zk91d01TUks3cUI5MXd4bXR5NzIvMjBRbk1EaUdLVEZ2SGlNbGMrUnIvSGVx?= =?utf-8?B?UFNKMzMyMllTN1BHblp0SkhCSlFRTWFRa3hueWw1TDc4WUJOcGhMdmprYy9a?= =?utf-8?B?OVNXT2tPQmN4M05iRGZnY1l4dEVpTzdwUmdjVkpoRVVjcVp0eU8vcU5DMDdj?= =?utf-8?B?RExNOWdHRUpQZEl5dllNYnpZSHZIWVhkazBNckdRaUF2RVVYZG5BS1VrZmtN?= =?utf-8?B?RU5nSjB2a1pkU3hVSVhoeURReEIranJKVC9oTWNaOTRnQ1ZMdmhycDFlNkE1?= =?utf-8?B?S2pPSUR6Snh2M0xJUlJXMllseGZrU0dDQlZZY0U3ek5Da2VLSnZ3akZmdWxO?= =?utf-8?B?a1NnTHZRaWVkZTVscGtKL0VBTU4rQVhJN2YybCtnNitZVTFmdHZGcWhDV1l5?= =?utf-8?B?eGtGenFBcUNZcFJ2cFNETEFGVi9FY1lVaFVYNWdTWGN4SXpGcVE2K0hXWW5V?= =?utf-8?B?eGErSmd3UGJkZWk0OFlydk1BSVZ6OFdRRURuZ0orV0FmNUVsb3BQNVZWMGFt?= =?utf-8?B?S05PNzkrUHFHVXltQS8wVE5yZGtUeEdDaFlDalk1dEdiWHN4YncvV01lRFV2?= =?utf-8?B?aHFTd0pIeHNqNXRhYTlqV0lOazN6KytSbVRldm9UQ3hURGxIVnJUNkhpeXg4?= =?utf-8?B?MGM0S0ExQnNRMXA2eSt5RWNCZ2ZmbkFtY0FWeFZsczd4SGl2dkNnR0crREcx?= =?utf-8?B?bFRjeVJjVjJkZlZNOERqeENFWUU0Ui8zUHVIVlRnY3lRb3h6WTVhV1M3QWVK?= =?utf-8?B?MWNnQUxrL1ZLdFd2b2NSUmIzc2drY3lZM0gyWHhaMnp5NU9JaGczRkVSZ3Qy?= =?utf-8?B?RjBxOWNLemd5Y0RoMUk2dWV3TmhaZ2VpMTB5b0laeUY1VEhabWxxRkxySEVt?= =?utf-8?B?WHFEL3JLNHkyMVNJc05VWFdSb2RxRXBpdncyRThsZEIxQVlnOGJrN1RKbG9l?= =?utf-8?Q?lLI0=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2025 11:09:15.9097 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c6a31e6b-8ca8-483f-e265-08de30ca10f9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPFD8936FA16 Currently, the available UMA allocation configs in the integrated system information table have not been parsed. Add a helper function to retrieve and store these configs. Co-developed-by: Mario Limonciello (AMD) Signed-off-by: Mario Limonciello (AMD) Reviewed-by: Alex Deucher Signed-off-by: Yo-Jung Leo Lin (AMD) --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 32 ++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 77 ++++++++++++++++++++= ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 2 + 4 files changed, 113 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdg= pu/amdgpu.h index 9f9774f58ce1..ca9c2b54045b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1675,6 +1675,38 @@ struct amdgpu_numa_info { int nid; }; =20 +#define MAX_UMA_OPTION_NAME 28 +#define MAX_UMA_OPTION_ENTRIES 19 + +#define AMDGPU_UMA_FLAG_AUTO BIT(1) +#define AMDGPU_UMA_FLAG_CUSTOM BIT(0) + +/** + * struct amdgpu_uma_carveout_option - single UMA carveout option + * @name: Name of the carveout option + * @memory_carved_mb: Amount of memory carved in MB + * @flags: ATCS flags supported by this option + */ +struct amdgpu_uma_carveout_option { + char name[MAX_UMA_OPTION_NAME]; + uint32_t memory_carved_mb; + uint8_t flags; +}; + +/** + * struct amdgpu_uma_carveout_info - table of available UMA carveout optio= ns + * @num_entries: Number of available options + * @uma_option_index: The index of the option currently applied + * @update_lock: Lock to serialize changes to the option + * @entries: The array of carveout options + */ +struct amdgpu_uma_carveout_info { + uint8_t num_entries; + uint8_t uma_option_index; + struct mutex update_lock; + struct amdgpu_uma_carveout_option entries[MAX_UMA_OPTION_ENTRIES]; +}; + /* ATCS Device/Driver State */ #define AMDGPU_ATCS_PSC_DEV_STATE_D0 0 #define AMDGPU_ATCS_PSC_DEV_STATE_D3_HOT 3 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_acpi.c index 610449d73a6c..92070738bd42 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -38,6 +38,7 @@ #include "amdgpu_display.h" #include "amd_acpi.h" #include "atom.h" +#include "amdgpu_atomfirmware.h" =20 /* Declare GUID for AMD _DSM method for XCCs */ static const guid_t amd_xcc_dsm_guid =3D GUID_INIT(0x8267f5d5, 0xa556, 0x4= 4f2, @@ -125,6 +126,7 @@ struct amdgpu_atcs { acpi_handle handle; =20 struct amdgpu_atcs_functions functions; + struct amdgpu_uma_carveout_info uma_info; }; =20 static struct amdgpu_acpi_priv { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu= /drm/amd/amdgpu/amdgpu_atomfirmware.c index 636385c80f64..7f4751e5caaf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c @@ -296,6 +296,83 @@ static int convert_atom_mem_type_to_vram_type(struct a= mdgpu_device *adev, return vram_type; } =20 +static int amdgpu_atomfirmware_get_uma_carveout_info_v2_3(struct amdgpu_de= vice *adev, + union igp_info *igp_info, + struct amdgpu_uma_carveout_info *uma_info) +{ + struct uma_carveout_option *opts; + uint8_t nr_uma_options; + int i; + + nr_uma_options =3D igp_info->v23.UMACarveoutIndexMax; + + if (!nr_uma_options) + return -ENODEV; + + if (nr_uma_options > MAX_UMA_OPTION_ENTRIES) { + drm_dbg(adev_to_drm(adev), + "Number of UMA options exceeds max table size. Options will not be pars= ed"); + return -EINVAL; + } + + uma_info->num_entries =3D nr_uma_options; + uma_info->uma_option_index =3D igp_info->v23.UMACarveoutIndex; + + opts =3D igp_info->v23.UMASizeControlOption; + + for (i =3D 0; i < nr_uma_options; i++) { + if (!opts[i].memoryCarvedGb) + uma_info->entries[i].memory_carved_mb =3D 512; + else + uma_info->entries[i].memory_carved_mb =3D (uint32_t)opts[i].memoryCarve= dGb << 10; + + uma_info->entries[i].flags =3D opts[i].uma_carveout_option_flags.all8; + strscpy(uma_info->entries[i].name, opts[i].optionName, MAX_UMA_OPTION_NA= ME); + } + + return 0; +} + +int amdgpu_atomfirmware_get_uma_carveout_info(struct amdgpu_device *adev, + struct amdgpu_uma_carveout_info *uma_info) +{ + struct amdgpu_mode_info *mode_info =3D &adev->mode_info; + union igp_info *igp_info; + u16 data_offset, size; + u8 frev, crev; + int index; + + if (!(adev->flags & AMD_IS_APU)) + return -ENODEV; + + index =3D get_index_into_master_table(atom_master_list_of_data_tables_v2_= 1, + integratedsysteminfo); + + if (!amdgpu_atom_parse_data_header(mode_info->atom_context, + index, &size, + &frev, &crev, &data_offset)) { + return -EINVAL; + } + + igp_info =3D (union igp_info *) + (mode_info->atom_context->bios + data_offset); + + switch (frev) { + case 2: + switch (crev) { + case 3: + return amdgpu_atomfirmware_get_uma_carveout_info_v2_3(adev, igp_info, u= ma_info); + break; + default: + break; + } + break; + default: + break; + } + return -ENODEV; +} + int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, int *vram_width, int *vram_type, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu= /drm/amd/amdgpu/amdgpu_atomfirmware.h index 649b5530d8ae..67c8d105729b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h @@ -32,6 +32,8 @@ void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_= device *adev); int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev); int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, int *vram_width, int *vram_type, int *vram_vendor); +int amdgpu_atomfirmware_get_uma_carveout_info(struct amdgpu_device *adev, + struct amdgpu_uma_carveout_info *uma_info); int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev); int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev); bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev); --=20 2.43.0 From nobody Mon Dec 1 21:30:48 2025 Received: from BL0PR03CU003.outbound.protection.outlook.com (mail-eastusazon11012055.outbound.protection.outlook.com [52.101.53.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F3E2308F0C; Mon, 1 Dec 2025 11:09:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.53.55 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587366; cv=fail; b=sa4R5UVSQiyYi4YJstoJHy3n6HybsK08CHcNaySYImNHNyYfQgy3bRX9YWNEclLj6EwK7mf0CPTUKfOVehdQzrJBojhPbAc9rb57680r7wyBEBtXqf6cb9fHP6HtGWe5o8DM/2NlTIQQ+Oth9TUYtNadwINjTHES4UDOVGB7hxM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587366; c=relaxed/simple; bh=MC0Naskx3s6b+48x+DyhjXElbfffGFnO9whl9i7j+bA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=Cbrp6bZr3OvxFqdcKVFsMh9ngiWVNaasscxlUzr1NuTTfRhdX3ICyhSyos6f2gIdF+t9jSVgDl7O1VxQUD5Zf52kzoMLDCzzOaG3uVT9SjfHG6SoXQYxRI9RdJsuv/1t1lmUIgKOhUiz8NoLDc6Kwt1we3p5TY+JAJQDDIEQYy0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=JBThQRKQ; arc=fail smtp.client-ip=52.101.53.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="JBThQRKQ" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=qi8HyBjD0IY6ukJ33R/u/8AOTn9+CzXnyPgVJlgP5WLS8KtBiUysoT+H85lh/wA9KWKQvHfgcKWvzAf1/Y/wWmGnhYkpZUw3H7ZB1SR6J/2yLtfmXtFzVwChwPj84qxaIgaPKOFJs3NMC43XXGzPgBtYqyZf1+NrmMQBBGAL383GHniRSCVPAEdoVipVMgeKKv6ZNjxnegh82h7jGPKMMTLyaqnM6H9LyN5G8GeC5f+1m2W60A1jiM2zwDDEQa34+xVbubnsggvr08wKPOQ1UITOxGaLjUlp0IA0ndl30pg959bN4REFCNVzDjFLHSYvrJLULKFV18aWsryxk0NyJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=UOCc5u+MQ+VVZvgEUZCQ98BBtZmh/ZI3mSNRj5DQqcs=; b=P0CHbgS7y0nZVTI/POmgwNLlSL/Bzh05y/9t9lBuywUso6Dm0hPMrFTzr6/zskjJaf1QeO4jMZo+ZBmgatDJdu9pCAXDEM6FxFNPzabA4pQqY+pziZtdwgf9t5cbb6l7gpfnYAYl2j1lz6EFrwAXtRyafUjXmjnoSpL9CBB/Ba/jKFsdIrksc/NC9u37iK39S0KUiYZ5ApLQkvbf3KHrqjNqQ5KFaofs4fpEbWmvU5iE1Do8iTHCUiLg8CF4MGlHL61vwBZ1rSQvO+nsu3JgIyaKhu79L6kkEsTUc8IQvItzvNnPNG3PcvbNgiNDGolDbkQzQhSIndQ0rVNUCrJwCg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=UOCc5u+MQ+VVZvgEUZCQ98BBtZmh/ZI3mSNRj5DQqcs=; b=JBThQRKQXerdrqT46iyU1rut7UWvHeNPfCpl0qGiIAtwk9F5i6sW30hcVXntpP+6AxLD7jfqoAqQy5RgIsZ9BcKsOMQgxSXZLuTQTpVeJh/gyqe56p6Qv+2/H0GGk44F2aYYeLPN7MkuIkEBZYog3diHWU19a4WLWtz9eBATjs4= Received: from BL1PR13CA0394.namprd13.prod.outlook.com (2603:10b6:208:2c2::9) by IA1PR12MB6460.namprd12.prod.outlook.com (2603:10b6:208:3a8::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9366.17; Mon, 1 Dec 2025 11:09:19 +0000 Received: from MN1PEPF0000F0E0.namprd04.prod.outlook.com (2603:10b6:208:2c2:cafe::d2) by BL1PR13CA0394.outlook.office365.com (2603:10b6:208:2c2::9) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9388.9 via Frontend Transport; Mon, 1 Dec 2025 11:09:19 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E0.mail.protection.outlook.com (10.167.242.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Mon, 1 Dec 2025 11:09:19 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 1 Dec 2025 05:09:15 -0600 From: "Yo-Jung Leo Lin (AMD)" Date: Mon, 1 Dec 2025 19:08:11 +0800 Subject: [PATCH v4 3/5] drm/amdgpu: add UMA allocation setting helpers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251201-vram-carveout-tuning-for-upstream-v4-3-9e151363b5ab@amd.com> References: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> In-Reply-To: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet CC: , , , , "Tsao, Anson" , "Mario Limonciello (AMD) (kernel.org)" , "Yo-Jung Leo Lin (AMD)" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6465; i=Leo.Lin@amd.com; h=from:subject:message-id; bh=MC0Naskx3s6b+48x+DyhjXElbfffGFnO9whl9i7j+bA=; b=kA0DAAoBXxexlkop7oYByyZiAGktd0/IyMDWVCpJma6pwfe4Z+1G+qad69vfUiQJMtjHDTby/ okCMwQAAQoAHRYhBDOpXiRb7KC66oevDl8XsZZKKe6GBQJpLXdPAAoJEF8XsZZKKe6G2G8QAIuI e0cCxUbEn+P90YtHIbA2Gb1+VJqYfLBA2NqirL1UPgJycSjyApfTgJQw14jCJpbzTEn4kbjViXy LfBO+GZ1FeuUOavxS3EitNizPavtpAaXHNzU8+xeEm5szdWZ8fMwQ5ziy9YWgvGLleIsFc3sotU Q78NiFKdLnJd74VgPTg9ZoJy6NuGLRtdI20F9CfUyzTpxkIBcRrVCcRqOvUqx6z4L/xkk08fuWv fkNyOIRof8FaNEPRuGaZ/OXwRfFp5w5ONA0AcpaP0JdBAwsFpv+rr8hqRPiPDxN1uSAXNRuxuf/ V5Wik+PEIVP1ac2WHGxkYdK4SKLVAmNnTyv6lDlxNhwibKWSgXmEWcuUnMXHIvNBtl1cuyt7w+k pxPvnukhKWoVrlScjaDzqT+wxYyzBy+fe1bdnqNpNXd9QMtJtwMl4w+OrrOurCVZc7orv1KSbyV uTOJd+UEy84lcQ8rRiTOBpDTTxzHt3BXXsnNuJDQh5NPLl/+QZRlH8Muw3z7Z180d0OD+OD7jQs bfk2Bj77ay0BRBIPfp+RgBRV59EXm4kVD0h5OKRqtkzJIagidz7YDAic1YPlR07rqGh0FmBkbSX QtOupQX2FvaCjibs5geAVXsxH0cdIt07hl1BRzHRe41sVVeYyeggZ94wHTAg1pD56RwvV8KVJJO j6zdL X-Developer-Key: i=Leo.Lin@amd.com; a=openpgp; fpr=33A95E245BECA0BAEA87AF0E5F17B1964A29EE86 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|IA1PR12MB6460:EE_ X-MS-Office365-Filtering-Correlation-Id: 28c5793a-31ac-4ff0-5080-08de30ca131c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aU1iSWJ6NVhSd2J3aXB2VU1tSUJxTThqQWpYRGxENnhQU2FDd2tYelIvT3Bp?= =?utf-8?B?YU9qTXNiVWx4UzFtZHQ2cjNDanZyb0kzRnltaUdkZi9sRXNuc1FpeGFCeGsw?= =?utf-8?B?MjlYSGUxNzJwNHVIRHlVMlMxeUUzRFl2Q1RQQW9RZ2VRbXNBSDJoOUc0b1FF?= =?utf-8?B?THhaQUs3bEV1MlNFNFpKRDExek5zamVKTk5La09pSE9oOFhETjlnWFJhcnFT?= =?utf-8?B?S0M3THJwcjhFK2J1WTdlemg0bElwaEMrSE83dVBpMTI0ZGlqR2VNTENidmd0?= =?utf-8?B?d1VxS2F5VlZJQ1hPVzl3UmJVZFIvaHdNenRkV29VTzEwNUNxVE5IRkg3dTcr?= =?utf-8?B?eVpTYXVMbkc5NTZPQnJudXdHQ25KbjI5WFZBOEZ3N0JvQXFIbFJiaXpaOXNY?= =?utf-8?B?OUJHMTlMaFQ5T2lBUkpzVi94U2J4dGVFK3VvaS9HdXBnWGpjZVh2c0ViR3RL?= =?utf-8?B?RkRMaHE5aEpIMXROQnpTbFY5L0tIOEgzOFFhcXBVRTMyYVYxVHJ3VkxraVpY?= =?utf-8?B?OHZKSmtSenFFMUZOYURqNnhOM1BKL3dYRndIb2FCUzBLYXE4TVJkWUQ1THdp?= =?utf-8?B?ZjVpN3JCMGlQQ3B4Mm1LWEJ1TXZOUXNab2Zjak9Vckw1d0N2UHFjV2pFMTZw?= =?utf-8?B?dnVuSWkzYk5aZ1dWQmE0cHFvbVozMXoyVXlCeHdGKy9EL0JHdkxrbGJNcXBp?= =?utf-8?B?VHViWjVEWTFDVTR6bkNNSkUyYXV4S0dYU2lFc0NGNWk2RjBMcG8xeXI4c2ZO?= =?utf-8?B?MGdQcExqeXI5OFgreTV3QzBIcnZtTnNwMzlIUTFWdE9LWG9Zblh0VWdjZWdL?= =?utf-8?B?RXkyNHNUSkQrK21aUnN5OFY2SUQ0YXZZcjZhZ0Q3d1FlcitjZStrbWo1WnBP?= =?utf-8?B?V3lkenZRSkpFZ3U1TWk2VkNsMDZ4ckFEVSszUzdDUkxLa0xRNXFBSnpRVjBT?= =?utf-8?B?SXRiV2U0Zy9oeHZmYnFIck9CbTBrSzR3Tnhka25uNk8yRnVUUERqaHc1UTZa?= =?utf-8?B?SGlPUzFhbEJhUkZ5WGJhMlo3VmJia2cyeU8raEx1cndiOUxPNVQ5WGpCd0ZP?= =?utf-8?B?Ry9NcGgwNWY2Y1lYcHdwNWtURjI1Qk1XRXEzaWYzOUhlQmZGUkZxbThBVVd0?= =?utf-8?B?MHl0OW13V3ZxZGN4dnQ0NE01dG1ISU1rMjk2c0lIR3M0YVorWXdWblR0R0NG?= =?utf-8?B?MzNsOWxIOS9JWTJSNm5XMmd6N2wrc3Z6VVBEOEh1VzVSZFBxeFFldTNTR3V2?= =?utf-8?B?RWM5M1c4WlhaaEcya2FBRWxoaUZMRjJnMWE3Y3phckZ1ODdjRkc4YUNwWmQz?= =?utf-8?B?Q09EbG9YVXYyc0dKREkrZjFsU0w5MlpBV3BydWZCKzZvY3NYeEwra2xSL29Q?= =?utf-8?B?Y0luVnc0c24zNk1GYitObm5Tdmw0QW1iaUtkbmtlVFM1NmxpNW51bnUzQVVw?= =?utf-8?B?MXdyRVpkR0NjMzRNZ1pydzJyeWJKaXpwcnhTSGhxM0J4MVhOV3hMSE5hcndL?= =?utf-8?B?eXFuRUZXejhhK0dVejkrdkNyOGk2eHN6RG5EalBVbVlVQU82MGNaYUVoSjN4?= =?utf-8?B?ZE1DTzNVa05kc3BvNTFjejhzZm5ma3FkVG4wZVhRTXZZbDhqL2N5bjRiQVNn?= =?utf-8?B?djlOWHRuSTcyWmFiaWZkK0Y5UjFsdmpYeTduKzJuSHMzb2hpanppSGk0VWVT?= =?utf-8?B?ZmNVTjZUc0tyRlY2UWFKcXNJUGZkQnJxeHZQWGlPTUpzSFAvdlcyRlhpSnFE?= =?utf-8?B?ak8zTysvSkJwUm92aGpIeVRKTHp4VmJJaTYveTF5UHozdXJNVllVSG5RTEVF?= =?utf-8?B?Q0s0ZmpPMnAxd3duMmpHZ1pwaGtJU2ZzUE5nZWV1MFpLU2ZNaUlWbTE3NEZ4?= =?utf-8?B?dnU4QVMyU2tHYkxHWVY2Y3BDdE5KcUtlOXprRHpZK29tUC9OQitwTTZGUkdo?= =?utf-8?B?ekU3WUxDUHRScHllYTZ4WHl5YWJ5VGdjQ3g5d3NCSTBHeDNubldXM2dsaHNx?= =?utf-8?B?SHMrZ1VqRDdzNVl6T3dQeFFHNkx3ZklvWU5Ra0NUdmNIRWNFWEphTElpL2Z6?= =?utf-8?B?UUsvTERNcjhBMkdhYmQ4V1dCek5TZ3BZV1VHNkJPMHVvUkYyRUt5VngyaWU0?= =?utf-8?Q?TqEw=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2025 11:09:19.4905 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28c5793a-31ac-4ff0-5080-08de30ca131c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6460 On some platforms, UMA allocation size can be set using the ATCS methods. Add helper functions to interact with this functionality. Co-developed-by: Mario Limonciello (AMD) Signed-off-by: Mario Limonciello (AMD) Reviewed-by: Alex Deucher Signed-off-by: Yo-Jung Leo Lin (AMD) --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 ++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 43 ++++++++++++++++++++++++++++= ++++ drivers/gpu/drm/amd/include/amd_acpi.h | 30 ++++++++++++++++++++++ 3 files changed, 80 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdg= pu/amdgpu.h index ca9c2b54045b..cd9a71abf4c5 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1718,12 +1718,14 @@ int amdgpu_acpi_init(struct amdgpu_device *adev); void amdgpu_acpi_fini(struct amdgpu_device *adev); bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_devic= e *adev); bool amdgpu_acpi_is_power_shift_control_supported(void); +bool amdgpu_acpi_is_set_uma_allocation_size_supported(void); int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev, u8 perf_req, bool advertise); int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev, u8 dev_state, bool drv_state); int amdgpu_acpi_smart_shift_update(struct amdgpu_device *adev, enum amdgpu_ss ss_state); +int amdgpu_acpi_set_uma_allocation_size(struct amdgpu_device *adev, u8 ind= ex, u8 type); int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev); int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, u64 *tmr_offset, u64 *tmr_size); @@ -1752,6 +1754,7 @@ static inline bool amdgpu_acpi_should_gpu_reset(struc= t amdgpu_device *adev) { re static inline void amdgpu_acpi_detect(void) { } static inline void amdgpu_acpi_release(void) { } static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { re= turn false; } +static inline bool amdgpu_acpi_is_set_uma_allocation_size_supported(void) = { return false; } static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *ad= ev, u8 dev_state, bool drv_state) { return 0; } static inline int amdgpu_acpi_smart_shift_update(struct amdgpu_device *ade= v, @@ -1759,6 +1762,10 @@ static inline int amdgpu_acpi_smart_shift_update(str= uct amdgpu_device *adev, { return 0; } +static inline int amdgpu_acpi_set_uma_allocation_size(struct amdgpu_device= *adev, u8 index, u8 type) +{ + return -EINVAL; +} static inline void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlig= ht_caps *caps) { } #endif =20 diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_acpi.c index 92070738bd42..bce9027fa241 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -670,6 +670,11 @@ bool amdgpu_acpi_is_power_shift_control_supported(void) return amdgpu_acpi_priv.atcs.functions.power_shift_control; } =20 +bool amdgpu_acpi_is_set_uma_allocation_size_supported(void) +{ + return amdgpu_acpi_priv.atcs.functions.set_uma_allocation_size; +} + /** * amdgpu_acpi_pcie_notify_device_ready * @@ -910,6 +915,44 @@ static struct amdgpu_numa_info *amdgpu_acpi_get_numa_i= nfo(uint32_t pxm) } #endif =20 +/** + * amdgpu_acpi_set_uma_allocation_size - Set Unified Memory Architecture a= llocation size via ACPI + * @adev: Pointer to the amdgpu_device structure + * @index: Index specifying the UMA allocation + * @type: Type of UMA allocation + * + * This function configures the UMA allocation size for the specified devi= ce + * using ACPI methods. The allocation is determined by the provided index = and type. + * Returns 0 on success or a negative error code on failure. + */ +int amdgpu_acpi_set_uma_allocation_size(struct amdgpu_device *adev, u8 ind= ex, u8 type) +{ + struct atcs_set_uma_allocation_size_input atcs_input; + struct amdgpu_atcs *atcs =3D &amdgpu_acpi_priv.atcs; + struct acpi_buffer params; + union acpi_object *info; + + if (!amdgpu_acpi_is_set_uma_allocation_size_supported()) + return -EINVAL; + + atcs_input.size =3D sizeof(struct atcs_set_uma_allocation_size_input); + atcs_input.uma_size_index =3D index; + atcs_input.uma_size_type =3D type; + + params.length =3D sizeof(struct atcs_set_uma_allocation_size_input); + params.pointer =3D &atcs_input; + + info =3D amdgpu_atcs_call(atcs, ATCS_FUNCTION_SET_UMA_ALLOCATION_SIZE, &p= arams); + if (!info) { + drm_err(adev_to_drm(adev), "ATCS UMA allocation size update failed\n"); + return -EIO; + } + + kfree(info); + + return 0; +} + /** * amdgpu_acpi_get_node_id - obtain the NUMA node id for corresponding amd= gpu * acpi device handle diff --git a/drivers/gpu/drm/amd/include/amd_acpi.h b/drivers/gpu/drm/amd/i= nclude/amd_acpi.h index e582339e8e8e..84933c07f720 100644 --- a/drivers/gpu/drm/amd/include/amd_acpi.h +++ b/drivers/gpu/drm/amd/include/amd_acpi.h @@ -24,6 +24,8 @@ #ifndef AMD_ACPI_H #define AMD_ACPI_H =20 +#include + #define ACPI_AC_CLASS "ac_adapter" =20 struct atif_verify_interface { @@ -112,6 +114,17 @@ struct atcs_pwr_shift_input { u8 drv_state; /* 0 =3D operational, 1 =3D not operational */ } __packed; =20 +struct atcs_get_uma_size_output { + u16 size; /* structure size in bytes (includes size field) */ + u32 uma_size_mb; /* allocated UMA size in MB */ +} __packed; + +struct atcs_set_uma_allocation_size_input { + u16 size; /* structure size in bytes (includes size field) */ + u8 uma_size_index; /* UMA size index */ + u8 uma_size_type; /* UMA size type */ +} __packed; + /* AMD hw uses four ACPI control methods: * 1. ATIF * ARG0: (ACPI_INTEGER) function code @@ -494,4 +507,21 @@ struct atcs_pwr_shift_input { * OUTPUT: none */ =20 +#define ATCS_FUNCTION_GET_UMA_SIZE 0x6 +/* ARG0: ATCS_FUNCTION_GET_UMA_SIZE + * ARG1: none + * OUTPUT: + * WORD - structure size in bytes (includes size field) + * DWORD - allocated UMA size in MB + */ + +#define ATCS_FUNCTION_SET_UMA_ALLOCATION_SIZE 0xA +/* ARG0: ATCS_FUNCTION_SET_UMA_ALLOCATION_SIZE + * ARG1: + * WORD - structure size in bytes (includes size field) + * BYTE - UMA size index + * BYTE - UMA size type + * OUTPUT: none + */ + #endif --=20 2.43.0 From nobody Mon Dec 1 21:30:48 2025 Received: from MW6PR02CU001.outbound.protection.outlook.com (mail-westus2azon11012035.outbound.protection.outlook.com [52.101.48.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5A80308F3B; Mon, 1 Dec 2025 11:09:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.48.35 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587368; cv=fail; b=iVhTNcRVhgsS/ks4WZEE2TNm0EFjbJ+Isdh04yJFNyUXG+5SqpC6WGi0opHNIKwpbEUJJ458xmwZ8uloNbXlvfRxqL+EU/tRHvCRd7+TqGKjATSJB7NfbxOoU2utrWY7xy7ZICGyFNOy4iq1lFShF+WbwWRpaWaKSMQKr36nL2E= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587368; c=relaxed/simple; bh=FC+gH66/AgvZKbtkiHMAOFZ5+3Ozaef2cS6Y+d3ZgoE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=un2odJeLZAPm2D2/QiMWdTLmE7nf/k6IYj5JeQvY8MGgm4VinvdemBYJqk748dbJPWy4J3g89+H4tYD8eveMwjn3Cqn7tYsD7oRkAs1aF8kvjOsJvrqv33CpDtAGME91KPpVEUiJKmMRhIQknDlGa2oCcP8rQSKNNHGgkWwRhYk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=KUw1h7re; arc=fail smtp.client-ip=52.101.48.35 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="KUw1h7re" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FE+oH10MenDYrAvIe+DxIzjgWxCk9wn/H29SMXNJDuTMVurnNssiA4xZ0+vr2rLohH5irwEuT4BAZBMBgVS8LaKZHpdDW8jsPfWYHuVFIMxcopj14oKsqvE4+RdSq8H7NVUMlWi4d2DUkCT8WcguC9yygTD+imCudNXGoZ/lfEPdpiJZ3eOgA/ipV3ZnWI8nHDXTnDw9Kb8qMSS9mp/zOOLJoFROTNSj59qv3aohOSkZB1cLKhvVYcqIN3olZCSZQhCnHpALbqFosljDh3cvnifUrnoDMytpYQTEaLuSHgGSqhkhqmBh1eV8kjaokpVgTxj+09JfIglwkoKa95MjtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gnzi+2yUDaHk5Ism4sAUAI+3eu33R/z7A+T3jCoqvO4=; b=qiQVgrnG/BLjBWe25NvXhiVeHTaSgw8H8xCQVIbMdS+ceCaDdBX3pB9foj3MefRDla6nILGrwUsxCZZcoZ1FiQMYK/9DGPAtz9tuJrpaUA7A84CldAlZmN0W83t2v6jUmVfMy7A9Doty53mobPf6viIAWDRctVfIxegkBHQdhWCBbnWhwWeirxikam5jC4GF5mkO9JagBTGCWoxq9B65AwKH4Db+vYTBANomGtRVhuWykx0p/6ORksxWMHejcqpsMGYxg01XUChSZEN8zy60CKY3fBGRLJQgAwcl19BGh59kFMPqN9eeysenqcZfaM2R4Zwd5VfF77z0ZEsXK2ClrA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=gnzi+2yUDaHk5Ism4sAUAI+3eu33R/z7A+T3jCoqvO4=; b=KUw1h7recT3W4zOSV2AojuwIehRaOjOsCGDOE4WBEwRtKpY1H9wTcKkyAePert+hYT7xWK1/Ob703pOVIsdcccjn6sCmgU1wheagZrOocb5Ij/UPdxfF/m7PjkuYktwUbdm8jm/3cCuYdRlvviZbhZlyxjkJrSqgY46yLAd+ocY= Received: from BL1PR13CA0407.namprd13.prod.outlook.com (2603:10b6:208:2c2::22) by SJ5PPFE4FC9FAB3.namprd12.prod.outlook.com (2603:10b6:a0f:fc02::9a7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9366.17; Mon, 1 Dec 2025 11:09:23 +0000 Received: from MN1PEPF0000F0E0.namprd04.prod.outlook.com (2603:10b6:208:2c2:cafe::92) by BL1PR13CA0407.outlook.office365.com (2603:10b6:208:2c2::22) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9388.9 via Frontend Transport; Mon, 1 Dec 2025 11:09:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E0.mail.protection.outlook.com (10.167.242.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Mon, 1 Dec 2025 11:09:22 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 1 Dec 2025 05:09:19 -0600 From: "Yo-Jung Leo Lin (AMD)" Date: Mon, 1 Dec 2025 19:08:12 +0800 Subject: [PATCH v4 4/5] drm/amdgpu: add UMA allocation interfaces to sysfs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251201-vram-carveout-tuning-for-upstream-v4-4-9e151363b5ab@amd.com> References: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> In-Reply-To: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet CC: , , , , "Tsao, Anson" , "Mario Limonciello (AMD) (kernel.org)" , "Yo-Jung Leo Lin (AMD)" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5546; i=Leo.Lin@amd.com; h=from:subject:message-id; bh=FC+gH66/AgvZKbtkiHMAOFZ5+3Ozaef2cS6Y+d3ZgoE=; b=owEBbQKS/ZANAwAKAV8XsZZKKe6GAcsmYgBpLXdQvzELfUrc6JHpUMQ/+3bCzWkYgPPmqbdMl R0fwpvkbyyJAjMEAAEKAB0WIQQzqV4kW+yguuqHrw5fF7GWSinuhgUCaS13UAAKCRBfF7GWSinu htNwD/9AAT+58lNkmxqXWmPoaE6p9HEeBjHJY20QpVa8a88Fls5XEpy2blQSII3O1IP1OnDCA4L hhSba5C23/dFjDf7fT9GprA0JVVTODxxuiseH633tzfP3K1yCGUwml/gbP2sa6m9Auqe4aqvn6i Z9jO5c1c/AOd1HQLvSBfQ7a2XP00Xha7IoqsR98er4Dm99h/fuT6Tu3b8a4TmUvDsq54OnMPDIU CcEFCIvxl7KTorPCx7zmuELzeAsma4StI9TE1bclUUUcxVTJMpadb+RiIg1NxO42MHtiOtospQk ybt0WNbmpiBjbw2qq7XGzrkAtSpttTBMhI+ucibsrZbM9ipPNWc66oKlTEBS1nvfVMTpDaqoTcd ZoAXGM3DMmHDUB4pRlQ9xVN66Ie20mCxbQZzsKgf8vuKZojaV1QnMpUYos/NEHEuC8QkJLxOX+R vxGXWf24P4SO69uTiyrkyVkPvZlvU/IgkN62NhseNh52vS5TICnAAO5RxFbNp1x0qJyHHDA4z50 qcA7HGf69kkA9am7dGRQRlWxurVLs/iAj+hv1iK/hxdUwAvhxJs/nLGvCkEM6MUasVTNCZKmsnm /xo/EP0CluZtYVy4e5JplE4qM2jp67lPNWA+L2M/mc6jWLYOcPuQG5CdAV1QHoD1GqjoXtVHUWq Qgkay9pkPl7bH5w== X-Developer-Key: i=Leo.Lin@amd.com; a=openpgp; fpr=33A95E245BECA0BAEA87AF0E5F17B1964A29EE86 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|SJ5PPFE4FC9FAB3:EE_ X-MS-Office365-Filtering-Correlation-Id: 70ab15f1-1e4e-4d98-e62a-08de30ca1532 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|36860700013|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?clNPaUFUakhyUHpkd1lCbVExYUNHREc2c3d5MUR6TjVQNlJGdEFxTk5BVDdr?= =?utf-8?B?WWFYUEcwYW45ZVpzWWRXaDhCM1Q0NE9UclNSQkVBbXh0OVZYZ29aR2Vpc1U1?= =?utf-8?B?dml4bGRWVHNzUlFuMnBTZEpxSmpsM1d0amFUVUpVd3dFMHdkM0d0M1p1elQ4?= =?utf-8?B?Q21ZWU5BZUdEa3NuUlU2MmtVZU9kY1BJNTZadmlLczl6UER5TjFWSlJrZzJy?= =?utf-8?B?RTI1aTFyNDZBTElpd3B6WHlPYjBodWQyWmRTT0hpdE0vL3Q4QThIU0hVRk5O?= =?utf-8?B?dDBGV1ZTUVQwUFFXcU56QnVWY1IwSCtWYk9LNFViR3NJMG5hNzBrakNFVzYr?= =?utf-8?B?d3RKL1hJWXhaZjhtaTBDK3JRQ2JNUDNNU2tnUm5rTEplSVplenp4RHJhL1hJ?= =?utf-8?B?YW5IZHk0TnJwYldpcm9zaGVFZUVtS0VIamJaWVFveUZiMmlxRHpCVXhVTDZs?= =?utf-8?B?R00vSk9wZUtkaVNWMHl2SzRqaVU0QnlxNzhOUm0zWjhYS0tYbG1ldFJkckhv?= =?utf-8?B?dzQwZWNJUEYzV1RhTmNudTFMZUNIM0dQWjVMY01KTnNkZVpobzdEOGNDYXpL?= =?utf-8?B?cE5PVzJReVVsVVNCRmNFQlRibEZqcStiMTZiVmU3Vy9ucmpIenlPODBxeHlC?= =?utf-8?B?S242bXVXeExlWTQxcjNVSkpSS1cvVytLSUtyK2FrTVZhWUZEdmJjZmF0cVYv?= =?utf-8?B?UFdTVDFqREpEN3dJbWlFaE5IaURqc00rUVBnWUtJbVlGd21CZkdGelNHd3cx?= =?utf-8?B?Q2FkL253dFpyYXk3cFFTYkpqQmhNOUFEVkRvL1grdy9EQnBCeE9iL24zaTFF?= =?utf-8?B?Q25HVHBhOGdUN2o5cXRmT3VPQzFJQ20rWEl1b2RqL2Y5NGVLQnVDalVBQmh3?= =?utf-8?B?THprYWgvWnM5UGhQQVg0ZmJuOGcwWWYwMXl3RHAwcjJxa0lFOEs4azgyOUkx?= =?utf-8?B?d2NZYXU2VkVJQWdmdXRzbFlvOWpTZzhVUHlIcUpQbXZlalJ0eGU1dURmb0ZQ?= =?utf-8?B?Sk9EZW1aZWN0RjMyTisrVXBGMTF3N0hMeFIzY3hONDlTaElISUU5M3dmL2Fp?= =?utf-8?B?Q1FRZHJURWhRNHlrODZEQWNabTY1S0VRME9NQW55TGlya1pMSVN3TlFoc0JH?= =?utf-8?B?OVFlMFRBcmkxL3dNTmhrVWY0ZDEwNFBLRDJSYlV1VGNqQW5YK3RsZG8wUzg3?= =?utf-8?B?OVNXakM0Uk41QXRZZmpVTTdwSnhKVDNzOWltMzk3ZUpQVnNqakRTRnpXdlZB?= =?utf-8?B?dElzLzZLcElVQzJKakU5aHlzeEliYW5yUjV1WllJdDZjMEc5WEtUMmo3VGYy?= =?utf-8?B?ODdKcXB5NHNwcXEwK0JUOE1hR3FWNkJXbDNkS3FWTUxIRzlTSjFQenhBT1lZ?= =?utf-8?B?Qm92TXRnR1hlc25jdVJEWnlEL0owaC9Ha3VLYTlnNURTeW4xL2x5U1loYis2?= =?utf-8?B?dXFzV24rUHJWNFRYOUNpc1VXb2F4ZUJ2S0l2UXg2Tm9tV3JTbzRiWGdQREN1?= =?utf-8?B?eXowZE5ZQVFnbEhmcHIveU1kQjlORVJ6VElwaFZnZnplaTFnQ2Zpa3diYUdz?= =?utf-8?B?aWtNbXgyQS9HVGdZc1NkMWhiTXFTWlh1V05PTXdIVFVKMFpJVmRQTTIzZmQw?= =?utf-8?B?amd5Tk1lS1NvZ2VzMjRtSUZmTG91RCtMYk5oWWp4RVdzaDU4WFU5WmlFOWMr?= =?utf-8?B?TmNTUjF5RVVwTm9LZHdwMzBSWFpPeFZESXpFMk1QMkg1eHhmaVBVVUkxY0NX?= =?utf-8?B?VDNPMS82aEw3QnN3Y1pZM1BjVGlWMVZSU1NCZUQxUnEvUlN4YmRScXlocERv?= =?utf-8?B?MERNdXBoR0x3ZWxsQXQ4OHR4Qk8vM29mS0pYQ01MNXp6TU1ScG1lUmdCbldB?= =?utf-8?B?L0FhZGorcXpCZXZHL2FLY0tOaHl0UWtSSnJMbDIvRFdnbk9KbWhLZlFxZmlu?= =?utf-8?B?c0ZvejM3aEVjaEUrazlKOXJQeVB1ZmJ0OUkzMTIrODlqaXZESitHVTdqS3Z4?= =?utf-8?B?aUhBRWlabUFFZE94aDRtQWFwTnIrVlNpRGxLTVR4UmQzSGpDYVJadStqR2ZL?= =?utf-8?B?dlFsTlB1T1poamEzWVE4R1lOSXVEK0Nwc0dKZTdPNlhOK2dzQTZkOU1ZSC83?= =?utf-8?Q?TAk0=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(82310400026)(36860700013)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2025 11:09:22.9943 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70ab15f1-1e4e-4d98-e62a-08de30ca1532 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPFE4FC9FAB3 Add a uma/ directory containing two sysfs files as interfaces to inspect or change UMA carveout size. These files are: - uma/carveout_options: a read-only file listing all the available UMA allocation options and their index. - uma/carveout: a file that is both readable and writable. On read, it shows the index of the current setting. Writing a valid index into this file allows users to change the UMA carveout size to that option on the next boot. Co-developed-by: Mario Limonciello (AMD) Signed-off-by: Mario Limonciello (AMD) Signed-off-by: Yo-Jung Leo Lin (AMD) Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 139 +++++++++++++++++++++++++++= ++++ 1 file changed, 139 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_acpi.c index bce9027fa241..2c0405cdc436 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -30,6 +30,8 @@ #include #include #include +#include +#include #include #include =20 @@ -1246,6 +1248,136 @@ int amdgpu_acpi_get_mem_info(struct amdgpu_device *= adev, int xcc_id, return -ENOENT; } =20 +static ssize_t carveout_options_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct amdgpu_uma_carveout_info *uma_info =3D &amdgpu_acpi_priv.atcs.uma_= info; + uint32_t memory_carved; + ssize_t size =3D 0; + + if (!uma_info || !uma_info->num_entries) + return -ENODEV; + + for (int i =3D 0; i < uma_info->num_entries; i++) { + memory_carved =3D uma_info->entries[i].memory_carved_mb; + if (memory_carved >=3D SZ_1G/SZ_1M) { + size +=3D sysfs_emit_at(buf, size, "%d: %s (%u GB)\n", + i, + uma_info->entries[i].name, + memory_carved >> 10); + } else { + size +=3D sysfs_emit_at(buf, size, "%d: %s (%u MB)\n", + i, + uma_info->entries[i].name, + memory_carved); + } + } + + return size; +} +static DEVICE_ATTR_RO(carveout_options); + +static ssize_t carveout_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sysfs_emit(buf, "%u\n", amdgpu_acpi_priv.atcs.uma_info.uma_option_= index); +} + +static ssize_t carveout_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct amdgpu_uma_carveout_info *uma_info =3D &amdgpu_acpi_priv.atcs.uma_= info; + struct drm_device *ddev =3D dev_get_drvdata(dev); + struct amdgpu_device *adev =3D drm_to_adev(ddev); + struct amdgpu_uma_carveout_option *opt; + unsigned long val; + uint8_t flags; + int r; + + r =3D kstrtoul(buf, 10, &val); + if (r) + return r; + + if (val >=3D uma_info->num_entries) + return -EINVAL; + + val =3D array_index_nospec(val, uma_info->num_entries); + opt =3D &uma_info->entries[val]; + + if (!(opt->flags & AMDGPU_UMA_FLAG_AUTO) && + !(opt->flags & AMDGPU_UMA_FLAG_CUSTOM)) { + drm_err_once(ddev, "Option %lu not supported due to lack of Custom/Auto = flag", val); + return -EINVAL; + } + + flags =3D opt->flags; + flags &=3D ~((flags & AMDGPU_UMA_FLAG_AUTO) >> 1); + + guard(mutex)(&uma_info->update_lock); + + r =3D amdgpu_acpi_set_uma_allocation_size(adev, val, flags); + if (r) + return r; + + uma_info->uma_option_index =3D val; + + return count; +} +static DEVICE_ATTR_RW(carveout); + +static struct attribute *amdgpu_uma_attrs[] =3D { + &dev_attr_carveout.attr, + &dev_attr_carveout_options.attr, + NULL +}; + +const struct attribute_group amdgpu_uma_attr_group =3D { + .name =3D "uma", + .attrs =3D amdgpu_uma_attrs +}; + +static int amdgpu_acpi_uma_option_init(struct amdgpu_device *adev) +{ + struct amdgpu_atcs *atcs =3D &amdgpu_acpi_priv.atcs; + int rc; + + if (!atcs->functions.set_uma_allocation_size) + return -ENODEV; + + rc =3D amdgpu_atomfirmware_get_uma_carveout_info(adev, &atcs->uma_info); + if (rc) { + drm_dbg(adev_to_drm(adev), + "Failed to parse UMA carveout info from VBIOS: %d\n", rc); + goto out_info; + } + + mutex_init(&atcs->uma_info.update_lock); + + rc =3D devm_device_add_group(adev->dev, &amdgpu_uma_attr_group); + if (rc) { + drm_dbg(adev_to_drm(adev), "Failed to add UMA carveout sysfs interfaces = %d\n", rc); + goto out_attr; + } + + return 0; + +out_attr: + mutex_destroy(&atcs->uma_info.update_lock); +out_info: + return rc; +} + +static void amdgpu_acpi_uma_option_fini(void) +{ + struct amdgpu_uma_carveout_info *uma_info =3D &amdgpu_acpi_priv.atcs.uma_= info; + + mutex_destroy(&uma_info->update_lock); + uma_info->num_entries =3D 0; +} + /** * amdgpu_acpi_event - handle notify events * @@ -1290,6 +1422,12 @@ static int amdgpu_acpi_event(struct notifier_block *= nb, int amdgpu_acpi_init(struct amdgpu_device *adev) { struct amdgpu_atif *atif =3D &amdgpu_acpi_priv.atif; + int rc; + + rc =3D amdgpu_acpi_uma_option_init(adev); + + if (rc) + drm_dbg(adev_to_drm(adev), "Not creating uma carveout interfaces: %d", r= c); =20 if (atif->notifications.brightness_change) { if (adev->dc_enabled) { @@ -1342,6 +1480,7 @@ void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_= backlight_caps *caps) void amdgpu_acpi_fini(struct amdgpu_device *adev) { unregister_acpi_notifier(&adev->acpi_nb); + amdgpu_acpi_uma_option_fini(); } =20 /** --=20 2.43.0 From nobody Mon Dec 1 21:30:48 2025 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010033.outbound.protection.outlook.com [52.101.56.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B0B0309F0B; Mon, 1 Dec 2025 11:09:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.56.33 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587374; cv=fail; b=IdP3+U7kshw/d25JYSHkW4a+lVqQdoAB6hPu744xG3BuqDitFWU20FSxC0DsHzaxMNl4xAnbkI/JGLPAWfsWeWugNPedfrXBcE/okkNKcz07ah9tKc51Yb7OKxhZ14lLfoLju4rSvFSdgSLTL5mV/PTCJqmQEIYgBj2NocMCKS8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764587374; c=relaxed/simple; bh=1dyknvfNRj7XyZ+MDBJj4gjpzT8eK3hT2AGYLwc2FYU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=JxlFn+gpru5oqvvT9tUzrpw7x/NZnKsjWkoN019tFi3eMAy4Ztxk8+zrG/HNcLksjWP//ZTROt64079YfqMxZz/mokJeXwXGGWwTFy/Fa6M+TnxynQTuq9io6YrWdO2lAW6+X9JTbAxMiZxMU2ne5YvZm2GAjt9XA03APbvcNU8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=11L+F3x7; arc=fail smtp.client-ip=52.101.56.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="11L+F3x7" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=MPVpZXtW9J6E0AJEYluFREWo+LvBo0Ipcnk685pMrKpDplTmiJxwMwewfhShSov5nucayhjLXSDXUp6yaV7OF3beJa9AwILQCqRruOV1rCf72mCBesKIL2VRP7zVuz02kduQt7avJw8GkgAZ/F/1BjUfowvaqDP32Lxof6Ud4QJ6ErSTbnFQXqihncaOB3SeYFk3xK50pLp+BhBFB9C6VbYjoIMnJVIaWKNF20KRzzGrI7+oCxvIdRpxDdtNN233YGciF5hYXyeVWvYXmtRyT56MvFClM/RyVsYfl91MtYz12tkS08xrQ/8iZNge/8f+6D//otwiXTkPee/BDRRctw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=WDadZeeU4h+LZMTEfBRvDiiivfpW1BKrTwCdBulDkUM=; b=zAbasdNDHbqDG4nt+nzyVx2x5S4+NeMqOJqo12JI6RkIoSdsNxbQepDMX6KMmxsehC07wIRb4C+rHjGFwjx6xUzRV2YSopo9SrAjK5Zf5RCMS8dzI5fympBNWoqvuHvWUsNrV+6VFvnWzLNuW4EE1nAY8DaNZXwYkHlxCI2Nwf7GidlQWHqNm54pT1KCTjefn/V/Vc1p/oboz9tcyGZdBcA4rG1KcJfr+RjIwxGoJHliAd5MPHHLdC1Lyki0t+wJoQn/LYZ2UaYi95e47iLWT/qJ0rdXZAn9TWYGmnuyrTQJg3ubIg4XYnyvDywwmqDNDzhgxTWIyuw0uVPPYRpxaA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WDadZeeU4h+LZMTEfBRvDiiivfpW1BKrTwCdBulDkUM=; b=11L+F3x7+MHfj3lvUm7Z/QRP/LX8PvFa7NtnzRxZOtaOCQb262kWFZ7YyiGSflZY0sNLQEQdaCw9F6/OyaKTTmEDh8OgwLS1nxBIWFHdWGh0GjrlQaDEK0JJmCMF1Y3rLUZwUP7r2KULqyi6rs+zycP/YbhrMW1qS4/f36YiDxo= Received: from MN0P223CA0028.NAMP223.PROD.OUTLOOK.COM (2603:10b6:208:52b::17) by DM6PR12MB4105.namprd12.prod.outlook.com (2603:10b6:5:217::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9366.17; Mon, 1 Dec 2025 11:09:27 +0000 Received: from MN1PEPF0000F0DE.namprd04.prod.outlook.com (2603:10b6:208:52b:cafe::98) by MN0P223CA0028.outlook.office365.com (2603:10b6:208:52b::17) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9366.17 via Frontend Transport; Mon, 1 Dec 2025 11:09:24 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0DE.mail.protection.outlook.com (10.167.242.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9388.8 via Frontend Transport; Mon, 1 Dec 2025 11:09:26 +0000 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 1 Dec 2025 05:09:22 -0600 From: "Yo-Jung Leo Lin (AMD)" Date: Mon, 1 Dec 2025 19:08:13 +0800 Subject: [PATCH v4 5/5] Documentation/amdgpu: Add UMA carveout details Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251201-vram-carveout-tuning-for-upstream-v4-5-9e151363b5ab@amd.com> References: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> In-Reply-To: <20251201-vram-carveout-tuning-for-upstream-v4-0-9e151363b5ab@amd.com> To: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Jonathan Corbet CC: , , , , "Tsao, Anson" , "Mario Limonciello (AMD) (kernel.org)" , "Yo-Jung Leo Lin (AMD)" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3118; i=Leo.Lin@amd.com; h=from:subject:message-id; bh=1dyknvfNRj7XyZ+MDBJj4gjpzT8eK3hT2AGYLwc2FYU=; b=owEBbQKS/ZANAwAKAV8XsZZKKe6GAcsmYgBpLXdQwx3XXOpsBNdpefW/jsfTPnOrUVF+kbFd1 1RPH8EKW3qJAjMEAAEKAB0WIQQzqV4kW+yguuqHrw5fF7GWSinuhgUCaS13UAAKCRBfF7GWSinu hiAsD/9P39HyXZb8vEO7S5RFHX6hoYkyNGid3SLMZKr6u/6qQpRoN5OxeuqK4vDyDl/uvhWefQB Q9mF2Q/1pPo48o3LOeb9L0sq35kTpRilOhh4OS4szAMUBLi0oOG3pFaVN8aIj0J5o14bSrft2nt F9BF0Gk7DNFKtBnRPuumG+NJGiAP1c/eY/sdZ2omwuWMBOBpSpuAB1QcEEyUtKXQmBx9WpWwuZ/ oPCMV4Whnecio3jklNwqQg3H7BhZWLxW9dGhjJ0R9Ab6BE1eVowR+N6BQuPC4PPSorjPYOnFR4W Ah8zuhWx4qiHWSw7Rb5q84vUKqvK6+UA8Da/mHQkmBr0GoGoZ1bbJPVkyKyFUKZo9h5uoBrbsZq ZVsCi4UwBUPrzpngJ80jEntGx5VfFejfrK47sIam6Bfk09D6YPi210fum+wzU7fl7IelfndIACP 18epLsKS6HoQCUQJ0yNKpquzrEn37V1YZKlmkV/fHNi9z5XuDLGvqUb1TVAi9bbkatSoXrEzy4g PIof3MGojIhl9xEr6ochnfS9d/ycrEfor2ZnRa6uLCdVe4FjP0xSz63RD90e4ZF4S5Nxz0IvPZM FYjY04/1htGsJwFOdwfWXqMe9cv5c1CuabBeMQ5t8vnJQhqfZ+c+G8BFkYpDtd614Vg7eJOguIO yZc5FS7lj4ZN98w== X-Developer-Key: i=Leo.Lin@amd.com; a=openpgp; fpr=33A95E245BECA0BAEA87AF0E5F17B1964A29EE86 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0DE:EE_|DM6PR12MB4105:EE_ X-MS-Office365-Filtering-Correlation-Id: 4827690d-8600-41ef-3ef8-08de30ca1772 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?MWxlM3VxT2FaQTFIaTRibHJtV1U1ZGRRU3dmTjQ5eWRQellpVEFhN2ZoTUpN?= =?utf-8?B?K2Q2SWVPMUdEQkJIOWRNaE0vVTd2LzZBOTVnZ3RRemFJZFk2eDZsbDlHcmQy?= =?utf-8?B?eWp6RnVkWjlrdm4wNTMvamhMMjhXOUhWeFp5VGVYTnBwejJRdExxMDgzL2NB?= =?utf-8?B?cDhOOUcxYzVnWE1yWG9oOUxWaUxzKzc5L2ZLYVNzWGpHTVdvZXU2bk1BYlpN?= =?utf-8?B?VnVaUCs3emZjNDZmbkZGQlhvL1ZxcWg5dVEzbitLRnJzb3R2MEhIWmdJeUxL?= =?utf-8?B?TlVyQUE1QlBTT1B1MVNpRDdSdkpuRHAwMkxONnZrQTlJZllJUXdvQyttNllY?= =?utf-8?B?VmFMaTNmRGNrbm54MXhJOVdNeTE2aE51QUMyTEtpeTY3d0lWdUlxL3pLQVRh?= =?utf-8?B?cDN1K2kxK3pzTFJWRll3U3AxRVdKb1NHclp5aHpGZ1cyMS8xM1ZrUEovV2xT?= =?utf-8?B?NXgyU0NuYXJpUDllU0J1bWRpOGNDU1ZjSFhkSkgvbWowdmN1dWI4WkVyNkQ2?= =?utf-8?B?ZmlrZjhTVlVWNDRhSjU3dDFIN1Vub29GL0tkSFdQanlXdkI3V0xYOEV0Tm44?= =?utf-8?B?ZjY5dVRwZng3NC9tSitFY3Y1Vml5NWh0NGk5T1JybXV3NU9MQzBxZ1dUanI5?= =?utf-8?B?RE1KUml2RXZDWWkrUWFEOHFwcUVRVndHZFJMK2dXMUFQdTJmSWkvNzZBZlZt?= =?utf-8?B?NjZVaGJSQ1FCR2t5MDBKZCtISTJOWkxMTUVSRGdZYnZXeWlDQmRmbVRWMU1l?= =?utf-8?B?azdQVXJqVXo1YjZTNHRIRjFLdFJBTWlpRXRNUjM0N09aYkFBTVNpSEduQXFT?= =?utf-8?B?cERKRHdmWkF6eS9Kd3ZQVlh4cnVlR1JyYXVpckloaGF4alVINkZpaHd2bUp0?= =?utf-8?B?SklQam1aZGN5K25nZHNSRDZsSzJadVhCZ2dWUEUxQmEvUXlVSzZoQjE1R01V?= =?utf-8?B?Y2F2SmtWbVNXdlRxdUtla2tHVVJOY2JUUW4vU1FUNFB3TkJIaEpNa05zb2k5?= =?utf-8?B?STV0a1JLZC9Bci9oSTlGRTNuU2tjaWZmSEU1MmdaS0ZlNkxzOFZGSjBWTjAz?= =?utf-8?B?MXVQZDRtT1FlNy80ZVRHc0tNN0VMeW1wTjhMTnZjU0ZhRlFhS2JoS0tIbnRs?= =?utf-8?B?Z2Q0RURSWHhFUUlNVGk0V2xWaCsyMFVac29LbkJPUWU2dUM4VlVBU28ySWZs?= =?utf-8?B?RUZoTnd0TmM0MWR6QTMvTDJMeDV1WFdPUThLWUpZSEp0VVYxOW1EYThibjFi?= =?utf-8?B?SGxjQUYyUzNLbHM4R2dJSXJ3L2NhVDIzMGFlSVdKQVkwUUpLdjRtSkNFUjRn?= =?utf-8?B?NkdrYTZBZ0JPR2thMkd1Z2ZBMy9nQllsU3poRjl6SGMzeGpZVEFNS1FYMUZl?= =?utf-8?B?eDgxL1g2ZFdQSVFFZ2hzcGl5QzVoVGtRNldxUHVEV2N0V2VxMWQ1dWFjUGVJ?= =?utf-8?B?TlRKNDlJSGQ2ZG9yVURid01WTHRRUzg3N0lsVjFEd0lQL0ZmQ3RkR01UM0Fr?= =?utf-8?B?TXh3Zjl2S1Q2UUlQcktQbEd6VFFiN2JXRE5Ka1dDaVR3cHpreDdzMGhpSGRl?= =?utf-8?B?eE00UGU1WTV2VG1qOUVFUzQ5YzZrTlNwTnEzWHdURVk2QUlra3h3cWRiT2Y2?= =?utf-8?B?cmRWa05ybzdKVjhOV3F0dlhxaHBJT3o1STdWa3VCdWtPdlMzcUtVYXJFbFVt?= =?utf-8?B?MElXQTRvakRVbTM3TlFpbitkVU9xdk0vR2FrVDJadW5ZcVNBRnNyVTUzMFVq?= =?utf-8?B?RXV5QUVxZk1kdms4RzFXVmpEVDAxcTNxY1VEVG1DZVJ6dmw3VTFZRlhnMXYw?= =?utf-8?B?ZTB4ZjhiVVFLeG9COTMxZFBGYTVlWjFrYmZyb2RTSk9lVk5DVWxMTHlHaFlS?= =?utf-8?B?NTJ0c3o2dDhFaWtYTytTSTVwMTRGNVdNQkdKUVdyV1Z3bzI1b29ITSt1MDFx?= =?utf-8?B?STRteFRpNkFqMWdCallsWGpjQ2JXUDA0WXIzQ3JSdGc2Q2dkRy9BODV6aUg3?= =?utf-8?B?Q1BQMXBiZ083TFExOTlwcFV1WHZ0VlJrQXRuYzNkU09wRmtONHpRUUF3UHJG?= =?utf-8?B?VWlaRExSdXprNDlqOFRMK3BCZi9OcmFGSlpzaTdWcmJBS25QMDM2dWhKYmdv?= =?utf-8?Q?CBjY=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2025 11:09:26.4873 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4827690d-8600-41ef-3ef8-08de30ca1772 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0DE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4105 Add documentation for the uma/carveout_options and uma/carveout attributes in sysfs Reviewed-by: Mario Limonciello (AMD) Signed-off-by: Yo-Jung Leo Lin (AMD) --- Documentation/gpu/amdgpu/driver-misc.rst | 26 ++++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/Documentation/gpu/amdgpu/driver-misc.rst b/Documentation/gpu/a= mdgpu/driver-misc.rst index 25b0c857816e..cd6f044bea85 100644 --- a/Documentation/gpu/amdgpu/driver-misc.rst +++ b/Documentation/gpu/amdgpu/driver-misc.rst @@ -128,3 +128,29 @@ smartshift_bias =20 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c :doc: smartshift_bias + +UMA Carveout +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Some versions of Atom ROM expose available options for the VRAM carveout s= izes, +and allow changes to the carveout size via the ATCS function code 0xA on s= upported +BIOS implementations. + +For those platforms, users can use the following files under uma/ to set t= he +carveout size, in a way similar to what Windows users can do in the "Tunin= g" +tab in AMD Adrenalin. + +Note that for BIOS implementations that don't support this, these files wi= ll not +be created at all. + +uma/carveout_options +-------------------- + +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c + :doc: uma/carveout_options + +uma/carveout +-------------------- + +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c + :doc: uma/carveout diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd= /amdgpu/amdgpu_acpi.c index 2c0405cdc436..58f6000f4e54 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -1248,6 +1248,24 @@ int amdgpu_acpi_get_mem_info(struct amdgpu_device *a= dev, int xcc_id, return -ENOENT; } =20 +/** + * DOC: uma/carveout_options + * + * This is a read-only file that lists all available UMA allocation + * options and their corresponding indices. Example output:: + * + * $ cat uma/carveout_options + * 0: Minimum (512 MB) + * 1: (1 GB) + * 2: (2 GB) + * 3: (4 GB) + * 4: (6 GB) + * 5: (8 GB) + * 6: (12 GB) + * 7: Medium (16 GB) + * 8: (24 GB) + * 9: High (32 GB) + */ static ssize_t carveout_options_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -1278,6 +1296,17 @@ static ssize_t carveout_options_show(struct device *= dev, } static DEVICE_ATTR_RO(carveout_options); =20 +/** + * DOC: uma/carveout + * + * This file is both readable and writable. When read, it shows the + * index of the current setting. Writing a valid index to this file + * allows users to change the UMA carveout size to the selected option + * on the next boot. + * + * The available options and their corresponding indices can be read + * from the uma/carveout_options file. + */ static ssize_t carveout_show(struct device *dev, struct device_attribute *attr, char *buf) --=20 2.43.0