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[86.162.200.138]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42e1ca4078csm15970060f8f.29.2025.11.29.08.43.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Nov 2025 08:43:34 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , Wolfram Sang , Lad Prabhakar , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das Subject: [PATCH v5 10/17] serial: sh-sci: Add sci_is_rsci_type() Date: Sat, 29 Nov 2025 16:43:06 +0000 Message-ID: <20251129164325.209213-11-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251129164325.209213-1-biju.das.jz@bp.renesas.com> References: <20251129164325.209213-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Add sci_is_rsci_type() for RSCI port type. This will simplify the code when the support added for RSCI_PORT_SCIF32 private PORT type. Reviewed-by: Geert Uytterhoeven Signed-off-by: Biju Das --- v4->v5: * No change. v3->v4: * Collected tag. * Updated commit description. v2->v3: * No change. v1->v2: * No change. --- drivers/tty/serial/sh-sci.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 704f175b14e4..b7fef518a2b8 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -1182,6 +1182,11 @@ static int sci_handle_errors(struct uart_port *port) return copied; } =20 +static bool sci_is_rsci_type(u8 type) +{ + return (type =3D=3D SCI_PORT_RSCI); +} + static int sci_handle_fifo_overrun(struct uart_port *port) { struct tty_port *tport =3D &port->state->port; @@ -1190,7 +1195,7 @@ static int sci_handle_fifo_overrun(struct uart_port *= port) int copied =3D 0; u32 status; =20 - if (s->type !=3D SCI_PORT_RSCI) { + if (!sci_is_rsci_type(s->type)) { reg =3D sci_getreg(port, s->params->overrun_reg); if (!reg->size) return 0; @@ -1198,7 +1203,7 @@ static int sci_handle_fifo_overrun(struct uart_port *= port) =20 status =3D s->ops->read_reg(port, s->params->overrun_reg); if (status & s->params->overrun_mask) { - if (s->type =3D=3D SCI_PORT_RSCI) { + if (sci_is_rsci_type(s->type)) { /* * All of the CFCLR_*C clearing bits match the corresponding * CSR_*status bits. So, reuse the overrun mask for clearing. @@ -2015,7 +2020,7 @@ static irqreturn_t sci_tx_end_interrupt(int irq, void= *ptr) unsigned long flags; u32 ctrl; =20 - if (s->type !=3D PORT_SCI && s->type !=3D SCI_PORT_RSCI) + if (s->type !=3D PORT_SCI && !sci_is_rsci_type(s->type)) return sci_tx_interrupt(irq, ptr); =20 uart_port_lock_irqsave(port, &flags); @@ -3289,7 +3294,7 @@ static int sci_init_single(struct platform_device *de= v, * The fourth interrupt on SCI and RSCI port is transmit end interrupt, so * shuffle the interrupts. */ - if (p->type =3D=3D PORT_SCI || p->type =3D=3D SCI_PORT_RSCI) + if (p->type =3D=3D PORT_SCI || sci_is_rsci_type(p->type)) swap(sci_port->irqs[SCIx_BRI_IRQ], sci_port->irqs[SCIx_TEI_IRQ]); =20 /* The SCI generates several interrupts. They can be muxed together or --=20 2.43.0