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Date: Fri, 28 Nov 2025 18:49:28 +0800 Message-Id: <20251128104928.4070050-7-ziyue.zhang@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251128104928.4070050-1-ziyue.zhang@oss.qualcomm.com> References: <20251128104928.4070050-1-ziyue.zhang@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: flL4tRhcLux7cjxJm0Ij8qCU4twaNGy7 X-Authority-Analysis: v=2.4 cv=UKvQ3Sfy c=1 sm=1 tr=0 ts=69297e42 cx=c_pps a=nuhDOHQX5FNHPW3J6Bj6AA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=OvnWadEJ7cdrETkKXiEA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI4MDA3OCBTYWx0ZWRfX/X+CemgPEDa7 SZDIGSmhMjkMnVFQ4sv5ijTst1G3LGh7/w+e5FHGaJQPzMLm9Qp8/oBi2xo1ynrX/gUmNmr8SyO WWeQx7ngpxYEC5uc0md2c/t+6Elie53toQ3PxgDT11Kh8ONfFR0wTTAmacZ9WAhyRHWj/HTUfm2 oIxnTl4z8rOnDTlTkkzXm3bAHQXCg8ZBZg9A5POLu1tuayiKQjZmCARPwRVGUQ8ceulOwTayVTv 3DC2w4WklO283Xds45QR8ZAA1Y8fNOJ9JitJQZnT/PBs1X2aBLmvsgkhRmskB6keDar/cTLJwxF e4j2RcSB19fmW9gYt+i8QXvu85BmUzcTPjU2jFce5gHV36VHB9Mp/StgypkhaSo/pmmg7wkf7ce Pdo54IIZAJa0lkF4ziI3gBH6Sy5Vhw== X-Proofpoint-ORIG-GUID: flL4tRhcLux7cjxJm0Ij8qCU4twaNGy7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-28_03,2025-11-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511280078 Content-Type: text/plain; charset="utf-8" From: Sushrut Shree Trivedi PCIe0 is routed to an m.2 E key connector on the mainboard for wifi attaches while PCIe1 routes to a standard PCIe x4 expansion slot. Hence, enable the PCIe0 and PCIe1 controller and phy-nodes. Signed-off-by: Sushrut Shree Trivedi Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/monaco-evk.dts | 85 +++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/= qcom/monaco-evk.dts index bb35893da73d..5b9966bd6c3c 100644 --- a/arch/arm64/boot/dts/qcom/monaco-evk.dts +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts @@ -400,6 +400,44 @@ &iris { status =3D "okay"; }; =20 +&pcie0 { + pinctrl-0 =3D <&pcie0_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie0_phy { + vdda-phy-supply =3D <&vreg_l6a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&pcie1 { + pinctrl-0 =3D <&pcie1_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie1_phy { + vdda-phy-supply =3D <&vreg_l6a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&pcieport0 { + reset-gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 0 GPIO_ACTIVE_HIGH>; +}; + +&pcieport1 { + reset-gpios =3D <&tlmm 23 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 21 GPIO_ACTIVE_HIGH>; +}; + &qupv3_id_0 { firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; status =3D "okay"; @@ -435,6 +473,30 @@ &serdes0 { }; =20 &tlmm { + + pcie0_default_state: pcie0-default-state { + wake-pins { + pins =3D "gpio0"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + clkreq-pins { + pins =3D "gpio1"; + function =3D "pcie0_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-pins { + pins =3D "gpio2"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + ethernet0_default: ethernet0-default-state { ethernet0_mdc: ethernet0-mdc-pins { pins =3D "gpio5"; @@ -458,6 +520,29 @@ qup_i2c1_default: qup-i2c1-state { bias-pull-up; }; =20 + pcie1_default_state: pcie1-default-state { + wake-pins { + pins =3D "gpio21"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + clkreq-pins { + pins =3D "gpio22"; + function =3D "pcie1_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-pins { + pins =3D "gpio23"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + qup_i2c15_default: qup-i2c15-state { pins =3D "gpio91", "gpio92"; function =3D "qup1_se7"; --=20 2.34.1