From nobody Mon Dec 1 22:36:50 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7225830C633; Fri, 28 Nov 2025 10:29:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764325763; cv=none; b=axyQMJFuX6qJl+hBQoO4i/VAGEzqhjzAzlQLmumxWf73Kn02fw37S/lCLYWJBwNRiBB+pZBSUzGiw9pX3Xyr/ZA5tdQHEDuI8MBNfi823Lk7XBnEUj5qnQBdyaybIrIwUUHcz9YgpUYQsYVA8rdJSLkR0F4H/W2rfR1cN3yMO+A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764325763; c=relaxed/simple; bh=pe7YMi8OC3yKuQ3LkXUb2inQD2tWKaMwnCP66LSugwo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rcA4vmlBllyM8jcZsN/FEN5f+bGzips0BkTPZH+FMJlKVNQhQKo9T5XeN5txTs5mToiVqzclc4a+q+ocXzQi46FTKaoqYOkU90dYod6Xv9br9XPnzeEHCe7ykI97dxcmoS5h1dSo49dA2FxjJIVX614WchF3nFP1Wg2DewQssGo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WkpmcfUf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WkpmcfUf" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0E8E3C2BC9E; Fri, 28 Nov 2025 10:29:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1764325763; bh=pe7YMi8OC3yKuQ3LkXUb2inQD2tWKaMwnCP66LSugwo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=WkpmcfUf5qU3ZJFDn7CAQXK2ZY7DCjxSF0vLvSk0FgPDoL3Xp6RGU9dcik2mWzMqQ XZ8W9MBfNhtlfQwykUxsgkgsmh/tlqs2SlkrKWYW+j1Ec9Sn5By5ym5cmdzovR3Cfl 8EkqxPi6pm0aczkU3NZRK8Mfvjjn9STIyiNeZoJ3wRQE2kUN5Oog5Rymv/x8nU7P79 9LCAY8EoNVvEwteEFceFj02HBA1qxn7WKeCI0Kn+vY/4JgAftQPdAkUpW0crjwNC1h XBPy1ZP4WUyjEaykVyngtuhNwPrHJ4+ifUGfnG4SPDH5Dmq2QauBQeDPXEOQeTkFsJ B2LQkNjVEocRQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03CFCD116EA; Fri, 28 Nov 2025 10:29:23 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 28 Nov 2025 14:29:18 +0400 Subject: [PATCH v19 6/6] arm64: dts: qcom: ipq9574: add pwm node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251128-ipq-pwm-v19-6-13bc704cc6a5@outlook.com> References: <20251128-ipq-pwm-v19-0-13bc704cc6a5@outlook.com> In-Reply-To: <20251128-ipq-pwm-v19-0-13bc704cc6a5@outlook.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Baruch Siach , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Moussalem , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764325760; l=1234; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=9v7/UevGH2hUC1+SPEdsNKg4jplKvUQ7JbA9V5V+kSc=; b=NOosCxAFNtyHdh0CZXQHfKfcI/2XszvFfKQFo7nkdC6jnoLg4o1FtB4hVem3P5EZGMEwz5dQf 1Uza9u+gHQaDRU17TViI1KBbHu6+42RP25c0lx9nUJyj3NadDr59X8h X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Describe the PWM block on IPQ9574. Although PWM is in the TCSR area, make pwm its own node as simple-mfd has been removed from the bindings and as such hardware components should have its own node. Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qc= om/ipq9574.dtsi index 86c9cb9fffc98fdd1b0b08e81428ce5e7bb87e17..baf165dcb6b1be823332cdfac63= 1eef2633867b4 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -449,6 +449,16 @@ tcsr: syscon@1937000 { reg =3D <0x01937000 0x21000>; }; =20 + pwm: pwm@1941010 { + compatible =3D "qcom,ipq9574-pwm", "qcom,ipq6018-pwm"; + reg =3D <0x01941010 0x20>; + clocks =3D <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks =3D <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates =3D <100000000>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + sdhc_1: mmc@7804000 { compatible =3D "qcom,ipq9574-sdhci", "qcom,sdhci-msm-v5"; reg =3D <0x07804000 0x1000>, --=20 2.52.0