From nobody Mon Dec 1 22:36:56 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46BC430BBB9; Fri, 28 Nov 2025 10:29:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764325763; cv=none; b=gh9T1aemB5mj+lBXozbRvl4WCV9KrjeYYArKOEBnQNkmkAdHr3GXVQMOfZAWWjoUy1o5QximIeDUb8YT0CsblV04yHYBGbYKBf2bvwUqu6dcxu4Lsa4Bn8x/au+Ba7CD3idQt0Agmb1buqfmcsUQGb9jyuRztxEdoXLqbDjECsg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764325763; c=relaxed/simple; bh=D+IYdEf1AAd+os28JYbeyk65ffDrEct65XrzEOazOeg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JkwwnoneRu7XzP/xz5dH+dTzQzdYNsxjGJfWtyeuGskAlPIKlzTrQYBdyl30iZdcQVugRfnZsgHFK9Fcde1Xmb1JysKfexJHt8Jkcbl+aZ2HERHZcRftX+CXPAA1B1SX/BQir6WJJvmQAr5yIBcVLwSdqv4zgsgGiy1MRsUN4EY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kfCJ6MIX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kfCJ6MIX" Received: by smtp.kernel.org (Postfix) with ESMTPS id E27C6C16AAE; Fri, 28 Nov 2025 10:29:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1764325762; bh=D+IYdEf1AAd+os28JYbeyk65ffDrEct65XrzEOazOeg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kfCJ6MIXxh5g3VtiNQKOw8fvi08gnf5I/5fIjhL+oraPORosKHpHMNb9dxy8Tqagp SU/RGYLqNcuu/tDH3VvqzvcEt+Fbos2UE5rUJaO1YZH7ZdyrttrJYIE3edw/wnaQ6v GFUbDt1AttFToxLDdlWcSIPmRdW60Yqj2Os/fhLacGySiSXsjd1SuUZl+U+fmlsKlC rr25yPXOdZdIdQYQaXTa/ksREs5IztwR7lrCRnKMWSZG4ph4uJMQVQBMT3Cr+RsSAL UaCs4aaZ6hv0NSzap9ni3p4VI3lHMoVRrbQvnkM0iNajzYGh26INcK9gxq9wWDWgNh hUKTBn8K6QJ8Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2CCDD116F5; Fri, 28 Nov 2025 10:29:22 +0000 (UTC) From: George Moussalem via B4 Relay Date: Fri, 28 Nov 2025 14:29:16 +0400 Subject: [PATCH v19 4/6] arm64: dts: qcom: ipq5018: add pwm node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251128-ipq-pwm-v19-4-13bc704cc6a5@outlook.com> References: <20251128-ipq-pwm-v19-0-13bc704cc6a5@outlook.com> In-Reply-To: <20251128-ipq-pwm-v19-0-13bc704cc6a5@outlook.com> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Baruch Siach , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Moussalem , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764325760; l=1233; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=6GVkWxkNyxlHL3r1TlaN/60BvZzwHu9RAFHkcBI1mf0=; b=wJJus1uGuxe93ESdWVLFnyIDmj7daYiRdQYKuZw7ulRV4lE9MB2ThNcHwkJJud/jreFF/Lfx8 hu6UZNc47OSCTv0mOqCyJBpC6aYNEfjL2SIe3rQf2w1SfOgNi07Vwgs X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Describe the PWM block on IPQ5018. Although PWM is in the TCSR area, make pwm its own node as simple-mfd has been removed from the bindings and as such hardware components should have its own node. Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index f024b3cba33f6100ac3f4d45598ff2356e026dcf..562e81c2670ce95e306401f4f46= 46fd7f9950fe6 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -453,6 +453,16 @@ tcsr: syscon@1937000 { reg =3D <0x01937000 0x21000>; }; =20 + pwm: pwm@1941010 { + compatible =3D "qcom,ipq5018-pwm", "qcom,ipq6018-pwm"; + reg =3D <0x01941010 0x20>; + clocks =3D <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks =3D <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates =3D <100000000>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + sdhc_1: mmc@7804000 { compatible =3D "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5"; reg =3D <0x7804000 0x1000>; --=20 2.52.0