From nobody Mon Dec 1 22:05:36 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAC11336EC0; Thu, 27 Nov 2025 15:51:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764258676; cv=none; b=TFvrTGxDl8vd12BJLkYSzIw26IqoH80HoTJIggRtvWFeyzdkDSMvnW0BkrfxpK/RmmizbxEt5dv7+RT2Kq2/uUGo+Gp1iHIrWHZoonqeoGCfy0BPafTfcCoOKbVFBNVz8/yVSQv3dt31CBNnJowS91g9AQSXvkXsl4wXcUXivGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764258676; c=relaxed/simple; bh=xGiqlMCpdsnqPrErxLc9KfqZvLM1z7GlOl2Zwze+5go=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CpnllbVI0CfR+/6xSnJbVr9sU7tX8Lac12KbKuquc2gpwyJTiQPFnH5wzEsQ6TJTc+rH4wANIEU//kENSUuuYHLMhMmFACZh4bmAw8hSjWVNg0tIp6kayfISs/OA8SS3vna3hiJocL/Nw5J7mm8vkjqlMmVT/Qomfc5GStq2VyU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id D55B5C116C6; Thu, 27 Nov 2025 15:51:11 +0000 (UTC) From: Huacai Chen To: Huacai Chen Cc: loongarch@lists.linux.dev, Xuefeng Li , Guo Ren , Xuerui Wang , Jiaxun Yang , linux-kernel@vger.kernel.org, Huacai Chen , Arnd Bergmann Subject: [PATCH V4 04/14] LoongArch: Adjust boot & setup for 32BIT/64BIT Date: Thu, 27 Nov 2025 23:48:22 +0800 Message-ID: <20251127154832.137925-5-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251127154832.137925-1-chenhuacai@loongson.cn> References: <20251127154832.137925-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Adjust boot & setup for both 32BIT and 64BIT, including: efi header definition, MAX_IO_PICS definition, kernel entry and environment setup routines, etc. Add a fallback path in fdt_cpu_clk_init() to avoid 0MHz in /proc/cpuinfo if there is no valid clock freq from firmware. Reviewed-by: Arnd Bergmann Signed-off-by: Jiaxun Yang Signed-off-by: Huacai Chen --- arch/loongarch/include/asm/addrspace.h | 2 +- arch/loongarch/include/asm/irq.h | 5 ++++ arch/loongarch/kernel/efi-header.S | 4 +++ arch/loongarch/kernel/efi.c | 4 ++- arch/loongarch/kernel/env.c | 5 +++- arch/loongarch/kernel/head.S | 39 +++++++++++--------------- arch/loongarch/kernel/relocate.c | 9 +++++- 7 files changed, 42 insertions(+), 26 deletions(-) diff --git a/arch/loongarch/include/asm/addrspace.h b/arch/loongarch/includ= e/asm/addrspace.h index e739dbc6329d..9766a100504a 100644 --- a/arch/loongarch/include/asm/addrspace.h +++ b/arch/loongarch/include/asm/addrspace.h @@ -42,7 +42,7 @@ extern unsigned long vm_map_base; #endif =20 #define DMW_PABITS 48 -#define TO_PHYS_MASK ((1ULL << DMW_PABITS) - 1) +#define TO_PHYS_MASK ((_ULL(1) << _ULL(DMW_PABITS)) - 1) =20 /* * Memory above this physical address will be considered highmem. diff --git a/arch/loongarch/include/asm/irq.h b/arch/loongarch/include/asm/= irq.h index 12bd15578c33..cf6c82a9117b 100644 --- a/arch/loongarch/include/asm/irq.h +++ b/arch/loongarch/include/asm/irq.h @@ -53,7 +53,12 @@ void spurious_interrupt(void); #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace void arch_trigger_cpumask_backtrace(const struct cpumask *mask, int exclud= e_cpu); =20 +#ifdef CONFIG_32BIT +#define MAX_IO_PICS 1 +#else #define MAX_IO_PICS 8 +#endif + #define NR_IRQS (64 + NR_VECTORS * (NR_CPUS + MAX_IO_PICS)) =20 struct acpi_vector_group { diff --git a/arch/loongarch/kernel/efi-header.S b/arch/loongarch/kernel/efi= -header.S index ba0bdbf86aa8..6df56241cb95 100644 --- a/arch/loongarch/kernel/efi-header.S +++ b/arch/loongarch/kernel/efi-header.S @@ -9,7 +9,11 @@ .macro __EFI_PE_HEADER .long IMAGE_NT_SIGNATURE .Lcoff_header: +#ifdef CONFIG_32BIT + .short IMAGE_FILE_MACHINE_LOONGARCH32 /* Machine */ +#else .short IMAGE_FILE_MACHINE_LOONGARCH64 /* Machine */ +#endif .short .Lsection_count /* NumberOfSections */ .long 0 /* TimeDateStamp */ .long 0 /* PointerToSymbolTable */ diff --git a/arch/loongarch/kernel/efi.c b/arch/loongarch/kernel/efi.c index 860a3bc030e0..52c21c895318 100644 --- a/arch/loongarch/kernel/efi.c +++ b/arch/loongarch/kernel/efi.c @@ -115,7 +115,9 @@ void __init efi_init(void) =20 efi_systab_report_header(&efi_systab->hdr, efi_systab->fw_vendor); =20 - set_bit(EFI_64BIT, &efi.flags); + if (IS_ENABLED(CONFIG_64BIT)) + set_bit(EFI_64BIT, &efi.flags); + efi_nr_tables =3D efi_systab->nr_tables; efi_config_table =3D (unsigned long)efi_systab->tables; =20 diff --git a/arch/loongarch/kernel/env.c b/arch/loongarch/kernel/env.c index 23bd5ae2212c..841206fde3ab 100644 --- a/arch/loongarch/kernel/env.c +++ b/arch/loongarch/kernel/env.c @@ -72,9 +72,12 @@ static int __init fdt_cpu_clk_init(void) =20 clk =3D of_clk_get(np, 0); of_node_put(np); + cpu_clock_freq =3D 200 * 1000 * 1000; =20 - if (IS_ERR(clk)) + if (IS_ERR(clk)) { + pr_warn("No valid CPU clock freq, assume 200MHz.\n"); return -ENODEV; + } =20 cpu_clock_freq =3D clk_get_rate(clk); clk_put(clk); diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S index e3865e92a917..aba548db2446 100644 --- a/arch/loongarch/kernel/head.S +++ b/arch/loongarch/kernel/head.S @@ -43,36 +43,29 @@ SYM_DATA(kernel_fsize, .long _kernel_fsize); =20 SYM_CODE_START(kernel_entry) # kernel entry point =20 - /* Config direct window and set PG */ - SETUP_DMWINS t0 + SETUP_TWINS + SETUP_MODES t0 JUMP_VIRT_ADDR t0, t1 - - /* Enable PG */ - li.w t0, 0xb0 # PLV=3D0, IE=3D0, PG=3D1 - csrwr t0, LOONGARCH_CSR_CRMD - li.w t0, 0x04 # PLV=3D0, PIE=3D1, PWE=3D0 - csrwr t0, LOONGARCH_CSR_PRMD - li.w t0, 0x00 # FPE=3D0, SXE=3D0, ASXE=3D0, BTE=3D0 - csrwr t0, LOONGARCH_CSR_EUEN + SETUP_DMWINS t0 =20 la.pcrel t0, __bss_start # clear .bss - st.d zero, t0, 0 + LONG_S zero, t0, 0 la.pcrel t1, __bss_stop - LONGSIZE 1: - addi.d t0, t0, LONGSIZE - st.d zero, t0, 0 + PTR_ADDI t0, t0, LONGSIZE + LONG_S zero, t0, 0 bne t0, t1, 1b =20 la.pcrel t0, fw_arg0 - st.d a0, t0, 0 # firmware arguments + PTR_S a0, t0, 0 # firmware arguments la.pcrel t0, fw_arg1 - st.d a1, t0, 0 + PTR_S a1, t0, 0 la.pcrel t0, fw_arg2 - st.d a2, t0, 0 + PTR_S a2, t0, 0 =20 #ifdef CONFIG_PAGE_SIZE_4KB - li.d t0, 0 - li.d t1, CSR_STFILL + LONG_LI t0, 0 + LONG_LI t1, CSR_STFILL csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1 #endif /* KSave3 used for percpu base, initialized as 0 */ @@ -98,7 +91,7 @@ SYM_CODE_START(kernel_entry) # kernel entry point =20 /* Jump to the new kernel: new_pc =3D current_pc + random_offset */ pcaddi t0, 0 - add.d t0, t0, a0 + PTR_ADD t0, t0, a0 jirl zero, t0, 0xc #endif /* CONFIG_RANDOMIZE_BASE */ =20 @@ -121,12 +114,14 @@ SYM_CODE_END(kernel_entry) */ SYM_CODE_START(smpboot_entry) =20 - SETUP_DMWINS t0 + SETUP_TWINS + SETUP_MODES t0 JUMP_VIRT_ADDR t0, t1 + SETUP_DMWINS t0 =20 #ifdef CONFIG_PAGE_SIZE_4KB - li.d t0, 0 - li.d t1, CSR_STFILL + LONG_LI t0, 0 + LONG_LI t1, CSR_STFILL csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1 #endif /* Enable PG */ diff --git a/arch/loongarch/kernel/relocate.c b/arch/loongarch/kernel/reloc= ate.c index 76abbb8d2931..82aa3f035927 100644 --- a/arch/loongarch/kernel/relocate.c +++ b/arch/loongarch/kernel/relocate.c @@ -68,18 +68,25 @@ static inline void __init relocate_absolute(long random= _offset) =20 for (p =3D begin; (void *)p < end; p++) { long v =3D p->symvalue; - uint32_t lu12iw, ori, lu32id, lu52id; + uint32_t lu12iw, ori; +#ifdef CONFIG_64BIT + uint32_t lu32id, lu52id; +#endif union loongarch_instruction *insn =3D (void *)p->pc; =20 lu12iw =3D (v >> 12) & 0xfffff; ori =3D v & 0xfff; +#ifdef CONFIG_64BIT lu32id =3D (v >> 32) & 0xfffff; lu52id =3D v >> 52; +#endif =20 insn[0].reg1i20_format.immediate =3D lu12iw; insn[1].reg2i12_format.immediate =3D ori; +#ifdef CONFIG_64BIT insn[2].reg1i20_format.immediate =3D lu32id; insn[3].reg2i12_format.immediate =3D lu52id; +#endif } } =20 --=20 2.47.3