From nobody Mon Dec 1 22:03:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=1; a=rsa-sha256; t=1764227365; cv=none; d=zohomail.com; s=zohoarc; b=mpygh8wyiN1gVs2u6sBesNPycOsE7nZnX3oHKYe6GTypL6yZ/QjxjB+AxV7TaL871yuWwcTO3HKYaamrSLngFK/ZwNcVrX+tWpkhtCJC2JJCCsY5LcO49P91rbaOIvwnmkm3UpmAckTPxIqJ2JWZzpvNQI21O5hw2+HwiwrUqCQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1764227365; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wid+xJ0/+sd2PFQC3xIhNzsdqCIB2GWUpREB/EeXxr0=; b=TZIa9wPdSjWtopAIsTwZj9J2hrUryQ2RgniD6xN0ehNeOcY3LBBdB5eFqyQ3xStEeKiCIs3lblQKDn1g0GJY62G+e0r4+5DJjv4OL9QH8pgueP/zkCEQoyEb9cNcO/VG8NaVuswoWPXl2qi7d0l3SF8rTd/tPhFUov6F98UpJDI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1764227365782294.1689173230011; Wed, 26 Nov 2025 23:09:25 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1173409.1498453 (Exim 4.92) (envelope-from ) id 1vOW7d-0004Ts-RB; Thu, 27 Nov 2025 07:08:57 +0000 Received: by outflank-mailman (output) from mailman id 1173409.1498453; Thu, 27 Nov 2025 07:08:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW7d-0004Tl-NI; Thu, 27 Nov 2025 07:08:57 +0000 Received: by outflank-mailman (input) for mailman id 1173409; Thu, 27 Nov 2025 07:08:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW7d-0004Ta-2u for xen-devel@lists.xenproject.org; Thu, 27 Nov 2025 07:08:57 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ef8c2952-cb5f-11f0-9d18-b5c5bf9af7f9; Thu, 27 Nov 2025 08:08:55 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 5A75C33695; Thu, 27 Nov 2025 07:08:54 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id B11323EA63; Thu, 27 Nov 2025 07:08:53 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 6VDBKQX5J2ljXAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:08:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ef8c2952-cb5f-11f0-9d18-b5c5bf9af7f9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227334; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wid+xJ0/+sd2PFQC3xIhNzsdqCIB2GWUpREB/EeXxr0=; b=oEVUrTJVVHl1CjcWvaTRtPHtwvupjdnkvTDc8GCJJx+u4H+q+Lw1cJNK99+y/wCGj93tFd xqBni9HzHjFvyB5TxuirK8b6mpTCTYEv28CaztVE3ZIMJAzA4YztvDJKZwyrd0KU18wur9 QsDwA2QsftXB0LXcaIR4rRgTGmU2rw4= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227334; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wid+xJ0/+sd2PFQC3xIhNzsdqCIB2GWUpREB/EeXxr0=; b=oEVUrTJVVHl1CjcWvaTRtPHtwvupjdnkvTDc8GCJJx+u4H+q+Lw1cJNK99+y/wCGj93tFd xqBni9HzHjFvyB5TxuirK8b6mpTCTYEv28CaztVE3ZIMJAzA4YztvDJKZwyrd0KU18wur9 QsDwA2QsftXB0LXcaIR4rRgTGmU2rw4= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org Cc: Juergen Gross , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Peter Zijlstra , Will Deacon , Boqun Feng , Waiman Long , Jiri Kosina , Josh Poimboeuf , Pawan Gupta , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v4 01/21] x86/paravirt: Remove not needed includes of paravirt.h Date: Thu, 27 Nov 2025 08:08:24 +0100 Message-ID: <20251127070844.21919-2-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-1.30 / 50.00]; BAYES_HAM(-3.00)[100.00%]; SUSPICIOUS_RECIPS(1.50)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FREEMAIL_CC(0.00)[suse.com,kernel.org,linutronix.de,redhat.com,alien8.de,linux.intel.com,zytor.com,microsoft.com,infradead.org,gmail.com,oracle.com,lists.xenproject.org]; RCPT_COUNT_TWELVE(0.00)[23]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; TAGGED_RCPT(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[]; TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com] X-Spam-Level: X-Spam-Score: -1.30 X-Spam-Flag: NO X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1764227367404019200 Content-Type: text/plain; charset="utf-8" In some places asm/paravirt.h is included without really being needed. Remove the related #include statements. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- V3: - reinstate the include in mmu_context.h (kernel test robot) V4: - reinstate the include in arch/x86/kernel/x86_init.c (Boris Petkov) --- arch/x86/entry/entry_64.S | 1 - arch/x86/entry/vsyscall/vsyscall_64.c | 1 - arch/x86/hyperv/hv_spinlock.c | 1 - arch/x86/include/asm/apic.h | 4 ---- arch/x86/include/asm/highmem.h | 1 - arch/x86/include/asm/mshyperv.h | 1 - arch/x86/include/asm/pgtable_32.h | 1 - arch/x86/include/asm/spinlock.h | 1 - arch/x86/include/asm/tlbflush.h | 4 ---- arch/x86/kernel/apm_32.c | 1 - arch/x86/kernel/callthunks.c | 1 - arch/x86/kernel/cpu/bugs.c | 1 - arch/x86/kernel/vsmp_64.c | 1 - arch/x86/lib/cache-smp.c | 1 - arch/x86/mm/init.c | 1 - arch/x86/xen/spinlock.c | 1 - 16 files changed, 22 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index ed04a968cc7d..7a82305405af 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscal= l/vsyscall_64.c index 6e6c0a740837..4bd1e271bb22 100644 --- a/arch/x86/entry/vsyscall/vsyscall_64.c +++ b/arch/x86/entry/vsyscall/vsyscall_64.c @@ -37,7 +37,6 @@ #include #include #include -#include =20 #define CREATE_TRACE_POINTS #include "vsyscall_trace.h" diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c index 81b006601370..2a3c2afb0154 100644 --- a/arch/x86/hyperv/hv_spinlock.c +++ b/arch/x86/hyperv/hv_spinlock.c @@ -13,7 +13,6 @@ #include =20 #include -#include #include #include =20 diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index a26e66d66444..9cd493d467d4 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -90,10 +90,6 @@ static inline bool apic_from_smp_config(void) /* * Basic functions accessing APICs. */ -#ifdef CONFIG_PARAVIRT -#include -#endif - static inline void native_apic_mem_write(u32 reg, u32 v) { volatile u32 *addr =3D (volatile u32 *)(APIC_BASE + reg); diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h index 585bdadba47d..decfaaf52326 100644 --- a/arch/x86/include/asm/highmem.h +++ b/arch/x86/include/asm/highmem.h @@ -24,7 +24,6 @@ #include #include #include -#include #include #include =20 diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyper= v.h index 605abd02158d..15e2693b8070 100644 --- a/arch/x86/include/asm/mshyperv.h +++ b/arch/x86/include/asm/mshyperv.h @@ -8,7 +8,6 @@ #include #include #include -#include #include #include =20 diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtab= le_32.h index b612cc57a4d3..acea0cfa2460 100644 --- a/arch/x86/include/asm/pgtable_32.h +++ b/arch/x86/include/asm/pgtable_32.h @@ -16,7 +16,6 @@ #ifndef __ASSEMBLER__ #include #include -#include =20 #include #include diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinloc= k.h index 5b6bc7016c22..934632b78d09 100644 --- a/arch/x86/include/asm/spinlock.h +++ b/arch/x86/include/asm/spinlock.h @@ -7,7 +7,6 @@ #include #include #include -#include #include =20 /* diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflus= h.h index 00daedfefc1b..238a6b807da5 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -300,10 +300,6 @@ static inline void mm_clear_asid_transition(struct mm_= struct *mm) { } static inline bool mm_in_asid_transition(struct mm_struct *mm) { return fa= lse; } #endif /* CONFIG_BROADCAST_TLB_FLUSH */ =20 -#ifdef CONFIG_PARAVIRT -#include -#endif - #define flush_tlb_mm(mm) \ flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL, true) =20 diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index b37ab1095707..3175d7c134e9 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -229,7 +229,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c index a951333c5995..e37728f70322 100644 --- a/arch/x86/kernel/callthunks.c +++ b/arch/x86/kernel/callthunks.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index d7fa03bf51b4..cb200930510e 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c index 73511332bb67..25625e3fc183 100644 --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c @@ -18,7 +18,6 @@ #include #include #include -#include #include =20 #define TOPOLOGY_REGISTER_OFFSET 0x10 diff --git a/arch/x86/lib/cache-smp.c b/arch/x86/lib/cache-smp.c index c5c60d07308c..ae5a5dfd33c7 100644 --- a/arch/x86/lib/cache-smp.c +++ b/arch/x86/lib/cache-smp.c @@ -1,5 +1,4 @@ // SPDX-License-Identifier: GPL-2.0 -#include #include #include =20 diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 8bf6ad4b9400..76537d40493c 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -27,7 +27,6 @@ #include #include #include -#include #include =20 /* diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c index 8e4efe0fb6f9..fe56646d6919 100644 --- a/arch/x86/xen/spinlock.c +++ b/arch/x86/xen/spinlock.c @@ -8,7 +8,6 @@ #include #include =20 -#include #include =20 #include --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DED7314D38 for ; Thu, 27 Nov 2025 07:09:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227344; cv=none; b=VZLg5bsCV2kfZZmyQg3iXzRGGhmaGrnR/qqtRTmehNdgjAQZ/w+YtgnaEhKGRR1PbivkpNDe55V6yuKSO7VCAgcfMNLTPrqcOEYjh+x4Ad3HzraPWQlMuQ1epxkiM56oeb6UJZ7d3DarIc/urA/NP8hAUrZccI5J6Mys3phYQNM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227344; c=relaxed/simple; bh=EVwK7cgAD4yftsEUskdIzczzyyVKRWdVhyNe6sXF1GI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ibycR7oCqA7veaWbL9lhCzVT+x3n+VFDRQ/l6I3zCTDRICxHYo8RV1uyQSYIxyBO1MKlxaRTXf/6BQ2Cg1AUkw+K/O0Ep3sRHD1gO4pR0rjgOUv9+2AWAect/HGttlWz0bDOeQQTV8sY40UdN4TNosN/wYJTrGTND02BGCjqvv4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=a6r1gaGo; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=a6r1gaGo; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="a6r1gaGo"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="a6r1gaGo" Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 2C99C5BCC5; Thu, 27 Nov 2025 07:09:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227340; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8dx21/munhBkELx4QNunXJtxOzoBnIa9bJW/+9o2Lqk=; b=a6r1gaGoI8U9F7UmVD5N5CLcTH9h4oRKPl7HR67hCGhDrTxVkKh4JubwNNfvXCrAMcAV8v PHKnsvhWz1DjM06wU6ZY/0zi3S4F5bRjDFg+ACEiJZ7lkI9ZlyMHETxiPHjBvgNU8/o9Nn 0OF0CUCLX1VO5wDQceSMYzJvuPQbIEs= Authentication-Results: smtp-out2.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=a6r1gaGo DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227340; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8dx21/munhBkELx4QNunXJtxOzoBnIa9bJW/+9o2Lqk=; b=a6r1gaGoI8U9F7UmVD5N5CLcTH9h4oRKPl7HR67hCGhDrTxVkKh4JubwNNfvXCrAMcAV8v PHKnsvhWz1DjM06wU6ZY/0zi3S4F5bRjDFg+ACEiJZ7lkI9ZlyMHETxiPHjBvgNU8/o9Nn 0OF0CUCLX1VO5wDQceSMYzJvuPQbIEs= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id BAF413EA63; Thu, 27 Nov 2025 07:08:59 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id mKAHLAv5J2lnXAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:08:59 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "Peter Zijlstra (Intel)" Subject: [PATCH v4 02/21] x86/paravirt: Remove some unneeded struct declarations Date: Thu, 27 Nov 2025 08:08:25 +0100 Message-ID: <20251127070844.21919-3-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[13]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -3.01 X-Spam-Level: X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Queue-Id: 2C99C5BCC5 Content-Type: text/plain; charset="utf-8" In paravirt_types.h and paravirt.h there are some struct declarations which are not needed. Remove them. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- V2: - remove mm_struct from paravirt.h, too --- arch/x86/include/asm/paravirt.h | 4 ---- arch/x86/include/asm/paravirt_types.h | 6 ------ 2 files changed, 10 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index b5e59a7ba0d0..612b3df65b1b 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -6,10 +6,6 @@ =20 #include =20 -#ifndef __ASSEMBLER__ -struct mm_struct; -#endif - #ifdef CONFIG_PARAVIRT #include #include diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 37a8627d8277..84cc8c95713b 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -11,16 +11,11 @@ #include #include =20 -struct page; struct thread_struct; -struct desc_ptr; -struct tss_struct; struct mm_struct; -struct desc_struct; struct task_struct; struct cpumask; struct flush_tlb_info; -struct mmu_gather; struct vm_area_struct; =20 /* @@ -205,7 +200,6 @@ struct pv_mmu_ops { #endif } __no_randomize_layout; =20 -struct arch_spinlock; #ifdef CONFIG_SMP #include #endif --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8ED41315D4E for ; Thu, 27 Nov 2025 07:09:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227350; cv=none; b=HeP1Raty/aBruasrcvvr6qe81Wj13UMOavn9xqtCSb7EzuYn3PAWU4dOyQuXaUH/lLK0GWdVABOIEPwGMK21nRpmvHBMzTwCIE0fnB7vOCMrXalsONZ3ZosjL9CGbiAMp7LSuFfUFV2QTVzGTE+YnhZEAm7dcAM3nFpH+2T+1aE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227350; c=relaxed/simple; bh=8D6pTZak3Z1jQBaBhx/kipigOtq0lcnvk0bu38nLNMs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tulSzhLczq7pEmm+NcZzeHgd0OCokYBeMiOpNJISd7GJ0uwzZpTlc53RFvSY+hYo+tnSv8P9fvcRAcGcRUZX5kLgKz/y21DNynG1rFWqOT5gILXeGohGizrZTgzx4gVsfv88E0RFwh8Pr1dj5Ppr5onZnV1+lZMRclpWFWd6V1c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=p6/YXdV/; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=p6/YXdV/; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="p6/YXdV/"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="p6/YXdV/" Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 0494D5BCC4; Thu, 27 Nov 2025 07:09:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227346; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ef39VT4vtYrVtOwdPEy2lPrhqcRxm7VrmKcn0eP7rDM=; b=p6/YXdV/+M5/DF/s8Swn6sl0fvoKVD5pbdXGTkU8zzU/94+Fne3UnC4ycxuHcv4cXT57Ml 0MLzVovfK4+4elI9AdbqCUhL1FOrY1wVq70F7mWWC3re0PAE5s8VNnKm2WkF8AtG44r4QN cpZIW1C/IeTM1hl2DewCDWEPslJ9g14= Authentication-Results: smtp-out2.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b="p6/YXdV/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227346; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ef39VT4vtYrVtOwdPEy2lPrhqcRxm7VrmKcn0eP7rDM=; b=p6/YXdV/+M5/DF/s8Swn6sl0fvoKVD5pbdXGTkU8zzU/94+Fne3UnC4ycxuHcv4cXT57Ml 0MLzVovfK4+4elI9AdbqCUhL1FOrY1wVq70F7mWWC3re0PAE5s8VNnKm2WkF8AtG44r4QN cpZIW1C/IeTM1hl2DewCDWEPslJ9g14= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 954463EA63; Thu, 27 Nov 2025 07:09:05 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 1IEAIxH5J2lrXAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:05 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , "Peter Zijlstra (Intel)" Subject: [PATCH v4 03/21] x86/paravirt: Remove PARAVIRT_DEBUG config option Date: Thu, 27 Nov 2025 08:08:26 +0100 Message-ID: <20251127070844.21919-4-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[13]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -3.01 X-Spam-Level: X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Queue-Id: 0494D5BCC4 Content-Type: text/plain; charset="utf-8" The only effect of CONFIG_PARAVIRT_DEBUG set is that instead of doing a call using a NULL pointer a BUG() is being raised. While the BUG() will be a little bit easier to analyse, the call of NULL isn't really that difficult to find the reason for. Remove the config option to make paravirt coding a little bit less annoying. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/Kconfig | 7 ------- arch/x86/include/asm/paravirt.h | 1 - arch/x86/include/asm/paravirt_types.h | 8 -------- 3 files changed, 16 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index fa3b616af03a..aa279fec5c1f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -805,13 +805,6 @@ config PARAVIRT_XXL bool depends on X86_64 =20 -config PARAVIRT_DEBUG - bool "paravirt-ops debugging" - depends on PARAVIRT && DEBUG_KERNEL - help - Enable to debug paravirt_ops internals. Specifically, BUG if - a paravirt_op is missing when it is called. - config PARAVIRT_SPINLOCKS bool "Paravirtualization layer for spinlocks" depends on PARAVIRT && SMP diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 612b3df65b1b..fd9826397419 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -12,7 +12,6 @@ #include =20 #ifndef __ASSEMBLER__ -#include #include #include #include diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 84cc8c95713b..085095f94f97 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -354,12 +354,6 @@ extern struct paravirt_patch_template pv_ops; #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" #endif /* CONFIG_X86_32 */ =20 -#ifdef CONFIG_PARAVIRT_DEBUG -#define PVOP_TEST_NULL(op) BUG_ON(pv_ops.op =3D=3D NULL) -#else -#define PVOP_TEST_NULL(op) ((void)pv_ops.op) -#endif - #define PVOP_RETVAL(rettype) \ ({ unsigned long __mask =3D ~0UL; \ BUILD_BUG_ON(sizeof(rettype) > sizeof(unsigned long)); \ @@ -388,7 +382,6 @@ extern struct paravirt_patch_template pv_ops; #define ____PVOP_CALL(ret, op, call_clbr, extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ - PVOP_TEST_NULL(op); \ asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR, \ ALT_CALL_ALWAYS) \ : call_clbr, ASM_CALL_CONSTRAINT \ @@ -402,7 +395,6 @@ extern struct paravirt_patch_template pv_ops; extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ - PVOP_TEST_NULL(op); \ asm volatile(ALTERNATIVE_2(PARAVIRT_CALL, \ ALT_CALL_INSTR, ALT_CALL_ALWAYS, \ alt, cond) \ --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 761A4314D03 for ; Thu, 27 Nov 2025 07:09:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227356; cv=none; b=JMmgLP/5uE6i9HUwGp3lXl8ah/CXemKhh6vFoUE42ylKzwFNyWwUgCTbzLC8ZW0dssgBPIphZXS4jnS5ejp2GTN5DgdBwD3ZFYGJrHcohoZ7vvjjmwg9I9yg2JJjZqS4/sMlbfnGSGMQH72nVfuE+lbf8yrxYs4kYOQVomGdnFA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227356; c=relaxed/simple; bh=FFf5ymBkot6R4Bde82qyh8L4IBXSB2yHfMrSKI2zgsw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LTeHuP4S6dOCXoWU8zmPTTREcVFjnfcO+zYVzdn4O+6hE/8NvE9/2lROa+656PgJAR1lGGrcdFHLY7EbxnscoBqH8NtqRnyO9kaMyWcyAe/J7zteh6GwkUxf5pLyzJWePbtyNY23DCpKI6Y37eD8V3NYvdz1x4ZKrxUrhkAopO8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id D7EA733691; Thu, 27 Nov 2025 07:09:11 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 6CAC73EA63; Thu, 27 Nov 2025 07:09:11 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id rqX0GBf5J2l1XAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:11 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , "Peter Zijlstra (Intel)" Subject: [PATCH v4 04/21] x86/paravirt: Move thunk macros to paravirt_types.h Date: Thu, 27 Nov 2025 08:08:27 +0100 Message-ID: <20251127070844.21919-5-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: D7EA733691 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" The macros for generating PV-thunks are part of the generic paravirt infrastructure, so they should be in paravirt_types.h. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/paravirt.h | 68 --------------------------- arch/x86/include/asm/paravirt_types.h | 68 +++++++++++++++++++++++++++ 2 files changed, 68 insertions(+), 68 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index fd9826397419..1344d2fb2b86 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -581,74 +581,6 @@ bool __raw_callee_save___native_vcpu_is_preempted(long= cpu); =20 #endif /* SMP && PARAVIRT_SPINLOCKS */ =20 -#ifdef CONFIG_X86_32 -/* save and restore all caller-save registers, except return value */ -#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;" -#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;" -#else -/* save and restore all caller-save registers, except return value */ -#define PV_SAVE_ALL_CALLER_REGS \ - "push %rcx;" \ - "push %rdx;" \ - "push %rsi;" \ - "push %rdi;" \ - "push %r8;" \ - "push %r9;" \ - "push %r10;" \ - "push %r11;" -#define PV_RESTORE_ALL_CALLER_REGS \ - "pop %r11;" \ - "pop %r10;" \ - "pop %r9;" \ - "pop %r8;" \ - "pop %rdi;" \ - "pop %rsi;" \ - "pop %rdx;" \ - "pop %rcx;" -#endif - -/* - * Generate a thunk around a function which saves all caller-save - * registers except for the return value. This allows C functions to - * be called from assembler code where fewer than normal registers are - * available. It may also help code generation around calls from C - * code if the common case doesn't use many registers. - * - * When a callee is wrapped in a thunk, the caller can assume that all - * arg regs and all scratch registers are preserved across the - * call. The return value in rax/eax will not be saved, even for void - * functions. - */ -#define PV_THUNK_NAME(func) "__raw_callee_save_" #func -#define __PV_CALLEE_SAVE_REGS_THUNK(func, section) \ - extern typeof(func) __raw_callee_save_##func; \ - \ - asm(".pushsection " section ", \"ax\";" \ - ".globl " PV_THUNK_NAME(func) ";" \ - ".type " PV_THUNK_NAME(func) ", @function;" \ - ASM_FUNC_ALIGN \ - PV_THUNK_NAME(func) ":" \ - ASM_ENDBR \ - FRAME_BEGIN \ - PV_SAVE_ALL_CALLER_REGS \ - "call " #func ";" \ - PV_RESTORE_ALL_CALLER_REGS \ - FRAME_END \ - ASM_RET \ - ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \ - ".popsection") - -#define PV_CALLEE_SAVE_REGS_THUNK(func) \ - __PV_CALLEE_SAVE_REGS_THUNK(func, ".text") - -/* Get a reference to a callee-save function */ -#define PV_CALLEE_SAVE(func) \ - ((struct paravirt_callee_save) { __raw_callee_save_##func }) - -/* Promise that "func" already uses the right calling convention */ -#define __PV_IS_CALLEE_SAVE(func) \ - ((struct paravirt_callee_save) { func }) - #ifdef CONFIG_PARAVIRT_XXL static __always_inline unsigned long arch_local_save_flags(void) { diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 085095f94f97..7acff40cc159 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -512,5 +512,73 @@ unsigned long pv_native_read_cr2(void); =20 #define ALT_NOT_XEN ALT_NOT(X86_FEATURE_XENPV) =20 +#ifdef CONFIG_X86_32 +/* save and restore all caller-save registers, except return value */ +#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;" +#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;" +#else +/* save and restore all caller-save registers, except return value */ +#define PV_SAVE_ALL_CALLER_REGS \ + "push %rcx;" \ + "push %rdx;" \ + "push %rsi;" \ + "push %rdi;" \ + "push %r8;" \ + "push %r9;" \ + "push %r10;" \ + "push %r11;" +#define PV_RESTORE_ALL_CALLER_REGS \ + "pop %r11;" \ + "pop %r10;" \ + "pop %r9;" \ + "pop %r8;" \ + "pop %rdi;" \ + "pop %rsi;" \ + "pop %rdx;" \ + "pop %rcx;" +#endif + +/* + * Generate a thunk around a function which saves all caller-save + * registers except for the return value. This allows C functions to + * be called from assembler code where fewer than normal registers are + * available. It may also help code generation around calls from C + * code if the common case doesn't use many registers. + * + * When a callee is wrapped in a thunk, the caller can assume that all + * arg regs and all scratch registers are preserved across the + * call. The return value in rax/eax will not be saved, even for void + * functions. + */ +#define PV_THUNK_NAME(func) "__raw_callee_save_" #func +#define __PV_CALLEE_SAVE_REGS_THUNK(func, section) \ + extern typeof(func) __raw_callee_save_##func; \ + \ + asm(".pushsection " section ", \"ax\";" \ + ".globl " PV_THUNK_NAME(func) ";" \ + ".type " PV_THUNK_NAME(func) ", @function;" \ + ASM_FUNC_ALIGN \ + PV_THUNK_NAME(func) ":" \ + ASM_ENDBR \ + FRAME_BEGIN \ + PV_SAVE_ALL_CALLER_REGS \ + "call " #func ";" \ + PV_RESTORE_ALL_CALLER_REGS \ + FRAME_END \ + ASM_RET \ + ".size " PV_THUNK_NAME(func) ", .-" PV_THUNK_NAME(func) ";" \ + ".popsection") + +#define PV_CALLEE_SAVE_REGS_THUNK(func) \ + __PV_CALLEE_SAVE_REGS_THUNK(func, ".text") + +/* Get a reference to a callee-save function */ +#define PV_CALLEE_SAVE(func) \ + ((struct paravirt_callee_save) { __raw_callee_save_##func }) + +/* Promise that "func" already uses the right calling convention */ +#define __PV_IS_CALLEE_SAVE(func) \ + ((struct paravirt_callee_save) { func }) + #endif /* CONFIG_PARAVIRT */ #endif /* _ASM_X86_PARAVIRT_TYPES_H */ --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90D7B314D1F for ; Thu, 27 Nov 2025 07:09:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227362; cv=none; b=PzxOiW/TVoViErEABTT6BdfnPDTvY12hZJHmy+hX4HSLFsd9lntzd/xHbAACnHUzFUxxmGRwE1XPzWLgfF8F/VEWKc9ZennmcKFizeNOSeIu8YSCOhXdIsosupvp/QK1Xn8/hTJ/5TNmXOpnqQRp5b2x5718OBM89+aWAhUBn8Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227362; c=relaxed/simple; bh=PeTZjp4oTq6mRsuNBjWSWUsoczvRYgMh3Gio5/GHNTs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uagVSI+noDlrDvqWhnDlvLMkZL6H8HSuPiR0BaKdV0YlXgnldcy2ys0AfiQWGmZKwDLCXLw9VzvMmRSihr6CNY5OT1HqmOrEFk8M0aq3qFOBLhqQX8fNqVBwns6jcN/sRANWfwh4hrVZIO26tKCtumi9dfMxTc26V0k+g+EozoE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 4206A33693; Thu, 27 Nov 2025 07:09:18 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 353CD3EA63; Thu, 27 Nov 2025 07:09:17 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id EWuXCx35J2l8XAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:17 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Russell King , Catalin Marinas , Will Deacon , Huacai Chen , WANG Xuerui , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , linux-arm-kernel@lists.infradead.org, Shrikanth Hegde Subject: [PATCH v4 05/21] paravirt: Remove asm/paravirt_api_clock.h Date: Thu, 27 Nov 2025 08:08:28 +0100 Message-ID: <20251127070844.21919-6-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 4206A33693 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" All architectures supporting CONFIG_PARAVIRT share the same contents of asm/paravirt_api_clock.h: #include So remove all incarnations of asm/paravirt_api_clock.h and remove the only place where it is included, as there asm/paravirt.h is included anyway. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) Reviewed-by: Shrikanth Hegde # powerpc, scheduler b= its --- arch/arm/include/asm/paravirt_api_clock.h | 1 - arch/arm64/include/asm/paravirt_api_clock.h | 1 - arch/loongarch/include/asm/paravirt_api_clock.h | 1 - arch/powerpc/include/asm/paravirt_api_clock.h | 2 -- arch/riscv/include/asm/paravirt_api_clock.h | 1 - arch/x86/include/asm/paravirt_api_clock.h | 1 - kernel/sched/sched.h | 1 - 7 files changed, 8 deletions(-) delete mode 100644 arch/arm/include/asm/paravirt_api_clock.h delete mode 100644 arch/arm64/include/asm/paravirt_api_clock.h delete mode 100644 arch/loongarch/include/asm/paravirt_api_clock.h delete mode 100644 arch/powerpc/include/asm/paravirt_api_clock.h delete mode 100644 arch/riscv/include/asm/paravirt_api_clock.h delete mode 100644 arch/x86/include/asm/paravirt_api_clock.h diff --git a/arch/arm/include/asm/paravirt_api_clock.h b/arch/arm/include/a= sm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/arm/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/arm64/include/asm/paravirt_api_clock.h b/arch/arm64/inclu= de/asm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/arm64/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/loongarch/include/asm/paravirt_api_clock.h b/arch/loongar= ch/include/asm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/loongarch/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/powerpc/include/asm/paravirt_api_clock.h b/arch/powerpc/i= nclude/asm/paravirt_api_clock.h deleted file mode 100644 index d25ca7ac57c7..000000000000 --- a/arch/powerpc/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#include diff --git a/arch/riscv/include/asm/paravirt_api_clock.h b/arch/riscv/inclu= de/asm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/riscv/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/arch/x86/include/asm/paravirt_api_clock.h b/arch/x86/include/a= sm/paravirt_api_clock.h deleted file mode 100644 index 65ac7cee0dad..000000000000 --- a/arch/x86/include/asm/paravirt_api_clock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index adfb6e3409d7..ccd0d92ff7d1 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -84,7 +84,6 @@ struct cpuidle_state; =20 #ifdef CONFIG_PARAVIRT # include -# include #endif =20 #include --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=quarantine dis=quarantine) header.from=suse.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1764227382240969.5266168806552; Wed, 26 Nov 2025 23:09:42 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1173421.1498471 (Exim 4.92) (envelope-from ) id 1vOW87-0005JL-BH; Thu, 27 Nov 2025 07:09:27 +0000 Received: by outflank-mailman (output) from mailman id 1173421.1498471; Thu, 27 Nov 2025 07:09:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW87-0005JE-8U; Thu, 27 Nov 2025 07:09:27 +0000 Received: by outflank-mailman (input) for mailman id 1173421; Thu, 27 Nov 2025 07:09:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW86-0004Ta-89 for xen-devel@lists.xenproject.org; Thu, 27 Nov 2025 07:09:26 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 01791863-cb60-11f0-9d18-b5c5bf9af7f9; Thu, 27 Nov 2025 08:09:25 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id D97F333691; Thu, 27 Nov 2025 07:09:24 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id B0BB93EA63; Thu, 27 Nov 2025 07:09:23 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id fAinKSP5J2mCXAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 01791863-cb60-11f0-9d18-b5c5bf9af7f9 Authentication-Results: smtp-out1.suse.de; none From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Russell King , Catalin Marinas , Will Deacon , Huacai Chen , WANG Xuerui , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Stefano Stabellini , Oleksandr Tyshchenko , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org Subject: [PATCH v4 06/21] sched: Move clock related paravirt code to kernel/sched Date: Thu, 27 Nov 2025 08:08:29 +0100 Message-ID: <20251127070844.21919-7-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: D97F333691 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-ZM-MESSAGEID: 1764227383834019200 Content-Type: text/plain; charset="utf-8" Paravirt clock related functions are available in multiple archs. In order to share the common parts, move the common static keys to kernel/sched/ and remove them from the arch specific files. Make a common paravirt_steal_clock() implementation available in kernel/sched/cputime.c, guarding it with a new config option CONFIG_HAVE_PV_STEAL_CLOCK_GEN, which can be selected by an arch in case it wants to use that common variant. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/Kconfig | 3 +++ arch/arm/include/asm/paravirt.h | 4 ---- arch/arm/kernel/paravirt.c | 3 --- arch/arm64/include/asm/paravirt.h | 4 ---- arch/arm64/kernel/paravirt.c | 4 +--- arch/loongarch/include/asm/paravirt.h | 3 --- arch/loongarch/kernel/paravirt.c | 3 +-- arch/powerpc/include/asm/paravirt.h | 3 --- arch/powerpc/platforms/pseries/setup.c | 4 +--- arch/riscv/include/asm/paravirt.h | 4 ---- arch/riscv/kernel/paravirt.c | 4 +--- arch/x86/include/asm/paravirt.h | 4 ---- arch/x86/kernel/cpu/vmware.c | 1 + arch/x86/kernel/kvm.c | 1 + arch/x86/kernel/paravirt.c | 3 --- drivers/xen/time.c | 1 + include/linux/sched/cputime.h | 18 ++++++++++++++++++ kernel/sched/core.c | 5 +++++ kernel/sched/cputime.c | 13 +++++++++++++ kernel/sched/sched.h | 2 +- 20 files changed, 47 insertions(+), 40 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 61130b88964b..e3e39c2efa90 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1059,6 +1059,9 @@ config HAVE_IRQ_TIME_ACCOUNTING Archs need to ensure they use a high enough resolution clock to support irq time accounting and then call enable_sched_clock_irqtime(). =20 +config HAVE_PV_STEAL_CLOCK_GEN + bool + config HAVE_MOVE_PUD bool help diff --git a/arch/arm/include/asm/paravirt.h b/arch/arm/include/asm/paravir= t.h index 95d5b0d625cd..69da4bdcf856 100644 --- a/arch/arm/include/asm/paravirt.h +++ b/arch/arm/include/asm/paravirt.h @@ -5,10 +5,6 @@ #ifdef CONFIG_PARAVIRT #include =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 dummy_steal_clock(int cpu); =20 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/arm/kernel/paravirt.c b/arch/arm/kernel/paravirt.c index 7dd9806369fb..3895a5578852 100644 --- a/arch/arm/kernel/paravirt.c +++ b/arch/arm/kernel/paravirt.c @@ -12,9 +12,6 @@ #include #include =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/arch/arm64/include/asm/paravirt.h b/arch/arm64/include/asm/par= avirt.h index 9aa193e0e8f2..c9f7590baacb 100644 --- a/arch/arm64/include/asm/paravirt.h +++ b/arch/arm64/include/asm/paravirt.h @@ -5,10 +5,6 @@ #ifdef CONFIG_PARAVIRT #include =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 dummy_steal_clock(int cpu); =20 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/arm64/kernel/paravirt.c b/arch/arm64/kernel/paravirt.c index aa718d6a9274..943b60ce12f4 100644 --- a/arch/arm64/kernel/paravirt.c +++ b/arch/arm64/kernel/paravirt.c @@ -19,14 +19,12 @@ #include #include #include +#include =20 #include #include #include =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/arch/loongarch/include/asm/paravirt.h b/arch/loongarch/include= /asm/paravirt.h index 3f4323603e6a..d219ea0d98ac 100644 --- a/arch/loongarch/include/asm/paravirt.h +++ b/arch/loongarch/include/asm/paravirt.h @@ -5,9 +5,6 @@ #ifdef CONFIG_PARAVIRT =20 #include -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; =20 u64 dummy_steal_clock(int cpu); DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/loongarch/kernel/paravirt.c b/arch/loongarch/kernel/parav= irt.c index b1b51f920b23..8caaa94fed1a 100644 --- a/arch/loongarch/kernel/paravirt.c +++ b/arch/loongarch/kernel/paravirt.c @@ -6,11 +6,10 @@ #include #include #include +#include #include =20 static int has_steal_clock; -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; static DEFINE_PER_CPU(struct kvm_steal_time, steal_time) __aligned(64); DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); =20 diff --git a/arch/powerpc/include/asm/paravirt.h b/arch/powerpc/include/asm= /paravirt.h index b78b82d66057..92343a23ad15 100644 --- a/arch/powerpc/include/asm/paravirt.h +++ b/arch/powerpc/include/asm/paravirt.h @@ -23,9 +23,6 @@ static inline bool is_shared_processor(void) } =20 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 pseries_paravirt_steal_clock(int cpu); =20 static inline u64 paravirt_steal_clock(int cpu) diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platform= s/pseries/setup.c index b10a25325238..50b26ed8432d 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -42,6 +42,7 @@ #include #include #include +#include =20 #include #include @@ -83,9 +84,6 @@ DEFINE_STATIC_KEY_FALSE(shared_processor); EXPORT_SYMBOL(shared_processor); =20 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static bool steal_acc =3D true; static int __init parse_no_stealacc(char *arg) { diff --git a/arch/riscv/include/asm/paravirt.h b/arch/riscv/include/asm/par= avirt.h index c0abde70fc2c..17e5e39c72c0 100644 --- a/arch/riscv/include/asm/paravirt.h +++ b/arch/riscv/include/asm/paravirt.h @@ -5,10 +5,6 @@ #ifdef CONFIG_PARAVIRT #include =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - u64 dummy_steal_clock(int cpu); =20 DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c index fa6b0339a65d..d3c334f16172 100644 --- a/arch/riscv/kernel/paravirt.c +++ b/arch/riscv/kernel/paravirt.c @@ -16,15 +16,13 @@ #include #include #include +#include =20 #include #include #include #include =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 1344d2fb2b86..0ef797ea8440 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -30,10 +30,6 @@ static __always_inline u64 paravirt_sched_clock(void) return static_call(pv_sched_clock)(); } =20 -struct static_key; -extern struct static_key paravirt_steal_enabled; -extern struct static_key paravirt_steal_rq_enabled; - __visible void __native_queued_spin_unlock(struct qspinlock *lock); bool pv_is_native_spin_unlock(void); __visible bool __native_vcpu_is_preempted(long cpu); diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index cb3f900c46fc..a3e6936839b1 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index b67d7c59dca0..d54fd2bc0402 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index ab3e172dcc69..a3ba4747be1c 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -60,9 +60,6 @@ void __init native_pv_lock_init(void) static_branch_enable(&virt_spin_lock_key); } =20 -struct static_key paravirt_steal_enabled; -struct static_key paravirt_steal_rq_enabled; - static u64 native_steal_clock(int cpu) { return 0; diff --git a/drivers/xen/time.c b/drivers/xen/time.c index 5683383d2305..d360ded2ef39 100644 --- a/drivers/xen/time.c +++ b/drivers/xen/time.c @@ -8,6 +8,7 @@ #include #include #include +#include =20 #include #include diff --git a/include/linux/sched/cputime.h b/include/linux/sched/cputime.h index 5f8fd5b24a2e..e90efaf6d26e 100644 --- a/include/linux/sched/cputime.h +++ b/include/linux/sched/cputime.h @@ -2,6 +2,7 @@ #ifndef _LINUX_SCHED_CPUTIME_H #define _LINUX_SCHED_CPUTIME_H =20 +#include #include =20 /* @@ -180,4 +181,21 @@ static inline void prev_cputime_init(struct prev_cputi= me *prev) extern unsigned long long task_sched_runtime(struct task_struct *task); =20 +#ifdef CONFIG_PARAVIRT +struct static_key; +extern struct static_key paravirt_steal_enabled; +extern struct static_key paravirt_steal_rq_enabled; + +#ifdef CONFIG_HAVE_PV_STEAL_CLOCK_GEN +u64 dummy_steal_clock(int cpu); + +DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); + +static inline u64 paravirt_steal_clock(int cpu) +{ + return static_call(pv_steal_clock)(cpu); +} +#endif +#endif + #endif /* _LINUX_SCHED_CPUTIME_H */ diff --git a/kernel/sched/core.c b/kernel/sched/core.c index f754a60de848..9e7472646233 100644 --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -769,6 +769,11 @@ struct rq *task_rq_lock(struct task_struct *p, struct = rq_flags *rf) * RQ-clock updating methods: */ =20 +/* Use CONFIG_PARAVIRT as this will avoid more #ifdef in arch code. */ +#ifdef CONFIG_PARAVIRT +struct static_key paravirt_steal_rq_enabled; +#endif + static void update_rq_clock_task(struct rq *rq, s64 delta) { /* diff --git a/kernel/sched/cputime.c b/kernel/sched/cputime.c index 7097de2c8cda..ed8f71e08047 100644 --- a/kernel/sched/cputime.c +++ b/kernel/sched/cputime.c @@ -251,6 +251,19 @@ void __account_forceidle_time(struct task_struct *p, u= 64 delta) * ticks are not redelivered later. Due to that, this function may on * occasion account more time than the calling functions think elapsed. */ +#ifdef CONFIG_PARAVIRT +struct static_key paravirt_steal_enabled; + +#ifdef CONFIG_HAVE_PV_STEAL_CLOCK_GEN +static u64 native_steal_clock(int cpu) +{ + return 0; +} + +DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); +#endif +#endif + static __always_inline u64 steal_account_process_time(u64 maxtime) { #ifdef CONFIG_PARAVIRT diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index ccd0d92ff7d1..bd1e5b55ba32 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -82,7 +82,7 @@ struct rt_rq; struct sched_group; struct cpuidle_state; =20 -#ifdef CONFIG_PARAVIRT +#if defined(CONFIG_PARAVIRT) && !defined(CONFIG_HAVE_PV_STEAL_CLOCK_GEN) # include #endif =20 --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76E563161B2 for ; Thu, 27 Nov 2025 07:09:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227378; cv=none; b=MKtkA5TqdIi+Zw8XeIs7or+xwlXsTMX7w888xfy/LxOCIxjMkeYGrDm5bK8DWcDVKNE913x8ZYEUfG/K3lnyBqPNdtZc9PFxOliJz1RPrBxM1j+PCATP1FotZlgTeE/7Pcv/4/U5G01zQodJTTewLFA1IHB1T4It8sr+Q3kO7zw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227378; c=relaxed/simple; bh=fHqm14iYlNovZ6vQyZ22kdXQKopoOJeILLWCCZGGfv8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aVa//Ps9w2+J4AdrdJ/L6uw996E8lCE6O2aCVmN25lpEVNFJVAJgN4YZky59xuVwmg3N9iNHEtsmZ3TRguQ9gfhag2tBSYZm1Cp8+rxAwHAM6ax6EVjGyUzaL4v7BsnDiDOxSRjReWWTlLH8ZmJypww6gRP9BXYe2fHmI9kh8vw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=ao7wIiJn; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=ao7wIiJn; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="ao7wIiJn"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="ao7wIiJn" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id B316333695; Thu, 27 Nov 2025 07:09:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227370; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ShwVu/aGM+otOgaiOO5Lhf110Pxs/+JU1IYdiK72Mko=; b=ao7wIiJnbdf862h4OkyJ/MQsywhD42ZN6tn3rZHugaoN0vm7Tu50h8jzAGg6YtZArS/qr8 nM0CWrdpjO6gI2xp/FnLuC5LTvlRgYuIvz62oC2DvffWzqdpqFmP43C4OZoUWt0OeNjveu bkZz6WSCyofcHpgPykZaqvFP5MRDa8U= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227370; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ShwVu/aGM+otOgaiOO5Lhf110Pxs/+JU1IYdiK72Mko=; b=ao7wIiJnbdf862h4OkyJ/MQsywhD42ZN6tn3rZHugaoN0vm7Tu50h8jzAGg6YtZArS/qr8 nM0CWrdpjO6gI2xp/FnLuC5LTvlRgYuIvz62oC2DvffWzqdpqFmP43C4OZoUWt0OeNjveu bkZz6WSCyofcHpgPykZaqvFP5MRDa8U= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 465513EA65; Thu, 27 Nov 2025 07:09:30 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id MAO1Dyr5J2mXXAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:30 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, virtualization@lists.linux.dev, x86@kernel.org Cc: Juergen Gross , Russell King , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Stefano Stabellini , Oleksandr Tyshchenko , linux-arm-kernel@lists.infradead.org, xen-devel@lists.xenproject.org, "Peter Zijlstra (Intel)" Subject: [PATCH v4 07/21] arm/paravirt: Use common code for paravirt_steal_clock() Date: Thu, 27 Nov 2025 08:08:30 +0100 Message-ID: <20251127070844.21919-8-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCPT_COUNT_TWELVE(0.00)[13]; RCVD_TLS_ALL(0.00)[] X-Spam-Level: X-Spam-Score: -6.80 X-Spam-Flag: NO Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. This allows to remove paravirt.c and paravirt.h from arch/arm. Until all archs supporting Xen have been switched to the common code of paravirt_steal_clock(), drivers/xen/time.c needs to include asm/paravirt.h for those archs, while this is not necessary for arm any longer. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/arm/Kconfig | 1 + arch/arm/include/asm/paravirt.h | 18 ------------------ arch/arm/kernel/Makefile | 1 - arch/arm/kernel/paravirt.c | 20 -------------------- drivers/xen/time.c | 2 ++ 5 files changed, 3 insertions(+), 39 deletions(-) delete mode 100644 arch/arm/include/asm/paravirt.h delete mode 100644 arch/arm/kernel/paravirt.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4fb985b76e97..4a3044acebd6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1322,6 +1322,7 @@ config UACCESS_WITH_MEMCPY =20 config PARAVIRT bool "Enable paravirtualization code" + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/arm/include/asm/paravirt.h b/arch/arm/include/asm/paravir= t.h deleted file mode 100644 index 69da4bdcf856..000000000000 --- a/arch/arm/include/asm/paravirt.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _ASM_ARM_PARAVIRT_H -#define _ASM_ARM_PARAVIRT_H - -#ifdef CONFIG_PARAVIRT -#include - -u64 dummy_steal_clock(int cpu); - -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); - -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} -#endif - -#endif diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index afc9de7ef9a1..b36cf0cfd4a7 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -83,7 +83,6 @@ AFLAGS_iwmmxt.o :=3D -Wa,-mcpu=3Diwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) +=3D topology.o obj-$(CONFIG_VDSO) +=3D vdso.o obj-$(CONFIG_EFI) +=3D efi.o -obj-$(CONFIG_PARAVIRT) +=3D paravirt.o =20 obj-y +=3D head$(MMUEXT).o obj-$(CONFIG_DEBUG_LL) +=3D debug.o diff --git a/arch/arm/kernel/paravirt.c b/arch/arm/kernel/paravirt.c deleted file mode 100644 index 3895a5578852..000000000000 --- a/arch/arm/kernel/paravirt.c +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * - * Copyright (C) 2013 Citrix Systems - * - * Author: Stefano Stabellini - */ - -#include -#include -#include -#include -#include - -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); diff --git a/drivers/xen/time.c b/drivers/xen/time.c index d360ded2ef39..53b12f5ac465 100644 --- a/drivers/xen/time.c +++ b/drivers/xen/time.c @@ -10,7 +10,9 @@ #include #include =20 +#ifndef CONFIG_HAVE_PV_STEAL_CLOCK_GEN #include +#endif #include #include =20 --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C6D6315D4E for ; Thu, 27 Nov 2025 07:09:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227379; cv=none; b=SUOn3XupO79vyldV/XU60qANTmyow8Em7SpTv9JItaTpxuISJWk9tSiB8Q7AxbrsfCzZShSu7bueNz0rzdVLda1bZjmiZSdT+ypQWDclE63ZH/yo2jRy9ZIK0jLmG9K4gGoQqk8qTBzd5EyOcjQwDCw0sp72PrsKsjuVbknej7A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227379; c=relaxed/simple; bh=iPJJu9/xmQLRYwvCeLoXFJ0AbyvghjGCkXNEiSZIKG8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Jc3tOpVwQGYI9/a6/R0+HXIILUa5GCT6aI1E1P2cZGQm2tB+pvHfcu9betyQ1PSgUbanxVJtNIZX/0B6TG+cc+Rz90oKr7Y7cwbrfzXtoh+P2ZqMXMbU0M0nSCElYl3UcwOWRDzSM41ykkbCsdhuIdpMa9LliN0GFhW3ovNMWZA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 6E3405BCC4; Thu, 27 Nov 2025 07:09:36 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 1B2CC3EA63; Thu, 27 Nov 2025 07:09:36 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id rslFBTD5J2njXAAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:36 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, virtualization@lists.linux.dev, x86@kernel.org Cc: Juergen Gross , Catalin Marinas , Will Deacon , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , linux-arm-kernel@lists.infradead.org, "Peter Zijlstra (Intel)" Subject: [PATCH v4 08/21] arm64/paravirt: Use common code for paravirt_steal_clock() Date: Thu, 27 Nov 2025 08:08:31 +0100 Message-ID: <20251127070844.21919-9-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: 6E3405BCC4 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/paravirt.h | 10 ---------- arch/arm64/kernel/paravirt.c | 7 ------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 6663ffd23f25..3a463027538e 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1560,6 +1560,7 @@ config CC_HAVE_SHADOW_CALL_STACK =20 config PARAVIRT bool "Enable paravirtualization code" + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/arm64/include/asm/paravirt.h b/arch/arm64/include/asm/par= avirt.h index c9f7590baacb..cb037e742372 100644 --- a/arch/arm64/include/asm/paravirt.h +++ b/arch/arm64/include/asm/paravirt.h @@ -3,16 +3,6 @@ #define _ASM_ARM64_PARAVIRT_H =20 #ifdef CONFIG_PARAVIRT -#include - -u64 dummy_steal_clock(int cpu); - -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); - -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} =20 int __init pv_time_init(void); =20 diff --git a/arch/arm64/kernel/paravirt.c b/arch/arm64/kernel/paravirt.c index 943b60ce12f4..572efb96b23f 100644 --- a/arch/arm64/kernel/paravirt.c +++ b/arch/arm64/kernel/paravirt.c @@ -25,13 +25,6 @@ #include #include =20 -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); - struct pv_time_stolen_time_region { struct pvclock_vcpu_stolen_time __rcu *kaddr; }; --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEB34318120 for ; Thu, 27 Nov 2025 07:09:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227385; cv=none; b=UOERhwWvuWW14IxK+cx+nEQi3YCdV/uEUjmuHPtcYnz5RoVmpmN6RIk7oW/iIaNl4ObR+OSOzkY1K2/A65XU5WNdRD9JMlkrV9pKfs0qVkJ/wAVli2/n2b+sI/pTzYj0A+qie3OGu1RYCB8cHHlUW1LThshuWmFos4sN/LAb5B0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227385; c=relaxed/simple; bh=XGu6RJs1JFwMPXoCMhGZ7SIVYBnLqGWNO1r5nuF9HsI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iYkG+PM+psTi7SQJJIj/puVouHGprH/5y8GuZtThZFnsRxKvHYBvq7fAb2V7uj3dc8JSYV2XXxkv4Onr1KiAYC8YO5s/fWYG2us3piHeiQbOkhhG3cFkTrfCGEjcHbbqU12tnNNY2s19Z1ENms47ipwgkDhbrZ8JKmjup6rP2Hk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=IWuyTpc0; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=IWuyTpc0; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="IWuyTpc0"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="IWuyTpc0" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 3496D5BCCF; Thu, 27 Nov 2025 07:09:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227382; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cMnh9mLgK/olDi/H2M6R9TAn1UXfgP+pVLdP3+vB540=; b=IWuyTpc0YZw8l4d8NixfhcfUwEzrNpoRiif+QgoK6phlWV8sfxktnjR5lTyK4+e4ZmcgEy 8AdmhDmXOsq81/8e2pwG/WH8EmgqcKmpjOHzGmpoKX8tLxFEPK7LygNWx5k/iWFvcTaH3d NGzVpxDTS+3W+FxWfoEHi3LMXssM1Ck= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227382; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cMnh9mLgK/olDi/H2M6R9TAn1UXfgP+pVLdP3+vB540=; b=IWuyTpc0YZw8l4d8NixfhcfUwEzrNpoRiif+QgoK6phlWV8sfxktnjR5lTyK4+e4ZmcgEy 8AdmhDmXOsq81/8e2pwG/WH8EmgqcKmpjOHzGmpoKX8tLxFEPK7LygNWx5k/iWFvcTaH3d NGzVpxDTS+3W+FxWfoEHi3LMXssM1Ck= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id CF4E03EA63; Thu, 27 Nov 2025 07:09:41 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id LiEmMTX5J2kjXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:41 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, virtualization@lists.linux.dev, x86@kernel.org Cc: Juergen Gross , Huacai Chen , WANG Xuerui , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , "Peter Zijlstra (Intel)" , Bibo Mao Subject: [PATCH v4 09/21] loongarch/paravirt: Use common code for paravirt_steal_clock() Date: Thu, 27 Nov 2025 08:08:32 +0100 Message-ID: <20251127070844.21919-10-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Flag: NO X-Spam-Score: -6.80 X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCPT_COUNT_TWELVE(0.00)[12]; RCVD_TLS_ALL(0.00)[] Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) Reviewed-by: Bibo Mao --- arch/loongarch/Kconfig | 1 + arch/loongarch/include/asm/paravirt.h | 10 ---------- arch/loongarch/kernel/paravirt.c | 7 ------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index 5b1116733d88..030fd487567c 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -682,6 +682,7 @@ source "kernel/livepatch/Kconfig" config PARAVIRT bool "Enable paravirtualization code" depends on AS_HAS_LVZ_EXTENSION + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/loongarch/include/asm/paravirt.h b/arch/loongarch/include= /asm/paravirt.h index d219ea0d98ac..0111f0ad5f73 100644 --- a/arch/loongarch/include/asm/paravirt.h +++ b/arch/loongarch/include/asm/paravirt.h @@ -4,16 +4,6 @@ =20 #ifdef CONFIG_PARAVIRT =20 -#include - -u64 dummy_steal_clock(int cpu); -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); - -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} - int __init pv_ipi_init(void); int __init pv_time_init(void); int __init pv_spinlock_init(void); diff --git a/arch/loongarch/kernel/paravirt.c b/arch/loongarch/kernel/parav= irt.c index 8caaa94fed1a..c5e526098c0b 100644 --- a/arch/loongarch/kernel/paravirt.c +++ b/arch/loongarch/kernel/paravirt.c @@ -13,13 +13,6 @@ static int has_steal_clock; static DEFINE_PER_CPU(struct kvm_steal_time, steal_time) __aligned(64); DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); =20 -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); - static bool steal_acc =3D true; =20 static int __init parse_no_stealacc(char *arg) --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0B15315789 for ; Thu, 27 Nov 2025 07:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227391; cv=none; b=H2HZJoTnQBXWGC3i8wVxO7bsk0gIVWI8/PgJsmj0qqvyDI60lLPegU81bNX4JfWIfJi7sUoHd792GO5XcTkZEmWEq/cw7F+RW86K+IpBaar+BYo0oHs60bGWh62C7unp5oNRUfCRoLXZ1uN9BuOxRiBm6cjqI7YmTzsfkIesnnQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227391; c=relaxed/simple; bh=gKxhS+JP3h2VBoKBSYy1bjyd2nhOnXnwuQXxTsSP2Co=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DxwLuWmBsqtkgtWcBJ5REdCdcOw0G03voF1bmagkLy0RD2Nd5eN5mf1rhw0EHgHItMs1Aj/+iWEqv748Oc3kjzKwnD6vhV3iEm0wF84lgS9hy7XrOlMuGhRY1Uo2tgdk2K+YYDX/mH54tHs5hR2svRuyIJqo+MWl3gYE9R8Ewtc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 092515BCC4; Thu, 27 Nov 2025 07:09:48 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 944343EA63; Thu, 27 Nov 2025 07:09:47 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id KpXDIjv5J2myXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:47 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, virtualization@lists.linux.dev, x86@kernel.org Cc: Juergen Gross , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , "Peter Zijlstra (Intel)" , Andrew Jones Subject: [PATCH v4 10/21] riscv/paravirt: Use common code for paravirt_steal_clock() Date: Thu, 27 Nov 2025 08:08:33 +0100 Message-ID: <20251127070844.21919-11-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: 092515BCC4 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) Reviewed-by: Andrew Jones --- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/paravirt.h | 10 ---------- arch/riscv/kernel/paravirt.c | 7 ------- 3 files changed, 1 insertion(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fadec20b87a8..6455c57e03fb 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -1095,6 +1095,7 @@ config COMPAT config PARAVIRT bool "Enable paravirtualization code" depends on RISCV_SBI + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/riscv/include/asm/paravirt.h b/arch/riscv/include/asm/par= avirt.h index 17e5e39c72c0..c49c55b266f3 100644 --- a/arch/riscv/include/asm/paravirt.h +++ b/arch/riscv/include/asm/paravirt.h @@ -3,16 +3,6 @@ #define _ASM_RISCV_PARAVIRT_H =20 #ifdef CONFIG_PARAVIRT -#include - -u64 dummy_steal_clock(int cpu); - -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); - -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} =20 int __init pv_time_init(void); =20 diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c index d3c334f16172..5f56be79cd06 100644 --- a/arch/riscv/kernel/paravirt.c +++ b/arch/riscv/kernel/paravirt.c @@ -23,13 +23,6 @@ #include #include =20 -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); - static bool steal_acc =3D true; static int __init parse_no_stealacc(char *arg) { --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0B4131B122 for ; Thu, 27 Nov 2025 07:09:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227397; cv=none; b=ZPBFI/LeOUNwxeeVW8I1vQqtJBfME8ebuTWa8QqWFYLAZiAfoXPk8bPFAz3Rc81ugWV1thW94g+kfNgIztFUKfev3Iv9xI/Jw3Ewg0OVshISyLr1GaYJGGAG0DwXWN4b0k6JgaAgyo4x+x/C9zXzE08Pv8ac2Lh+fNeU030LyHs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227397; c=relaxed/simple; bh=olQTDDRgu/oES0/IOqjiS+J2bpUssxet3VCZFZIYXsc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eGXSi7F8B4g3HoE1HlsNx9PAOa3OpaupQe6BFyPd7O5JBI6mkNiRoO2djF+K1qKwcwBvf1Gl6KjY8oL2i9/eXPIpNmkEI5iSu01uyQQkMNzfNMk4nY06EPbvHfV4kzHhjH4deksgmv3Flt+D++mGhGXn7Nn3sLzdZUo/gGrCd30= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=adxYPmzt; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=QRWItfkH; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="adxYPmzt"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="QRWItfkH" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id ED9865BCC5; Thu, 27 Nov 2025 07:09:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227394; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6M6bM/80Dg6ioUTYre1M3KFDk125huuEpn1VJjZjsUQ=; b=adxYPmztj2PaNB6JkvvfsTGvfrQ2IQGSsVX+97EdgQd5Ew6cp77C+Kpycd56qcRkmERaHq Gb63ALjKMRYSLwV79lvAO45+ZYSPGBg5b8RScSVsoFl8XU2Ot5TobevjE45jiPxsvVp+vG 9tg1Rvm+MMapOSIVh2aNKxRuv93+Uuo= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227393; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6M6bM/80Dg6ioUTYre1M3KFDk125huuEpn1VJjZjsUQ=; b=QRWItfkHl6GDwBCNKT9n1AUjpQ9rGuPd+8m7E5Pp+R6cFTwG+PiEBnlC7h/BlxyggzRpNt zPEUtf109xzqFxSf7FM8ife5WF5cH6iTDaZAjKytf7GTAYyUitHMsKR6yTfDSQfkeI+iTH CxIaSrQ8H1L2IHJ1vNXjWVcytwa1Q3s= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 6D0443EA63; Thu, 27 Nov 2025 07:09:53 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id v6URGUH5J2m6XQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:53 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Boris Ostrovsky , Stefano Stabellini , Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, "Peter Zijlstra (Intel)" Subject: [PATCH v4 11/21] x86/paravirt: Use common code for paravirt_steal_clock() Date: Thu, 27 Nov 2025 08:08:34 +0100 Message-ID: <20251127070844.21919-12-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Flag: NO X-Spam-Score: -6.80 X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_TWELVE(0.00)[17]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; TO_DN_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[] Content-Type: text/plain; charset="utf-8" Remove the arch specific variant of paravirt_steal_clock() and use the common one instead. With all archs supporting Xen now having been switched to the common variant, including paravirt.h can be dropped from drivers/xen/time.c. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/Kconfig | 1 + arch/x86/include/asm/paravirt.h | 7 ------- arch/x86/kernel/paravirt.c | 6 ------ arch/x86/xen/time.c | 1 + drivers/xen/time.c | 3 --- 5 files changed, 2 insertions(+), 16 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index aa279fec5c1f..eee6541a5765 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -795,6 +795,7 @@ if HYPERVISOR_GUEST config PARAVIRT bool "Enable paravirtualization code" depends on HAVE_STATIC_CALL + select HAVE_PV_STEAL_CLOCK_GEN help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 0ef797ea8440..766a7cee3d64 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -17,10 +17,8 @@ #include #include =20 -u64 dummy_steal_clock(int cpu); u64 dummy_sched_clock(void); =20 -DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock); =20 void paravirt_set_sched_clock(u64 (*func)(void)); @@ -35,11 +33,6 @@ bool pv_is_native_spin_unlock(void); __visible bool __native_vcpu_is_preempted(long cpu); bool pv_is_native_vcpu_is_preempted(void); =20 -static inline u64 paravirt_steal_clock(int cpu) -{ - return static_call(pv_steal_clock)(cpu); -} - #ifdef CONFIG_PARAVIRT_SPINLOCKS void __init paravirt_set_cap(void); #endif diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index a3ba4747be1c..42991d471bf3 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -60,12 +60,6 @@ void __init native_pv_lock_init(void) static_branch_enable(&virt_spin_lock_key); } =20 -static u64 native_steal_clock(int cpu) -{ - return 0; -} - -DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); =20 void paravirt_set_sched_clock(u64 (*func)(void)) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 96521b1874ac..e4754b2fa900 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include #include diff --git a/drivers/xen/time.c b/drivers/xen/time.c index 53b12f5ac465..0b18d8a5a2dd 100644 --- a/drivers/xen/time.c +++ b/drivers/xen/time.c @@ -10,9 +10,6 @@ #include #include =20 -#ifndef CONFIG_HAVE_PV_STEAL_CLOCK_GEN -#include -#endif #include #include =20 --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=1; a=rsa-sha256; t=1764227419; cv=none; d=zohomail.com; s=zohoarc; b=AoP6iiAfPuwOqxzBY7oDAG/+sGdeZOuLI0x3zdD2WncDPKhlUl6NJUgpISl3t/L5aftOyn9mNinBkTC09veizfTQmrqf2RxJEQqlq/hGuB3KzxRjaO+2Pa3vYkq9vy7k+eV7/SkYviLp0d8QJtfDXJEbo5PRj1WPwyN1yYkw5sk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1764227419; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WLasP3YriVQxy2lyLTd3qvWbSz8xbbix/xncP62Dsck=; b=VdJ2zsKkBp7nUDEhRBJmTUqi9f4PuVekreHzV96CQ+NKDVkvQVejt7/EGKQhzxYalzA/96YAWqOrGYB6re10QJiu/gvAX7Fy5p11BSeCn8H9FKJNbIJDhIphbSSZCCAeBuYQMaA/uxht7Pe7WXvay2sLCV1BQHLjBpn8qI8Gfno= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1764227419028836.5595101995771; Wed, 26 Nov 2025 23:10:19 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1173443.1498491 (Exim 4.92) (envelope-from ) id 1vOW8h-0006yk-Uu; Thu, 27 Nov 2025 07:10:03 +0000 Received: by outflank-mailman (output) from mailman id 1173443.1498491; Thu, 27 Nov 2025 07:10:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW8h-0006y9-SD; Thu, 27 Nov 2025 07:10:03 +0000 Received: by outflank-mailman (input) for mailman id 1173443; Thu, 27 Nov 2025 07:10:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW8g-0004TZ-8U for xen-devel@lists.xenproject.org; Thu, 27 Nov 2025 07:10:02 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1675db7d-cb60-11f0-980a-7dc792cee155; Thu, 27 Nov 2025 08:10:00 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 1B4A433691; Thu, 27 Nov 2025 07:10:00 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 611CB3EA63; Thu, 27 Nov 2025 07:09:59 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id dpI4Fkf5J2nAXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:09:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1675db7d-cb60-11f0-980a-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227400; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WLasP3YriVQxy2lyLTd3qvWbSz8xbbix/xncP62Dsck=; b=qE5psS1/rHm1GUZifBh+SnhvqvrUEY/YuteNJJHprmGbY7vf6EizgAaRNeuzhMFzWvAEfu 4IWqh1TTZNkuZrauFs9XuPellnUOMPkGVa04UCO+ahUREX3kHS8L2nf3hl2LNPAV8eJYJy JFBRHevjZaCQcX52xaOobx9JtUZNkis= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227400; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WLasP3YriVQxy2lyLTd3qvWbSz8xbbix/xncP62Dsck=; b=qE5psS1/rHm1GUZifBh+SnhvqvrUEY/YuteNJJHprmGbY7vf6EizgAaRNeuzhMFzWvAEfu 4IWqh1TTZNkuZrauFs9XuPellnUOMPkGVa04UCO+ahUREX3kHS8L2nf3hl2LNPAV8eJYJy JFBRHevjZaCQcX52xaOobx9JtUZNkis= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Daniel Lezcano , xen-devel@lists.xenproject.org, "Peter Zijlstra (Intel)" Subject: [PATCH v4 12/21] x86/paravirt: Move paravirt_sched_clock() related code into tsc.c Date: Thu, 27 Nov 2025 08:08:35 +0100 Message-ID: <20251127070844.21919-13-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; MIME_TRACE(0.00)[0:+]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[24]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; ARC_NA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_VIA_SMTP_AUTH(0.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[] X-Spam-Level: X-Spam-Score: -6.80 X-Spam-Flag: NO X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1764227420033019200 Content-Type: text/plain; charset="utf-8" The only user of paravirt_sched_clock() is in tsc.c, so move the code from paravirt.c and paravirt.h to tsc.c. Signed-off-by: Juergen Gross Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/paravirt.h | 12 ------------ arch/x86/include/asm/timer.h | 1 + arch/x86/kernel/kvmclock.c | 1 + arch/x86/kernel/paravirt.c | 7 ------- arch/x86/kernel/tsc.c | 10 +++++++++- arch/x86/xen/time.c | 1 + drivers/clocksource/hyperv_timer.c | 2 ++ 7 files changed, 14 insertions(+), 20 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 766a7cee3d64..b69e75a5c872 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -14,20 +14,8 @@ #ifndef __ASSEMBLER__ #include #include -#include #include =20 -u64 dummy_sched_clock(void); - -DECLARE_STATIC_CALL(pv_sched_clock, dummy_sched_clock); - -void paravirt_set_sched_clock(u64 (*func)(void)); - -static __always_inline u64 paravirt_sched_clock(void) -{ - return static_call(pv_sched_clock)(); -} - __visible void __native_queued_spin_unlock(struct qspinlock *lock); bool pv_is_native_spin_unlock(void); __visible bool __native_vcpu_is_preempted(long cpu); diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index 23baf8c9b34c..fda18bcb19b4 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -12,6 +12,7 @@ extern void recalibrate_cpu_khz(void); extern int no_timer_check; =20 extern bool using_native_sched_clock(void); +void paravirt_set_sched_clock(u64 (*func)(void)); =20 /* * We use the full linear equation: f(x) =3D a + b*x, in order to allow diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index ca0a49eeac4a..b5991d53fc0e 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -19,6 +19,7 @@ #include =20 #include +#include #include #include =20 diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 42991d471bf3..4e37db8073f9 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -60,13 +60,6 @@ void __init native_pv_lock_init(void) static_branch_enable(&virt_spin_lock_key); } =20 -DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); - -void paravirt_set_sched_clock(u64 (*func)(void)) -{ - static_call_update(pv_sched_clock, func); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 87e749106dda..554b54783a04 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -266,19 +266,27 @@ u64 native_sched_clock_from_tsc(u64 tsc) /* We need to define a real function for sched_clock, to override the weak default version */ #ifdef CONFIG_PARAVIRT +DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock); + noinstr u64 sched_clock_noinstr(void) { - return paravirt_sched_clock(); + return static_call(pv_sched_clock)(); } =20 bool using_native_sched_clock(void) { return static_call_query(pv_sched_clock) =3D=3D native_sched_clock; } + +void paravirt_set_sched_clock(u64 (*func)(void)) +{ + static_call_update(pv_sched_clock, func); +} #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); =20 bool using_native_sched_clock(void) { return true; } +void paravirt_set_sched_clock(u64 (*func)(void)) { } #endif =20 notrace u64 sched_clock(void) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index e4754b2fa900..6f9f665bb7ae 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -19,6 +19,7 @@ #include =20 #include +#include #include #include #include diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyper= v_timer.c index 10356d4ec55c..e9f5034a1bc8 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -535,6 +535,8 @@ static __always_inline void hv_setup_sched_clock(void *= sched_clock) sched_clock_register(sched_clock, 64, NSEC_PER_SEC); } #elif defined CONFIG_PARAVIRT +#include + static __always_inline void hv_setup_sched_clock(void *sched_clock) { /* We're on x86/x64 *and* using PV ops */ --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAA7531E0F0 for ; Thu, 27 Nov 2025 07:10:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227413; cv=none; b=B2Uzw4pv30Ir/Lc+etv4hdnT/Vs5Z6B8iJdXLPO1tZoRUZcydrv8iEERReIbfrSLCrvJ9z7Wpts3EA5iaQB8hEkRVJR3A3ViLyiT61bPjrfgBT26d+OxAjfDUm6RJCFswR5anNuQtH5DgIq4DhVCYLJi62zEs5U/IzDEvcO2nGM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227413; c=relaxed/simple; bh=nIRySOT2pPuOHT+dnFvmJctkKtXylRy/0jXTsQosxrM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LRvMlBqi6oLmxU6exOfsHE2Uo5Raz6NVjMSQzEoAbeEvTWewN1lTyaG2b/32FwfbYYHLpPRUu7aVbYJvzPdOyhT8q6SA15RnZ1os3YEnvAzsNMcGBxWf2Yd5SXeoxPe6HY6UjN5/UoePV4870k8JtWK0TP9M2ARgI2/yQypcY24= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id DA17633693; Thu, 27 Nov 2025 07:10:05 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 7A22B3EA65; Thu, 27 Nov 2025 07:10:05 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 6UhxHE35J2nSXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:05 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Oleg Nesterov Subject: [PATCH v4 13/21] x86/paravirt: Introduce new paravirt-base.h header Date: Thu, 27 Nov 2025 08:08:36 +0100 Message-ID: <20251127070844.21919-14-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: DA17633693 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" Move the pv_info related definitions and the declarations of the global paravirt function primitives into a new header file paravirt-base.h. This enables to use that header instead of paravirt_types.h in ptrace.h. Additionally it is in preparation of reducing include hell with paravirt enabled. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/include/asm/paravirt-base.h | 29 +++++++++++++++++++++++++++ arch/x86/include/asm/paravirt.h | 4 +++- arch/x86/include/asm/paravirt_types.h | 23 +-------------------- arch/x86/include/asm/ptrace.h | 2 +- 4 files changed, 34 insertions(+), 24 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-base.h diff --git a/arch/x86/include/asm/paravirt-base.h b/arch/x86/include/asm/pa= ravirt-base.h new file mode 100644 index 000000000000..3827ea20de18 --- /dev/null +++ b/arch/x86/include/asm/paravirt-base.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_X86_PARAVIRT_BASE_H +#define _ASM_X86_PARAVIRT_BASE_H + +/* + * Wrapper type for pointers to code which uses the non-standard + * calling convention. See PV_CALL_SAVE_REGS_THUNK below. + */ +struct paravirt_callee_save { + void *func; +}; + +struct pv_info { +#ifdef CONFIG_PARAVIRT_XXL + u16 extra_user_64bit_cs; /* __USER_CS if none */ +#endif + const char *name; +}; + +void default_banner(void); +extern struct pv_info pv_info; +unsigned long paravirt_ret0(void); +#ifdef CONFIG_PARAVIRT_XXL +u64 _paravirt_ident_64(u64); +#endif +#define paravirt_nop ((void *)nop_func) + +#endif /* _ASM_X86_PARAVIRT_BASE_H */ diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index b69e75a5c872..62399f5d037d 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -4,6 +4,9 @@ /* Various instructions on x86 need to be replaced for * para-virtualization: those hooks are defined here. */ =20 +#ifndef __ASSEMBLER__ +#include +#endif #include =20 #ifdef CONFIG_PARAVIRT @@ -601,7 +604,6 @@ static __always_inline unsigned long arch_local_irq_sav= e(void) #undef PVOP_VCALL4 #undef PVOP_CALL4 =20 -extern void default_banner(void); void native_pv_lock_init(void) __init; =20 #else /* __ASSEMBLER__ */ diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 7acff40cc159..148d157e2a4a 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -7,6 +7,7 @@ #ifndef __ASSEMBLER__ #include =20 +#include #include #include #include @@ -18,23 +19,6 @@ struct cpumask; struct flush_tlb_info; struct vm_area_struct; =20 -/* - * Wrapper type for pointers to code which uses the non-standard - * calling convention. See PV_CALL_SAVE_REGS_THUNK below. - */ -struct paravirt_callee_save { - void *func; -}; - -/* general info */ -struct pv_info { -#ifdef CONFIG_PARAVIRT_XXL - u16 extra_user_64bit_cs; /* __USER_CS if none */ -#endif - - const char *name; -}; - #ifdef CONFIG_PARAVIRT_XXL struct pv_lazy_ops { /* Set deferred update mode, used for batching operations. */ @@ -226,7 +210,6 @@ struct paravirt_patch_template { struct pv_lock_ops lock; } __no_randomize_layout; =20 -extern struct pv_info pv_info; extern struct paravirt_patch_template pv_ops; =20 #define paravirt_ptr(op) [paravirt_opptr] "m" (pv_ops.op) @@ -497,17 +480,13 @@ extern struct paravirt_patch_template pv_ops; __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) =20 -unsigned long paravirt_ret0(void); #ifdef CONFIG_PARAVIRT_XXL -u64 _paravirt_ident_64(u64); unsigned long pv_native_save_fl(void); void pv_native_irq_disable(void); void pv_native_irq_enable(void); unsigned long pv_native_read_cr2(void); #endif =20 -#define paravirt_nop ((void *)nop_func) - #endif /* __ASSEMBLER__ */ =20 #define ALT_NOT_XEN ALT_NOT(X86_FEATURE_XENPV) diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index 50f75467f73d..fe2dab7d74e3 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h @@ -172,7 +172,7 @@ struct pt_regs { #endif /* !__i386__ */ =20 #ifdef CONFIG_PARAVIRT -#include +#include #endif =20 #include --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEE64313E2F for ; Thu, 27 Nov 2025 07:10:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227419; cv=none; b=KglnqfRQihpj2nrwuWi/frkbzieR5mZFrVMkGV5zniYDchhLM84gEtMiTV4IGqm1SQlPl+mB/W0UuZWd0SPANLSU5Mdf2asPjWA3UaBKMzMwJoMPNh683DbENHXDa+zYkd8Os5NC4vBZjQOwz+C1r3/LCI2e++qUx/E2NUgJZak= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227419; c=relaxed/simple; bh=KS8fe3tcaEWBMDARocb/nL7jL4ZSZt3fJ4pVwL98WBA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ftc8Dwottlpbs/pnYC49TDhKG2s/satqRvWiUZEhkra4FCZNo8W4U4NbqlyzwkZauUEaXk887x4wE3Td1SrcYOdDgON3RH7G+NNzuqKzaDfmUkrsVw6F2rgeFgdrX6S0OjTVfxO+n4sU7MrG4+xN0vlLW9QccWvNJPgQNLmFrDk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=VjRuhJyH; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=VjRuhJyH; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="VjRuhJyH"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="VjRuhJyH" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id AE2C0336A3; Thu, 27 Nov 2025 07:10:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227411; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NfZM0KCyCe4PB+tPnZRIqKjxT1C+uq5P0n+UToNC19A=; b=VjRuhJyHgyNf/pH+7Gj8ARU3RS6As/1gs8vdqzZYbU6gDm8PyHhBx9etKmy0rW7Mdf+vVf LRww4o65HM2EkkqCiHOd0bJYI+LY5c8EhfcX6L172ny+/bojuw/6UuP1ffecVk9hWn8Uf2 h6rk8zZ7DLj+KAX5ZPLNEdqyVUFJLhU= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227411; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NfZM0KCyCe4PB+tPnZRIqKjxT1C+uq5P0n+UToNC19A=; b=VjRuhJyHgyNf/pH+7Gj8ARU3RS6As/1gs8vdqzZYbU6gDm8PyHhBx9etKmy0rW7Mdf+vVf LRww4o65HM2EkkqCiHOd0bJYI+LY5c8EhfcX6L172ny+/bojuw/6UuP1ffecVk9hWn8Uf2 h6rk8zZ7DLj+KAX5ZPLNEdqyVUFJLhU= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 4C8A23EA63; Thu, 27 Nov 2025 07:10:11 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id byQPEVP5J2nYXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:11 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v4 14/21] x86/paravirt: Move pv_native_*() prototypes to paravirt.c Date: Thu, 27 Nov 2025 08:08:37 +0100 Message-ID: <20251127070844.21919-15-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spam-Flag: NO X-Spam-Score: -6.80 X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; MIME_TRACE(0.00)[0:+]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; ARC_NA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_VIA_SMTP_AUTH(0.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[] Content-Type: text/plain; charset="utf-8" The only reason the pv_native_*() prototypes are needed is the complete definition of those functions via an asm() statement, which makes it impossible to have those functions as static ones. Move the prototypes from paravirt_types.h into paravirt.c, which is the only source referencing the functions. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/include/asm/paravirt_types.h | 7 ------- arch/x86/kernel/paravirt.c | 5 +++++ 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 148d157e2a4a..1e50f13e6543 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -480,13 +480,6 @@ extern struct paravirt_patch_template pv_ops; __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) =20 -#ifdef CONFIG_PARAVIRT_XXL -unsigned long pv_native_save_fl(void); -void pv_native_irq_disable(void); -void pv_native_irq_enable(void); -unsigned long pv_native_read_cr2(void); -#endif - #endif /* __ASSEMBLER__ */ =20 #define ALT_NOT_XEN ALT_NOT(X86_FEATURE_XENPV) diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 4e37db8073f9..5dfbd3f55792 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -45,6 +45,11 @@ void __init default_banner(void) } =20 #ifdef CONFIG_PARAVIRT_XXL +unsigned long pv_native_save_fl(void); +void pv_native_irq_disable(void); +void pv_native_irq_enable(void); +unsigned long pv_native_read_cr2(void); + DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text); DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text); DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text); --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45EB8313542 for ; Thu, 27 Nov 2025 07:10:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227421; cv=none; b=bqXFOH8xC1nOM6Wt1a0mQpOae3zxaKLuPpn63lpZnOBrLhtIW+bOgXV+lKYRY1tAIBPd/KVCJF3ztETVUCqfh7fliDt4kjxRR2/nW7wPbF6TlTUg3rzA0FKc0nBPJRnOhI07MGl+IVMz+d43RwK+QNhrStOtC5F8ATvjIfIPZ/o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227421; c=relaxed/simple; bh=Rjo43mI0vz4cpD9hdnQuX/o0lEl8wBupwIAxIxrncqk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JwUn+LEBqK87KzJ+ZQUe21A4/ItCM4D/Hp1nAll5Sp1HpWYmcCqjMmfFQByDwbRBkWS2JAa0ljuncDwmKZMiPIHqTb40bTbViVcDVSnk1HbdGdJ2R+KIYjqzmnqc8SNzFphAEx2Drrs2i23+k/Mx7yaBdl9XLonAxQ5pJTSSzj8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=gWsIkR9Y; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=gWsIkR9Y; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="gWsIkR9Y"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="gWsIkR9Y" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 748E85BCC4; Thu, 27 Nov 2025 07:10:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227417; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+ZD0gHfZEAZt38+vBUmam6fB85ZjKlj3yVqOSUwfE0Y=; b=gWsIkR9Y7z8FVayWaep4mo1zZytSyxXgt93U6ANX/FSM+kmKiHujplZRaytePOGoCIsy2A wfCpqyYgzoWf7+1PXp9jKgjYTDtbyNBVfpjKAR32x12s5Q8BhAAIqLNM314ZBfbAoy+WA/ N+qRNAh+6SCRHPtzLRxjSWYJ4mW7kiI= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227417; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+ZD0gHfZEAZt38+vBUmam6fB85ZjKlj3yVqOSUwfE0Y=; b=gWsIkR9Y7z8FVayWaep4mo1zZytSyxXgt93U6ANX/FSM+kmKiHujplZRaytePOGoCIsy2A wfCpqyYgzoWf7+1PXp9jKgjYTDtbyNBVfpjKAR32x12s5Q8BhAAIqLNM314ZBfbAoy+WA/ N+qRNAh+6SCRHPtzLRxjSWYJ4mW7kiI= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 1B4313EA63; Thu, 27 Nov 2025 07:10:17 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id Jv5CBVn5J2nlXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:17 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v4 15/21] x86/xen: Drop xen_irq_ops Date: Thu, 27 Nov 2025 08:08:38 +0100 Message-ID: <20251127070844.21919-16-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; MIME_TRACE(0.00)[0:+]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; ARC_NA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_VIA_SMTP_AUTH(0.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[] X-Spam-Level: X-Spam-Score: -6.80 X-Spam-Flag: NO Content-Type: text/plain; charset="utf-8" Instead of having a pre-filled array xen_irq_ops for Xen PV paravirt functions, drop the array and assign each element individually. This is in preparation of reducing the paravirt include hell by splitting paravirt.h into multiple more fine grained header files, which will in turn require to split up the pv_ops vector as well. Dropping the pre-filled array makes life easier for objtool to detect missing initializers in multiple pv_ops_ arrays. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/xen/irq.c | 20 +++++++------------- tools/objtool/check.c | 1 - 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c index 39982f955cfe..d8678c3d3971 100644 --- a/arch/x86/xen/irq.c +++ b/arch/x86/xen/irq.c @@ -40,20 +40,14 @@ static void xen_halt(void) xen_safe_halt(); } =20 -static const typeof(pv_ops) xen_irq_ops __initconst =3D { - .irq =3D { - /* Initial interrupt flag handling only called while interrupts off. */ - .save_fl =3D __PV_IS_CALLEE_SAVE(paravirt_ret0), - .irq_disable =3D __PV_IS_CALLEE_SAVE(paravirt_nop), - .irq_enable =3D __PV_IS_CALLEE_SAVE(BUG_func), - - .safe_halt =3D xen_safe_halt, - .halt =3D xen_halt, - }, -}; - void __init xen_init_irq_ops(void) { - pv_ops.irq =3D xen_irq_ops.irq; + /* Initial interrupt flag handling only called while interrupts off. */ + pv_ops.irq.save_fl =3D __PV_IS_CALLEE_SAVE(paravirt_ret0); + pv_ops.irq.irq_disable =3D __PV_IS_CALLEE_SAVE(paravirt_nop); + pv_ops.irq.irq_enable =3D __PV_IS_CALLEE_SAVE(BUG_func); + pv_ops.irq.safe_halt =3D xen_safe_halt; + pv_ops.irq.halt =3D xen_halt; + x86_init.irqs.intr_init =3D xen_init_IRQ; } diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 9004fbc06769..3fd551c080ee 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -594,7 +594,6 @@ static int init_pv_ops(struct objtool_file *file) static const char *pv_ops_tables[] =3D { "pv_ops", "xen_cpu_ops", - "xen_irq_ops", "xen_mmu_ops", NULL, }; --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=quarantine dis=quarantine) header.from=suse.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1764227437756208.7085776146838; Wed, 26 Nov 2025 23:10:37 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1173451.1498501 (Exim 4.92) (envelope-from ) id 1vOW94-0007su-6J; Thu, 27 Nov 2025 07:10:26 +0000 Received: by outflank-mailman (output) from mailman id 1173451.1498501; Thu, 27 Nov 2025 07:10:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW94-0007sn-3l; Thu, 27 Nov 2025 07:10:26 +0000 Received: by outflank-mailman (input) for mailman id 1173451; Thu, 27 Nov 2025 07:10:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vOW93-0004TZ-9Q for xen-devel@lists.xenproject.org; Thu, 27 Nov 2025 07:10:25 +0000 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 24330961-cb60-11f0-980a-7dc792cee155; Thu, 27 Nov 2025 08:10:23 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 3AF035BCC5; Thu, 27 Nov 2025 07:10:23 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id D29E13EA63; Thu, 27 Nov 2025 07:10:22 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id EzUDMl75J2nvXQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 24330961-cb60-11f0-980a-7dc792cee155 Authentication-Results: smtp-out2.suse.de; none From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v4 16/21] x86/xen: Drop xen_cpu_ops Date: Thu, 27 Nov 2025 08:08:39 +0100 Message-ID: <20251127070844.21919-17-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 3AF035BCC5 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-ZM-MESSAGEID: 1764227439832019200 Content-Type: text/plain; charset="utf-8" Instead of having a pre-filled array xen_cpu_ops for Xen PV paravirt functions, drop the array and assign each element individually. This is in preparation of reducing the paravirt include hell by splitting paravirt.h into multiple more fine grained header files, which will in turn require to split up the pv_ops vector as well. Dropping the pre-filled array makes life easier for objtool to detect missing initializers in multiple pv_ops_ arrays. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/xen/enlighten_pv.c | 82 +++++++++++++++---------------------- tools/objtool/check.c | 1 - 2 files changed, 33 insertions(+), 50 deletions(-) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 4806cc28d7ca..65df3a0d9cf3 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1212,54 +1212,6 @@ static const struct pv_info xen_info __initconst =3D= { .name =3D "Xen", }; =20 -static const typeof(pv_ops) xen_cpu_ops __initconst =3D { - .cpu =3D { - .cpuid =3D xen_cpuid, - - .set_debugreg =3D xen_set_debugreg, - .get_debugreg =3D xen_get_debugreg, - - .read_cr0 =3D xen_read_cr0, - .write_cr0 =3D xen_write_cr0, - - .write_cr4 =3D xen_write_cr4, - - .read_msr =3D xen_read_msr, - .write_msr =3D xen_write_msr, - - .read_msr_safe =3D xen_read_msr_safe, - .write_msr_safe =3D xen_write_msr_safe, - - .read_pmc =3D xen_read_pmc, - - .load_tr_desc =3D paravirt_nop, - .set_ldt =3D xen_set_ldt, - .load_gdt =3D xen_load_gdt, - .load_idt =3D xen_load_idt, - .load_tls =3D xen_load_tls, - .load_gs_index =3D xen_load_gs_index, - - .alloc_ldt =3D xen_alloc_ldt, - .free_ldt =3D xen_free_ldt, - - .store_tr =3D xen_store_tr, - - .write_ldt_entry =3D xen_write_ldt_entry, - .write_gdt_entry =3D xen_write_gdt_entry, - .write_idt_entry =3D xen_write_idt_entry, - .load_sp0 =3D xen_load_sp0, - -#ifdef CONFIG_X86_IOPL_IOPERM - .invalidate_io_bitmap =3D xen_invalidate_io_bitmap, - .update_io_bitmap =3D xen_update_io_bitmap, -#endif - .io_delay =3D xen_io_delay, - - .start_context_switch =3D xen_start_context_switch, - .end_context_switch =3D xen_end_context_switch, - }, -}; - static void xen_restart(char *msg) { xen_reboot(SHUTDOWN_reboot); @@ -1411,7 +1363,39 @@ asmlinkage __visible void __init xen_start_kernel(st= ruct start_info *si) =20 /* Install Xen paravirt ops */ pv_info =3D xen_info; - pv_ops.cpu =3D xen_cpu_ops.cpu; + + pv_ops.cpu.cpuid =3D xen_cpuid; + pv_ops.cpu.set_debugreg =3D xen_set_debugreg; + pv_ops.cpu.get_debugreg =3D xen_get_debugreg; + pv_ops.cpu.read_cr0 =3D xen_read_cr0; + pv_ops.cpu.write_cr0 =3D xen_write_cr0; + pv_ops.cpu.write_cr4 =3D xen_write_cr4; + pv_ops.cpu.read_msr =3D xen_read_msr; + pv_ops.cpu.write_msr =3D xen_write_msr; + pv_ops.cpu.read_msr_safe =3D xen_read_msr_safe; + pv_ops.cpu.write_msr_safe =3D xen_write_msr_safe; + pv_ops.cpu.read_pmc =3D xen_read_pmc; + pv_ops.cpu.load_tr_desc =3D paravirt_nop; + pv_ops.cpu.set_ldt =3D xen_set_ldt; + pv_ops.cpu.load_gdt =3D xen_load_gdt; + pv_ops.cpu.load_idt =3D xen_load_idt; + pv_ops.cpu.load_tls =3D xen_load_tls; + pv_ops.cpu.load_gs_index =3D xen_load_gs_index; + pv_ops.cpu.alloc_ldt =3D xen_alloc_ldt; + pv_ops.cpu.free_ldt =3D xen_free_ldt; + pv_ops.cpu.store_tr =3D xen_store_tr; + pv_ops.cpu.write_ldt_entry =3D xen_write_ldt_entry; + pv_ops.cpu.write_gdt_entry =3D xen_write_gdt_entry; + pv_ops.cpu.write_idt_entry =3D xen_write_idt_entry; + pv_ops.cpu.load_sp0 =3D xen_load_sp0; +#ifdef CONFIG_X86_IOPL_IOPERM + pv_ops.cpu.invalidate_io_bitmap =3D xen_invalidate_io_bitmap; + pv_ops.cpu.update_io_bitmap =3D xen_update_io_bitmap; +#endif + pv_ops.cpu.io_delay =3D xen_io_delay; + pv_ops.cpu.start_context_switch =3D xen_start_context_switch; + pv_ops.cpu.end_context_switch =3D xen_end_context_switch; + xen_init_irq_ops(); =20 /* diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 3fd551c080ee..5c00bca8dc11 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -593,7 +593,6 @@ static int init_pv_ops(struct objtool_file *file) { static const char *pv_ops_tables[] =3D { "pv_ops", - "xen_cpu_ops", "xen_mmu_ops", NULL, }; --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 61032315776 for ; Thu, 27 Nov 2025 07:10:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227436; cv=none; b=tlLo5RWsJT4PdV/l2+6uYSbGCvn9GQ/19NOgmuVFo5qLU0TM/7ctXdCszLHlzBX5hkPyceWIEt2x5oiqYcxr6bs3934du1RBTpmD1zYjwWBJDQ0h97AF/Vjl0XvJa0OoRhJIMdHRF/H8RkzpWM/eOcedyGEKfXu6wIP3qWM6Q+o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227436; c=relaxed/simple; bh=8wKRo+5IRxuIpn3VgUFw1zn03DaM1O2/hfYHdT2dSx0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f2IWMt6ekOpYQiBAD1aSlLqpMMW2Ze3HDi6cXjjZyxRN6K/8yTxlUUyQjCQ3ADR8Woq0i6ByUjTbvI0i52EfdP7ln7W2yitJZ/6HwZUGWp6Mz7ZrPbaNcmbIMhn7mjR0DLTKIVSBJI1dkKME1uRS4NKjoeKP/FFZ6QC0sVQqigg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=oepAybbK; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=oepAybbK; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="oepAybbK"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="oepAybbK" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 103615BCCF; Thu, 27 Nov 2025 07:10:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227429; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tYoBmEPQTBonESeVu5a/+dg+QgALehadLv/nGYQmxpI=; b=oepAybbKYKdhB0gOLKQV94mSJvQF384HqbJpuj53m9i8axqbrVpBfqR8aqxIDUrJd5inhP 9KKvwfHhbzZccPwYB53btnVQoC1ppdeYT32KW0P9DZwLpv9QNf5wRxuw53CzAHoOnBAkbs 802Q90mT6NBXdVFNbgH0qOWO7BpZd8A= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227429; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tYoBmEPQTBonESeVu5a/+dg+QgALehadLv/nGYQmxpI=; b=oepAybbKYKdhB0gOLKQV94mSJvQF384HqbJpuj53m9i8axqbrVpBfqR8aqxIDUrJd5inhP 9KKvwfHhbzZccPwYB53btnVQoC1ppdeYT32KW0P9DZwLpv9QNf5wRxuw53CzAHoOnBAkbs 802Q90mT6NBXdVFNbgH0qOWO7BpZd8A= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id A62DA3EA63; Thu, 27 Nov 2025 07:10:28 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id kGOtJmT5J2n4XQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:28 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v4 17/21] x86/xen: Drop xen_mmu_ops Date: Thu, 27 Nov 2025 08:08:40 +0100 Message-ID: <20251127070844.21919-18-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[12]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Level: X-Spam-Score: -6.80 X-Spam-Flag: NO Content-Type: text/plain; charset="utf-8" Instead of having a pre-filled array xen_mmu_ops for Xen PV paravirt functions, drop the array and assign each element individually. This is in preparation of reducing the paravirt include hell by splitting paravirt.h into multiple more fine grained header files, which will in turn require to split up the pv_ops vector as well. Dropping the pre-filled array makes life easier for objtool to detect missing initializers in multiple pv_ops_ arrays. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/xen/mmu_pv.c | 100 ++++++++++++++++-------------------------- tools/objtool/check.c | 1 - 2 files changed, 38 insertions(+), 63 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 2a4a8deaf612..9fa00c4a8858 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -2175,73 +2175,49 @@ static void xen_leave_lazy_mmu(void) preempt_enable(); } =20 -static const typeof(pv_ops) xen_mmu_ops __initconst =3D { - .mmu =3D { - .read_cr2 =3D __PV_IS_CALLEE_SAVE(xen_read_cr2), - .write_cr2 =3D xen_write_cr2, - - .read_cr3 =3D xen_read_cr3, - .write_cr3 =3D xen_write_cr3_init, - - .flush_tlb_user =3D xen_flush_tlb, - .flush_tlb_kernel =3D xen_flush_tlb, - .flush_tlb_one_user =3D xen_flush_tlb_one_user, - .flush_tlb_multi =3D xen_flush_tlb_multi, - - .pgd_alloc =3D xen_pgd_alloc, - .pgd_free =3D xen_pgd_free, - - .alloc_pte =3D xen_alloc_pte_init, - .release_pte =3D xen_release_pte_init, - .alloc_pmd =3D xen_alloc_pmd_init, - .release_pmd =3D xen_release_pmd_init, - - .set_pte =3D xen_set_pte_init, - .set_pmd =3D xen_set_pmd_hyper, - - .ptep_modify_prot_start =3D xen_ptep_modify_prot_start, - .ptep_modify_prot_commit =3D xen_ptep_modify_prot_commit, - - .pte_val =3D PV_CALLEE_SAVE(xen_pte_val), - .pgd_val =3D PV_CALLEE_SAVE(xen_pgd_val), - - .make_pte =3D PV_CALLEE_SAVE(xen_make_pte_init), - .make_pgd =3D PV_CALLEE_SAVE(xen_make_pgd), - - .set_pud =3D xen_set_pud_hyper, - - .make_pmd =3D PV_CALLEE_SAVE(xen_make_pmd), - .pmd_val =3D PV_CALLEE_SAVE(xen_pmd_val), - - .pud_val =3D PV_CALLEE_SAVE(xen_pud_val), - .make_pud =3D PV_CALLEE_SAVE(xen_make_pud), - .set_p4d =3D xen_set_p4d_hyper, - - .alloc_pud =3D xen_alloc_pmd_init, - .release_pud =3D xen_release_pmd_init, - - .p4d_val =3D PV_CALLEE_SAVE(xen_p4d_val), - .make_p4d =3D PV_CALLEE_SAVE(xen_make_p4d), - - .enter_mmap =3D xen_enter_mmap, - .exit_mmap =3D xen_exit_mmap, - - .lazy_mode =3D { - .enter =3D xen_enter_lazy_mmu, - .leave =3D xen_leave_lazy_mmu, - .flush =3D xen_flush_lazy_mmu, - }, - - .set_fixmap =3D xen_set_fixmap, - }, -}; - void __init xen_init_mmu_ops(void) { x86_init.paging.pagetable_init =3D xen_pagetable_init; x86_init.hyper.init_after_bootmem =3D xen_after_bootmem; =20 - pv_ops.mmu =3D xen_mmu_ops.mmu; + pv_ops.mmu.read_cr2 =3D __PV_IS_CALLEE_SAVE(xen_read_cr2); + pv_ops.mmu.write_cr2 =3D xen_write_cr2; + pv_ops.mmu.read_cr3 =3D xen_read_cr3; + pv_ops.mmu.write_cr3 =3D xen_write_cr3_init; + pv_ops.mmu.flush_tlb_user =3D xen_flush_tlb; + pv_ops.mmu.flush_tlb_kernel =3D xen_flush_tlb; + pv_ops.mmu.flush_tlb_one_user =3D xen_flush_tlb_one_user; + pv_ops.mmu.flush_tlb_multi =3D xen_flush_tlb_multi; + pv_ops.mmu.pgd_alloc =3D xen_pgd_alloc; + pv_ops.mmu.pgd_free =3D xen_pgd_free; + pv_ops.mmu.alloc_pte =3D xen_alloc_pte_init; + pv_ops.mmu.release_pte =3D xen_release_pte_init; + pv_ops.mmu.alloc_pmd =3D xen_alloc_pmd_init; + pv_ops.mmu.release_pmd =3D xen_release_pmd_init; + pv_ops.mmu.set_pte =3D xen_set_pte_init; + pv_ops.mmu.set_pmd =3D xen_set_pmd_hyper; + pv_ops.mmu.ptep_modify_prot_start =3D xen_ptep_modify_prot_start; + pv_ops.mmu.ptep_modify_prot_commit =3D xen_ptep_modify_prot_commit; + pv_ops.mmu.pte_val =3D PV_CALLEE_SAVE(xen_pte_val); + pv_ops.mmu.pgd_val =3D PV_CALLEE_SAVE(xen_pgd_val); + pv_ops.mmu.make_pte =3D PV_CALLEE_SAVE(xen_make_pte_init); + pv_ops.mmu.make_pgd =3D PV_CALLEE_SAVE(xen_make_pgd); + pv_ops.mmu.set_pud =3D xen_set_pud_hyper; + pv_ops.mmu.make_pmd =3D PV_CALLEE_SAVE(xen_make_pmd); + pv_ops.mmu.pmd_val =3D PV_CALLEE_SAVE(xen_pmd_val); + pv_ops.mmu.pud_val =3D PV_CALLEE_SAVE(xen_pud_val); + pv_ops.mmu.make_pud =3D PV_CALLEE_SAVE(xen_make_pud); + pv_ops.mmu.set_p4d =3D xen_set_p4d_hyper; + pv_ops.mmu.alloc_pud =3D xen_alloc_pmd_init; + pv_ops.mmu.release_pud =3D xen_release_pmd_init; + pv_ops.mmu.p4d_val =3D PV_CALLEE_SAVE(xen_p4d_val); + pv_ops.mmu.make_p4d =3D PV_CALLEE_SAVE(xen_make_p4d); + pv_ops.mmu.enter_mmap =3D xen_enter_mmap; + pv_ops.mmu.exit_mmap =3D xen_exit_mmap; + pv_ops.mmu.lazy_mode.enter =3D xen_enter_lazy_mmu; + pv_ops.mmu.lazy_mode.leave =3D xen_leave_lazy_mmu; + pv_ops.mmu.lazy_mode.flush =3D xen_flush_lazy_mmu; + pv_ops.mmu.set_fixmap =3D xen_set_fixmap; =20 memset(dummy_mapping, 0xff, PAGE_SIZE); } diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 5c00bca8dc11..1c73426bea9f 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -593,7 +593,6 @@ static int init_pv_ops(struct objtool_file *file) { static const char *pv_ops_tables[] =3D { "pv_ops", - "xen_mmu_ops", NULL, }; const char *pv_ops; --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20158315D52 for ; Thu, 27 Nov 2025 07:10:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227438; cv=none; b=iMjJvEJREcIEDELkio1Axk2MvVLbSk5NoMkbxKqzxfMnh3vS1lU2XzylnRBaQjmAvAfa+PAr7vWqoMCDBevwavfCle/co8XkHt4QgJpn0UjPLXVlXyPYNH0qCq0c2G0f2OYLOeEsWAOyTsZn9pTKrBBccBZy68B0wA8PUDi/CyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227438; c=relaxed/simple; bh=/rbKwdZjz+c1GS/Jld9qiP/nbQLnVWvI3bsvqUvJltU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fFFS25WcBn+pyC+sH2ePyDu9ONUfn+ei6aaXR8j7n6PH1EnwOzVbHlRUGAzOZOoOR5YYQ3BYcRiUrHSiotf+U+55SI15bYm1KrEbnU9OAolpEVkdss02PJXgm92UmkVU6ZfO5p8e+yiJ2xxdfgxgOv/BA91bzilTzfE1S3+TWrQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id AB44D33693; Thu, 27 Nov 2025 07:10:34 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 7D1783EA63; Thu, 27 Nov 2025 07:10:34 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 1+/YHGr5J2n8XQAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:34 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org Cc: Juergen Gross , Josh Poimboeuf , Peter Zijlstra Subject: [PATCH v4 18/21] objtool: Allow multiple pv_ops arrays Date: Thu, 27 Nov 2025 08:08:41 +0100 Message-ID: <20251127070844.21919-19-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: AB44D33693 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" Having a single large pv_ops array has the main disadvantage of needing all prototypes of the single array members in one header file. This is adding up to the need to include lots of otherwise unrelated headers. In order to allow multiple smaller pv_ops arrays dedicated to one area of the kernel each, allow multiple arrays in objtool. For better performance limit the possible names of the arrays to start with "pv_ops". Signed-off-by: Juergen Gross --- V2: - new patch --- tools/objtool/arch/x86/decode.c | 8 ++- tools/objtool/check.c | 74 +++++++++++++++++++++------ tools/objtool/include/objtool/check.h | 2 + 3 files changed, 66 insertions(+), 18 deletions(-) diff --git a/tools/objtool/arch/x86/decode.c b/tools/objtool/arch/x86/decod= e.c index 0ad5cc70ecbe..d253148edc6a 100644 --- a/tools/objtool/arch/x86/decode.c +++ b/tools/objtool/arch/x86/decode.c @@ -649,10 +649,14 @@ int arch_decode_instruction(struct objtool_file *file= , const struct section *sec immr =3D find_reloc_by_dest(elf, (void *)sec, offset+3); disp =3D find_reloc_by_dest(elf, (void *)sec, offset+7); =20 - if (!immr || strcmp(immr->sym->name, "pv_ops")) + if (!immr || strncmp(immr->sym->name, "pv_ops", 6)) break; =20 - idx =3D (reloc_addend(immr) + 8) / sizeof(void *); + idx =3D pv_ops_idx_off(immr->sym->name); + if (idx < 0) + break; + + idx +=3D (reloc_addend(immr) + 8) / sizeof(void *); =20 func =3D disp->sym; if (disp->sym->type =3D=3D STT_SECTION) diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 1c73426bea9f..d63d0891924a 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -543,21 +543,57 @@ static int decode_instructions(struct objtool_file *f= ile) } =20 /* - * Read the pv_ops[] .data table to find the static initialized values. + * Known pv_ops*[] arrays. */ -static int add_pv_ops(struct objtool_file *file, const char *symname) +static struct { + const char *name; + int idx_off; +} pv_ops_tables[] =3D { + { .name =3D "pv_ops", }, + { .name =3D NULL, .idx_off =3D -1 } +}; + +/* + * Get index offset for a pv_ops* array. + */ +int pv_ops_idx_off(const char *symname) +{ + int idx; + + for (idx =3D 0; pv_ops_tables[idx].name; idx++) { + if (!strcmp(symname, pv_ops_tables[idx].name)) + break; + } + + return pv_ops_tables[idx].idx_off; +} + +/* + * Read a pv_ops*[] .data table to find the static initialized values. + */ +static int add_pv_ops(struct objtool_file *file, int pv_ops_idx) { struct symbol *sym, *func; unsigned long off, end; struct reloc *reloc; - int idx; + int idx, idx_off; + const char *symname; =20 + symname =3D pv_ops_tables[pv_ops_idx].name; sym =3D find_symbol_by_name(file->elf, symname); - if (!sym) - return 0; + if (!sym) { + ERROR("Unknown pv_ops array %s", symname); + return -1; + } =20 off =3D sym->offset; end =3D off + sym->len; + idx_off =3D pv_ops_tables[pv_ops_idx].idx_off; + if (idx_off < 0) { + ERROR("pv_ops array %s has unknown index offset", symname); + return -1; + } + for (;;) { reloc =3D find_reloc_by_dest_range(file->elf, sym->sec, off, end - off); if (!reloc) @@ -575,7 +611,7 @@ static int add_pv_ops(struct objtool_file *file, const = char *symname) return -1; } =20 - if (objtool_pv_add(file, idx, func)) + if (objtool_pv_add(file, idx + idx_off, func)) return -1; =20 off =3D reloc_offset(reloc) + 1; @@ -591,11 +627,6 @@ static int add_pv_ops(struct objtool_file *file, const= char *symname) */ static int init_pv_ops(struct objtool_file *file) { - static const char *pv_ops_tables[] =3D { - "pv_ops", - NULL, - }; - const char *pv_ops; struct symbol *sym; int idx, nr, ret; =20 @@ -604,11 +635,20 @@ static int init_pv_ops(struct objtool_file *file) =20 file->pv_ops =3D NULL; =20 - sym =3D find_symbol_by_name(file->elf, "pv_ops"); - if (!sym) + nr =3D 0; + for (idx =3D 0; pv_ops_tables[idx].name; idx++) { + sym =3D find_symbol_by_name(file->elf, pv_ops_tables[idx].name); + if (!sym) { + pv_ops_tables[idx].idx_off =3D -1; + continue; + } + pv_ops_tables[idx].idx_off =3D nr; + nr +=3D sym->len / sizeof(unsigned long); + } + + if (nr =3D=3D 0) return 0; =20 - nr =3D sym->len / sizeof(unsigned long); file->pv_ops =3D calloc(sizeof(struct pv_state), nr); if (!file->pv_ops) { ERROR_GLIBC("calloc"); @@ -618,8 +658,10 @@ static int init_pv_ops(struct objtool_file *file) for (idx =3D 0; idx < nr; idx++) INIT_LIST_HEAD(&file->pv_ops[idx].targets); =20 - for (idx =3D 0; (pv_ops =3D pv_ops_tables[idx]); idx++) { - ret =3D add_pv_ops(file, pv_ops); + for (idx =3D 0; pv_ops_tables[idx].name; idx++) { + if (pv_ops_tables[idx].idx_off < 0) + continue; + ret =3D add_pv_ops(file, idx); if (ret) return ret; } diff --git a/tools/objtool/include/objtool/check.h b/tools/objtool/include/= objtool/check.h index 00fb745e7233..51f2396c5943 100644 --- a/tools/objtool/include/objtool/check.h +++ b/tools/objtool/include/objtool/check.h @@ -125,4 +125,6 @@ struct instruction *next_insn_same_sec(struct objtool_f= ile *file, struct instruc insn && insn->sec =3D=3D _sec; \ insn =3D next_insn_same_sec(file, insn)) =20 +int pv_ops_idx_off(const char *symname); + #endif /* _CHECK_H */ --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CE33315D52 for ; Thu, 27 Nov 2025 07:10:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227443; cv=none; b=TK0j2z40ia/PKph3YC7X2Gf3bR7huKb439FucLYcNq5VlyOA0jnyxDco2duGI/77F7CuPj3XjjVjZORfJwNf20UQn8KUj+RiLuA1yV0vSE0O1WnuUAzJv6GeRuACjQSlAos/GnGC6w4Ggs7o+zd5rPGQ2NyMT7vg2cYiEi+VnG8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227443; c=relaxed/simple; bh=KhS2hR8yS4ddPWKetGb5Mg/+66yHTxjFfkIrs4V1taA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TPdTV2H+bink4GTeCIeGv9ibUN2QDgI9MmrO7FtV44qIj+uAMJS20+WAcQuSJyN5nbSO1RJTxGJvfVpUg2XVqLX4JleY++k6BpvyKiLM2EsheFolptEAjlSG8vgT/0AyMpGM7Sd7uNBNSvv3kAfpbu9pOGntVHF0qtztvqljBbQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 7C4C45BCC4; Thu, 27 Nov 2025 07:10:40 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 209FE3EA63; Thu, 27 Nov 2025 07:10:40 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id IAqABnD5J2kQXgAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:40 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v4 19/21] x86/paravirt: Allow pv-calls outside paravirt.h Date: Thu, 27 Nov 2025 08:08:42 +0100 Message-ID: <20251127070844.21919-20-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 7C4C45BCC4 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" In order to prepare for defining paravirt functions outside of paravirt.h, don't #undef the paravirt call macros. Signed-off-by: Juergen Gross --- arch/x86/include/asm/paravirt.h | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 62399f5d037d..ba6b14b6f36a 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -588,22 +588,6 @@ static __always_inline unsigned long arch_local_irq_sa= ve(void) } #endif =20 - -/* Make sure as little as possible of this mess escapes. */ -#undef PARAVIRT_CALL -#undef __PVOP_CALL -#undef __PVOP_VCALL -#undef PVOP_VCALL0 -#undef PVOP_CALL0 -#undef PVOP_VCALL1 -#undef PVOP_CALL1 -#undef PVOP_VCALL2 -#undef PVOP_CALL2 -#undef PVOP_VCALL3 -#undef PVOP_CALL3 -#undef PVOP_VCALL4 -#undef PVOP_CALL4 - void native_pv_lock_init(void) __init; =20 #else /* __ASSEMBLER__ */ --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE5C63191D5 for ; Thu, 27 Nov 2025 07:10:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227450; cv=none; b=QQ97M4TQYnr0NPmICaBRAZDyQ1RZwM1fGnmQH/6TX5gbFGrLrwvi4bEbrE0vk4L/AeusUOwhXC0q5yQey1vxeMXC4i4jLmA0rdw1ohDWC7VaFfoMHVyu+Q59h1zZlhromsK9Yg4UgmA5rcWuK+c82RIUteQvgUx7bDUFkkZ8EL4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227450; c=relaxed/simple; bh=k38cYc1Ip9S/bqj4xsIIBTbOHiwesPhXlvxcbLMeoeY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O2gLnhByVNm8tYYiaBeZeR7KyNrrCrjUycSLRtUKcyHzO7EMxpk1U9sLJ9uGMem3Po2ZIV1JJbvnKVSOAFW/ba0s1+AcOE9aU6m7wMUs3SZzCGv65SSE/gN6C5V13XBJ2GVvxrILzLzjWwEpANjt1V6mVauHLa63oimBhpgM5SY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 524375BCCC; Thu, 27 Nov 2025 07:10:46 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id E09243EA63; Thu, 27 Nov 2025 07:10:45 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 6eJkNXX5J2mQXgAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:45 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH v4 20/21] x86/paravirt: Specify pv_ops array in paravirt macros Date: Thu, 27 Nov 2025 08:08:43 +0100 Message-ID: <20251127070844.21919-21-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)] X-Rspamd-Queue-Id: 524375BCCC X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org Content-Type: text/plain; charset="utf-8" In order to prepare having multiple pv_ops arrays, specify the array in the paravirt macros. Signed-off-by: Juergen Gross --- V2: - new patch --- arch/x86/include/asm/paravirt.h | 166 +++++++++++++------------- arch/x86/include/asm/paravirt_types.h | 140 +++++++++++----------- 2 files changed, 153 insertions(+), 153 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index ba6b14b6f36a..ec274d13bae0 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -31,11 +31,11 @@ void __init paravirt_set_cap(void); /* The paravirtualized I/O functions */ static inline void slow_down_io(void) { - PVOP_VCALL0(cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); #ifdef REALLY_SLOW_IO - PVOP_VCALL0(cpu.io_delay); - PVOP_VCALL0(cpu.io_delay); - PVOP_VCALL0(cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); + PVOP_VCALL0(pv_ops, cpu.io_delay); #endif } =20 @@ -47,57 +47,57 @@ void native_flush_tlb_multi(const struct cpumask *cpuma= sk, =20 static inline void __flush_tlb_local(void) { - PVOP_VCALL0(mmu.flush_tlb_user); + PVOP_VCALL0(pv_ops, mmu.flush_tlb_user); } =20 static inline void __flush_tlb_global(void) { - PVOP_VCALL0(mmu.flush_tlb_kernel); + PVOP_VCALL0(pv_ops, mmu.flush_tlb_kernel); } =20 static inline void __flush_tlb_one_user(unsigned long addr) { - PVOP_VCALL1(mmu.flush_tlb_one_user, addr); + PVOP_VCALL1(pv_ops, mmu.flush_tlb_one_user, addr); } =20 static inline void __flush_tlb_multi(const struct cpumask *cpumask, const struct flush_tlb_info *info) { - PVOP_VCALL2(mmu.flush_tlb_multi, cpumask, info); + PVOP_VCALL2(pv_ops, mmu.flush_tlb_multi, cpumask, info); } =20 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm) { - PVOP_VCALL1(mmu.exit_mmap, mm); + PVOP_VCALL1(pv_ops, mmu.exit_mmap, mm); } =20 static inline void notify_page_enc_status_changed(unsigned long pfn, int npages, bool enc) { - PVOP_VCALL3(mmu.notify_page_enc_status_changed, pfn, npages, enc); + PVOP_VCALL3(pv_ops, mmu.notify_page_enc_status_changed, pfn, npages, enc); } =20 static __always_inline void arch_safe_halt(void) { - PVOP_VCALL0(irq.safe_halt); + PVOP_VCALL0(pv_ops, irq.safe_halt); } =20 static inline void halt(void) { - PVOP_VCALL0(irq.halt); + PVOP_VCALL0(pv_ops, irq.halt); } =20 #ifdef CONFIG_PARAVIRT_XXL static inline void load_sp0(unsigned long sp0) { - PVOP_VCALL1(cpu.load_sp0, sp0); + PVOP_VCALL1(pv_ops, cpu.load_sp0, sp0); } =20 /* The paravirtualized CPUID instruction. */ static inline void __cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx) { - PVOP_VCALL4(cpu.cpuid, eax, ebx, ecx, edx); + PVOP_VCALL4(pv_ops, cpu.cpuid, eax, ebx, ecx, edx); } =20 /* @@ -105,69 +105,69 @@ static inline void __cpuid(unsigned int *eax, unsigne= d int *ebx, */ static __always_inline unsigned long paravirt_get_debugreg(int reg) { - return PVOP_CALL1(unsigned long, cpu.get_debugreg, reg); + return PVOP_CALL1(unsigned long, pv_ops, cpu.get_debugreg, reg); } #define get_debugreg(var, reg) var =3D paravirt_get_debugreg(reg) static __always_inline void set_debugreg(unsigned long val, int reg) { - PVOP_VCALL2(cpu.set_debugreg, reg, val); + PVOP_VCALL2(pv_ops, cpu.set_debugreg, reg, val); } =20 static inline unsigned long read_cr0(void) { - return PVOP_CALL0(unsigned long, cpu.read_cr0); + return PVOP_CALL0(unsigned long, pv_ops, cpu.read_cr0); } =20 static inline void write_cr0(unsigned long x) { - PVOP_VCALL1(cpu.write_cr0, x); + PVOP_VCALL1(pv_ops, cpu.write_cr0, x); } =20 static __always_inline unsigned long read_cr2(void) { - return PVOP_ALT_CALLEE0(unsigned long, mmu.read_cr2, + return PVOP_ALT_CALLEE0(unsigned long, pv_ops, mmu.read_cr2, "mov %%cr2, %%rax;", ALT_NOT_XEN); } =20 static __always_inline void write_cr2(unsigned long x) { - PVOP_VCALL1(mmu.write_cr2, x); + PVOP_VCALL1(pv_ops, mmu.write_cr2, x); } =20 static inline unsigned long __read_cr3(void) { - return PVOP_ALT_CALL0(unsigned long, mmu.read_cr3, + return PVOP_ALT_CALL0(unsigned long, pv_ops, mmu.read_cr3, "mov %%cr3, %%rax;", ALT_NOT_XEN); } =20 static inline void write_cr3(unsigned long x) { - PVOP_ALT_VCALL1(mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN); + PVOP_ALT_VCALL1(pv_ops, mmu.write_cr3, x, "mov %%rdi, %%cr3", ALT_NOT_XEN= ); } =20 static inline void __write_cr4(unsigned long x) { - PVOP_VCALL1(cpu.write_cr4, x); + PVOP_VCALL1(pv_ops, cpu.write_cr4, x); } =20 static inline u64 paravirt_read_msr(u32 msr) { - return PVOP_CALL1(u64, cpu.read_msr, msr); + return PVOP_CALL1(u64, pv_ops, cpu.read_msr, msr); } =20 static inline void paravirt_write_msr(u32 msr, u64 val) { - PVOP_VCALL2(cpu.write_msr, msr, val); + PVOP_VCALL2(pv_ops, cpu.write_msr, msr, val); } =20 static inline int paravirt_read_msr_safe(u32 msr, u64 *val) { - return PVOP_CALL2(int, cpu.read_msr_safe, msr, val); + return PVOP_CALL2(int, pv_ops, cpu.read_msr_safe, msr, val); } =20 static inline int paravirt_write_msr_safe(u32 msr, u64 val) { - return PVOP_CALL2(int, cpu.write_msr_safe, msr, val); + return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val); } =20 #define rdmsr(msr, val1, val2) \ @@ -214,154 +214,154 @@ static __always_inline int rdmsrq_safe(u32 msr, u64= *p) =20 static __always_inline u64 rdpmc(int counter) { - return PVOP_CALL1(u64, cpu.read_pmc, counter); + return PVOP_CALL1(u64, pv_ops, cpu.read_pmc, counter); } =20 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned en= tries) { - PVOP_VCALL2(cpu.alloc_ldt, ldt, entries); + PVOP_VCALL2(pv_ops, cpu.alloc_ldt, ldt, entries); } =20 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned ent= ries) { - PVOP_VCALL2(cpu.free_ldt, ldt, entries); + PVOP_VCALL2(pv_ops, cpu.free_ldt, ldt, entries); } =20 static inline void load_TR_desc(void) { - PVOP_VCALL0(cpu.load_tr_desc); + PVOP_VCALL0(pv_ops, cpu.load_tr_desc); } static inline void load_gdt(const struct desc_ptr *dtr) { - PVOP_VCALL1(cpu.load_gdt, dtr); + PVOP_VCALL1(pv_ops, cpu.load_gdt, dtr); } static inline void load_idt(const struct desc_ptr *dtr) { - PVOP_VCALL1(cpu.load_idt, dtr); + PVOP_VCALL1(pv_ops, cpu.load_idt, dtr); } static inline void set_ldt(const void *addr, unsigned entries) { - PVOP_VCALL2(cpu.set_ldt, addr, entries); + PVOP_VCALL2(pv_ops, cpu.set_ldt, addr, entries); } static inline unsigned long paravirt_store_tr(void) { - return PVOP_CALL0(unsigned long, cpu.store_tr); + return PVOP_CALL0(unsigned long, pv_ops, cpu.store_tr); } =20 #define store_tr(tr) ((tr) =3D paravirt_store_tr()) static inline void load_TLS(struct thread_struct *t, unsigned cpu) { - PVOP_VCALL2(cpu.load_tls, t, cpu); + PVOP_VCALL2(pv_ops, cpu.load_tls, t, cpu); } =20 static inline void load_gs_index(unsigned int gs) { - PVOP_VCALL1(cpu.load_gs_index, gs); + PVOP_VCALL1(pv_ops, cpu.load_gs_index, gs); } =20 static inline void write_ldt_entry(struct desc_struct *dt, int entry, const void *desc) { - PVOP_VCALL3(cpu.write_ldt_entry, dt, entry, desc); + PVOP_VCALL3(pv_ops, cpu.write_ldt_entry, dt, entry, desc); } =20 static inline void write_gdt_entry(struct desc_struct *dt, int entry, void *desc, int type) { - PVOP_VCALL4(cpu.write_gdt_entry, dt, entry, desc, type); + PVOP_VCALL4(pv_ops, cpu.write_gdt_entry, dt, entry, desc, type); } =20 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_de= sc *g) { - PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g); + PVOP_VCALL3(pv_ops, cpu.write_idt_entry, dt, entry, g); } =20 #ifdef CONFIG_X86_IOPL_IOPERM static inline void tss_invalidate_io_bitmap(void) { - PVOP_VCALL0(cpu.invalidate_io_bitmap); + PVOP_VCALL0(pv_ops, cpu.invalidate_io_bitmap); } =20 static inline void tss_update_io_bitmap(void) { - PVOP_VCALL0(cpu.update_io_bitmap); + PVOP_VCALL0(pv_ops, cpu.update_io_bitmap); } #endif =20 static inline void paravirt_enter_mmap(struct mm_struct *next) { - PVOP_VCALL1(mmu.enter_mmap, next); + PVOP_VCALL1(pv_ops, mmu.enter_mmap, next); } =20 static inline int paravirt_pgd_alloc(struct mm_struct *mm) { - return PVOP_CALL1(int, mmu.pgd_alloc, mm); + return PVOP_CALL1(int, pv_ops, mmu.pgd_alloc, mm); } =20 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd) { - PVOP_VCALL2(mmu.pgd_free, mm, pgd); + PVOP_VCALL2(pv_ops, mmu.pgd_free, mm, pgd); } =20 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_pte, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_pte, mm, pfn); } static inline void paravirt_release_pte(unsigned long pfn) { - PVOP_VCALL1(mmu.release_pte, pfn); + PVOP_VCALL1(pv_ops, mmu.release_pte, pfn); } =20 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_pmd, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_pmd, mm, pfn); } =20 static inline void paravirt_release_pmd(unsigned long pfn) { - PVOP_VCALL1(mmu.release_pmd, pfn); + PVOP_VCALL1(pv_ops, mmu.release_pmd, pfn); } =20 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_pud, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_pud, mm, pfn); } static inline void paravirt_release_pud(unsigned long pfn) { - PVOP_VCALL1(mmu.release_pud, pfn); + PVOP_VCALL1(pv_ops, mmu.release_pud, pfn); } =20 static inline void paravirt_alloc_p4d(struct mm_struct *mm, unsigned long = pfn) { - PVOP_VCALL2(mmu.alloc_p4d, mm, pfn); + PVOP_VCALL2(pv_ops, mmu.alloc_p4d, mm, pfn); } =20 static inline void paravirt_release_p4d(unsigned long pfn) { - PVOP_VCALL1(mmu.release_p4d, pfn); + PVOP_VCALL1(pv_ops, mmu.release_p4d, pfn); } =20 static inline pte_t __pte(pteval_t val) { - return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, mmu.make_pte, val, + return (pte_t) { PVOP_ALT_CALLEE1(pteval_t, pv_ops, mmu.make_pte, val, "mov %%rdi, %%rax", ALT_NOT_XEN) }; } =20 static inline pteval_t pte_val(pte_t pte) { - return PVOP_ALT_CALLEE1(pteval_t, mmu.pte_val, pte.pte, + return PVOP_ALT_CALLEE1(pteval_t, pv_ops, mmu.pte_val, pte.pte, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 static inline pgd_t __pgd(pgdval_t val) { - return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, mmu.make_pgd, val, + return (pgd_t) { PVOP_ALT_CALLEE1(pgdval_t, pv_ops, mmu.make_pgd, val, "mov %%rdi, %%rax", ALT_NOT_XEN) }; } =20 static inline pgdval_t pgd_val(pgd_t pgd) { - return PVOP_ALT_CALLEE1(pgdval_t, mmu.pgd_val, pgd.pgd, + return PVOP_ALT_CALLEE1(pgdval_t, pv_ops, mmu.pgd_val, pgd.pgd, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 @@ -371,7 +371,7 @@ static inline pte_t ptep_modify_prot_start(struct vm_ar= ea_struct *vma, unsigned { pteval_t ret; =20 - ret =3D PVOP_CALL3(pteval_t, mmu.ptep_modify_prot_start, vma, addr, ptep); + ret =3D PVOP_CALL3(pteval_t, pv_ops, mmu.ptep_modify_prot_start, vma, add= r, ptep); =20 return (pte_t) { .pte =3D ret }; } @@ -380,41 +380,41 @@ static inline void ptep_modify_prot_commit(struct vm_= area_struct *vma, unsigned pte_t *ptep, pte_t old_pte, pte_t pte) { =20 - PVOP_VCALL4(mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte); + PVOP_VCALL4(pv_ops, mmu.ptep_modify_prot_commit, vma, addr, ptep, pte.pte= ); } =20 static inline void set_pte(pte_t *ptep, pte_t pte) { - PVOP_VCALL2(mmu.set_pte, ptep, pte.pte); + PVOP_VCALL2(pv_ops, mmu.set_pte, ptep, pte.pte); } =20 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) { - PVOP_VCALL2(mmu.set_pmd, pmdp, native_pmd_val(pmd)); + PVOP_VCALL2(pv_ops, mmu.set_pmd, pmdp, native_pmd_val(pmd)); } =20 static inline pmd_t __pmd(pmdval_t val) { - return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, mmu.make_pmd, val, + return (pmd_t) { PVOP_ALT_CALLEE1(pmdval_t, pv_ops, mmu.make_pmd, val, "mov %%rdi, %%rax", ALT_NOT_XEN) }; } =20 static inline pmdval_t pmd_val(pmd_t pmd) { - return PVOP_ALT_CALLEE1(pmdval_t, mmu.pmd_val, pmd.pmd, + return PVOP_ALT_CALLEE1(pmdval_t, pv_ops, mmu.pmd_val, pmd.pmd, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 static inline void set_pud(pud_t *pudp, pud_t pud) { - PVOP_VCALL2(mmu.set_pud, pudp, native_pud_val(pud)); + PVOP_VCALL2(pv_ops, mmu.set_pud, pudp, native_pud_val(pud)); } =20 static inline pud_t __pud(pudval_t val) { pudval_t ret; =20 - ret =3D PVOP_ALT_CALLEE1(pudval_t, mmu.make_pud, val, + ret =3D PVOP_ALT_CALLEE1(pudval_t, pv_ops, mmu.make_pud, val, "mov %%rdi, %%rax", ALT_NOT_XEN); =20 return (pud_t) { ret }; @@ -422,7 +422,7 @@ static inline pud_t __pud(pudval_t val) =20 static inline pudval_t pud_val(pud_t pud) { - return PVOP_ALT_CALLEE1(pudval_t, mmu.pud_val, pud.pud, + return PVOP_ALT_CALLEE1(pudval_t, pv_ops, mmu.pud_val, pud.pud, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 @@ -435,12 +435,12 @@ static inline void set_p4d(p4d_t *p4dp, p4d_t p4d) { p4dval_t val =3D native_p4d_val(p4d); =20 - PVOP_VCALL2(mmu.set_p4d, p4dp, val); + PVOP_VCALL2(pv_ops, mmu.set_p4d, p4dp, val); } =20 static inline p4d_t __p4d(p4dval_t val) { - p4dval_t ret =3D PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val, + p4dval_t ret =3D PVOP_ALT_CALLEE1(p4dval_t, pv_ops, mmu.make_p4d, val, "mov %%rdi, %%rax", ALT_NOT_XEN); =20 return (p4d_t) { ret }; @@ -448,13 +448,13 @@ static inline p4d_t __p4d(p4dval_t val) =20 static inline p4dval_t p4d_val(p4d_t p4d) { - return PVOP_ALT_CALLEE1(p4dval_t, mmu.p4d_val, p4d.p4d, + return PVOP_ALT_CALLEE1(p4dval_t, pv_ops, mmu.p4d_val, p4d.p4d, "mov %%rdi, %%rax", ALT_NOT_XEN); } =20 static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd) { - PVOP_VCALL2(mmu.set_pgd, pgdp, native_pgd_val(pgd)); + PVOP_VCALL2(pv_ops, mmu.set_pgd, pgdp, native_pgd_val(pgd)); } =20 #define set_pgd(pgdp, pgdval) do { \ @@ -493,28 +493,28 @@ static inline void pmd_clear(pmd_t *pmdp) #define __HAVE_ARCH_START_CONTEXT_SWITCH static inline void arch_start_context_switch(struct task_struct *prev) { - PVOP_VCALL1(cpu.start_context_switch, prev); + PVOP_VCALL1(pv_ops, cpu.start_context_switch, prev); } =20 static inline void arch_end_context_switch(struct task_struct *next) { - PVOP_VCALL1(cpu.end_context_switch, next); + PVOP_VCALL1(pv_ops, cpu.end_context_switch, next); } =20 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE static inline void arch_enter_lazy_mmu_mode(void) { - PVOP_VCALL0(mmu.lazy_mode.enter); + PVOP_VCALL0(pv_ops, mmu.lazy_mode.enter); } =20 static inline void arch_leave_lazy_mmu_mode(void) { - PVOP_VCALL0(mmu.lazy_mode.leave); + PVOP_VCALL0(pv_ops, mmu.lazy_mode.leave); } =20 static inline void arch_flush_lazy_mmu_mode(void) { - PVOP_VCALL0(mmu.lazy_mode.flush); + PVOP_VCALL0(pv_ops, mmu.lazy_mode.flush); } =20 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, @@ -529,29 +529,29 @@ static inline void __set_fixmap(unsigned /* enum fixe= d_addresses */ idx, static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock = *lock, u32 val) { - PVOP_VCALL2(lock.queued_spin_lock_slowpath, lock, val); + PVOP_VCALL2(pv_ops, lock.queued_spin_lock_slowpath, lock, val); } =20 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) { - PVOP_ALT_VCALLEE1(lock.queued_spin_unlock, lock, + PVOP_ALT_VCALLEE1(pv_ops, lock.queued_spin_unlock, lock, "movb $0, (%%" _ASM_ARG1 ");", ALT_NOT(X86_FEATURE_PVUNLOCK)); } =20 static __always_inline void pv_wait(u8 *ptr, u8 val) { - PVOP_VCALL2(lock.wait, ptr, val); + PVOP_VCALL2(pv_ops, lock.wait, ptr, val); } =20 static __always_inline void pv_kick(int cpu) { - PVOP_VCALL1(lock.kick, cpu); + PVOP_VCALL1(pv_ops, lock.kick, cpu); } =20 static __always_inline bool pv_vcpu_is_preempted(long cpu) { - return PVOP_ALT_CALLEE1(bool, lock.vcpu_is_preempted, cpu, + return PVOP_ALT_CALLEE1(bool, pv_ops, lock.vcpu_is_preempted, cpu, "xor %%" _ASM_AX ", %%" _ASM_AX ";", ALT_NOT(X86_FEATURE_VCPUPREEMPT)); } @@ -564,18 +564,18 @@ bool __raw_callee_save___native_vcpu_is_preempted(lon= g cpu); #ifdef CONFIG_PARAVIRT_XXL static __always_inline unsigned long arch_local_save_flags(void) { - return PVOP_ALT_CALLEE0(unsigned long, irq.save_fl, "pushf; pop %%rax;", + return PVOP_ALT_CALLEE0(unsigned long, pv_ops, irq.save_fl, "pushf; pop %= %rax;", ALT_NOT_XEN); } =20 static __always_inline void arch_local_irq_disable(void) { - PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN); + PVOP_ALT_VCALLEE0(pv_ops, irq.irq_disable, "cli;", ALT_NOT_XEN); } =20 static __always_inline void arch_local_irq_enable(void) { - PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN); + PVOP_ALT_VCALLEE0(pv_ops, irq.irq_enable, "sti;", ALT_NOT_XEN); } =20 static __always_inline unsigned long arch_local_irq_save(void) diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 1e50f13e6543..01a485f1a7f1 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -212,7 +212,7 @@ struct paravirt_patch_template { =20 extern struct paravirt_patch_template pv_ops; =20 -#define paravirt_ptr(op) [paravirt_opptr] "m" (pv_ops.op) +#define paravirt_ptr(array, op) [paravirt_opptr] "m" (array.op) =20 /* * This generates an indirect call based on the operation type number. @@ -362,19 +362,19 @@ extern struct paravirt_patch_template pv_ops; * feature is not active, the direct call is used as above via the * ALT_FLAG_DIRECT_CALL special case and the "always on" feature. */ -#define ____PVOP_CALL(ret, op, call_clbr, extra_clbr, ...) \ +#define ____PVOP_CALL(ret, array, op, call_clbr, extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR, \ ALT_CALL_ALWAYS) \ : call_clbr, ASM_CALL_CONSTRAINT \ - : paravirt_ptr(op), \ + : paravirt_ptr(array, op), \ ##__VA_ARGS__ \ : "memory", "cc" extra_clbr); \ ret; \ }) =20 -#define ____PVOP_ALT_CALL(ret, op, alt, cond, call_clbr, \ +#define ____PVOP_ALT_CALL(ret, array, op, alt, cond, call_clbr, \ extra_clbr, ...) \ ({ \ PVOP_CALL_ARGS; \ @@ -382,102 +382,102 @@ extern struct paravirt_patch_template pv_ops; ALT_CALL_INSTR, ALT_CALL_ALWAYS, \ alt, cond) \ : call_clbr, ASM_CALL_CONSTRAINT \ - : paravirt_ptr(op), \ + : paravirt_ptr(array, op), \ ##__VA_ARGS__ \ : "memory", "cc" extra_clbr); \ ret; \ }) =20 -#define __PVOP_CALL(rettype, op, ...) \ - ____PVOP_CALL(PVOP_RETVAL(rettype), op, \ +#define __PVOP_CALL(rettype, array, op, ...) \ + ____PVOP_CALL(PVOP_RETVAL(rettype), array, op, \ PVOP_CALL_CLOBBERS, EXTRA_CLOBBERS, ##__VA_ARGS__) =20 -#define __PVOP_ALT_CALL(rettype, op, alt, cond, ...) \ - ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), op, alt, cond, \ +#define __PVOP_ALT_CALL(rettype, array, op, alt, cond, ...) \ + ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), array, op, alt, cond, \ PVOP_CALL_CLOBBERS, EXTRA_CLOBBERS, \ ##__VA_ARGS__) =20 -#define __PVOP_CALLEESAVE(rettype, op, ...) \ - ____PVOP_CALL(PVOP_RETVAL(rettype), op.func, \ +#define __PVOP_CALLEESAVE(rettype, array, op, ...) \ + ____PVOP_CALL(PVOP_RETVAL(rettype), array, op.func, \ PVOP_CALLEE_CLOBBERS, , ##__VA_ARGS__) =20 -#define __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond, ...) \ - ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), op.func, alt, cond, \ +#define __PVOP_ALT_CALLEESAVE(rettype, array, op, alt, cond, ...) \ + ____PVOP_ALT_CALL(PVOP_RETVAL(rettype), array, op.func, alt, cond, \ PVOP_CALLEE_CLOBBERS, , ##__VA_ARGS__) =20 =20 -#define __PVOP_VCALL(op, ...) \ - (void)____PVOP_CALL(, op, PVOP_VCALL_CLOBBERS, \ +#define __PVOP_VCALL(array, op, ...) \ + (void)____PVOP_CALL(, array, op, PVOP_VCALL_CLOBBERS, \ VEXTRA_CLOBBERS, ##__VA_ARGS__) =20 -#define __PVOP_ALT_VCALL(op, alt, cond, ...) \ - (void)____PVOP_ALT_CALL(, op, alt, cond, \ +#define __PVOP_ALT_VCALL(array, op, alt, cond, ...) \ + (void)____PVOP_ALT_CALL(, array, op, alt, cond, \ PVOP_VCALL_CLOBBERS, VEXTRA_CLOBBERS, \ ##__VA_ARGS__) =20 -#define __PVOP_VCALLEESAVE(op, ...) \ - (void)____PVOP_CALL(, op.func, \ +#define __PVOP_VCALLEESAVE(array, op, ...) \ + (void)____PVOP_CALL(, array, op.func, \ PVOP_VCALLEE_CLOBBERS, , ##__VA_ARGS__) =20 -#define __PVOP_ALT_VCALLEESAVE(op, alt, cond, ...) \ - (void)____PVOP_ALT_CALL(, op.func, alt, cond, \ +#define __PVOP_ALT_VCALLEESAVE(array, op, alt, cond, ...) \ + (void)____PVOP_ALT_CALL(, array, op.func, alt, cond, \ PVOP_VCALLEE_CLOBBERS, , ##__VA_ARGS__) =20 =20 -#define PVOP_CALL0(rettype, op) \ - __PVOP_CALL(rettype, op) -#define PVOP_VCALL0(op) \ - __PVOP_VCALL(op) -#define PVOP_ALT_CALL0(rettype, op, alt, cond) \ - __PVOP_ALT_CALL(rettype, op, alt, cond) -#define PVOP_ALT_VCALL0(op, alt, cond) \ - __PVOP_ALT_VCALL(op, alt, cond) - -#define PVOP_CALLEE0(rettype, op) \ - __PVOP_CALLEESAVE(rettype, op) -#define PVOP_VCALLEE0(op) \ - __PVOP_VCALLEESAVE(op) -#define PVOP_ALT_CALLEE0(rettype, op, alt, cond) \ - __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond) -#define PVOP_ALT_VCALLEE0(op, alt, cond) \ - __PVOP_ALT_VCALLEESAVE(op, alt, cond) - - -#define PVOP_CALL1(rettype, op, arg1) \ - __PVOP_CALL(rettype, op, PVOP_CALL_ARG1(arg1)) -#define PVOP_VCALL1(op, arg1) \ - __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1)) -#define PVOP_ALT_VCALL1(op, arg1, alt, cond) \ - __PVOP_ALT_VCALL(op, alt, cond, PVOP_CALL_ARG1(arg1)) - -#define PVOP_CALLEE1(rettype, op, arg1) \ - __PVOP_CALLEESAVE(rettype, op, PVOP_CALL_ARG1(arg1)) -#define PVOP_VCALLEE1(op, arg1) \ - __PVOP_VCALLEESAVE(op, PVOP_CALL_ARG1(arg1)) -#define PVOP_ALT_CALLEE1(rettype, op, arg1, alt, cond) \ - __PVOP_ALT_CALLEESAVE(rettype, op, alt, cond, PVOP_CALL_ARG1(arg1)) -#define PVOP_ALT_VCALLEE1(op, arg1, alt, cond) \ - __PVOP_ALT_VCALLEESAVE(op, alt, cond, PVOP_CALL_ARG1(arg1)) - - -#define PVOP_CALL2(rettype, op, arg1, arg2) \ - __PVOP_CALL(rettype, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2)) -#define PVOP_VCALL2(op, arg1, arg2) \ - __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2)) - -#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ - __PVOP_CALL(rettype, op, PVOP_CALL_ARG1(arg1), \ +#define PVOP_CALL0(rettype, array, op) \ + __PVOP_CALL(rettype, array, op) +#define PVOP_VCALL0(array, op) \ + __PVOP_VCALL(array, op) +#define PVOP_ALT_CALL0(rettype, array, op, alt, cond) \ + __PVOP_ALT_CALL(rettype, array, op, alt, cond) +#define PVOP_ALT_VCALL0(array, op, alt, cond) \ + __PVOP_ALT_VCALL(array, op, alt, cond) + +#define PVOP_CALLEE0(rettype, array, op) \ + __PVOP_CALLEESAVE(rettype, array, op) +#define PVOP_VCALLEE0(array, op) \ + __PVOP_VCALLEESAVE(array, op) +#define PVOP_ALT_CALLEE0(rettype, array, op, alt, cond) \ + __PVOP_ALT_CALLEESAVE(rettype, array, op, alt, cond) +#define PVOP_ALT_VCALLEE0(array, op, alt, cond) \ + __PVOP_ALT_VCALLEESAVE(array, op, alt, cond) + + +#define PVOP_CALL1(rettype, array, op, arg1) \ + __PVOP_CALL(rettype, array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_VCALL1(array, op, arg1) \ + __PVOP_VCALL(array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_ALT_VCALL1(array, op, arg1, alt, cond) \ + __PVOP_ALT_VCALL(array, op, alt, cond, PVOP_CALL_ARG1(arg1)) + +#define PVOP_CALLEE1(rettype, array, op, arg1) \ + __PVOP_CALLEESAVE(rettype, array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_VCALLEE1(array, op, arg1) \ + __PVOP_VCALLEESAVE(array, op, PVOP_CALL_ARG1(arg1)) +#define PVOP_ALT_CALLEE1(rettype, array, op, arg1, alt, cond) \ + __PVOP_ALT_CALLEESAVE(rettype, array, op, alt, cond, PVOP_CALL_ARG1(arg1)) +#define PVOP_ALT_VCALLEE1(array, op, arg1, alt, cond) \ + __PVOP_ALT_VCALLEESAVE(array, op, alt, cond, PVOP_CALL_ARG1(arg1)) + + +#define PVOP_CALL2(rettype, array, op, arg1, arg2) \ + __PVOP_CALL(rettype, array, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2= )) +#define PVOP_VCALL2(array, op, arg1, arg2) \ + __PVOP_VCALL(array, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2)) + +#define PVOP_CALL3(rettype, array, op, arg1, arg2, arg3) \ + __PVOP_CALL(rettype, array, op, PVOP_CALL_ARG1(arg1), \ PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) -#define PVOP_VCALL3(op, arg1, arg2, arg3) \ - __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), \ +#define PVOP_VCALL3(array, op, arg1, arg2, arg3) \ + __PVOP_VCALL(array, op, PVOP_CALL_ARG1(arg1), \ PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) =20 -#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ - __PVOP_CALL(rettype, op, \ +#define PVOP_CALL4(rettype, array, op, arg1, arg2, arg3, arg4) \ + __PVOP_CALL(rettype, array, op, \ PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) -#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ - __PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ +#define PVOP_VCALL4(array, op, arg1, arg2, arg3, arg4) \ + __PVOP_VCALL(array, op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) =20 #endif /* __ASSEMBLER__ */ --=20 2.51.0 From nobody Mon Dec 1 22:03:46 2025 Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.223.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8477031D387 for ; Thu, 27 Nov 2025 07:10:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.135.223.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227457; cv=none; b=iKP07e5GF9VNRqD2neRq+12Bu0v5BzTFLfp9X8BvhkOA0SH3CQZ50sAI9YUwHG/lJ7151OiHr70jq4nIUc9Ieoo+gBTo6yN4rjtsMJD9RgRyc19J+c8e0EuHUMufATNAi9NYwnRZiFElcepWCh9Ui3X7QV/McuLMioX24s735Fc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764227457; c=relaxed/simple; bh=Zx5xr6XPA700GyctECegHl2WSGaGnBd0y0/NAyGoATU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kSzk+qc+nanl8WHDfy8DOzcxDou+Vnjmeft3JzjXUwMjODcGLrwRN/NEm8eqLQ7tmodTAnDhknXL7Muf0K0RtrUVVRLWotNtvKg/p4zAyR/NHUaVZkGSY1GPi+RNGe2QVFvdpFMAY0kgzlv+txcIV7ssK3+3n2MMuux8D4JMSO0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com; spf=pass smtp.mailfrom=suse.com; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=ApXp4HcV; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b=ApXp4HcV; arc=none smtp.client-ip=195.135.223.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=suse.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=suse.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="ApXp4HcV"; dkim=pass (1024-bit key) header.d=suse.com header.i=@suse.com header.b="ApXp4HcV" Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 6EA4A5BCE8; Thu, 27 Nov 2025 07:10:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227452; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SXTHPqtiAo+6bHjyKR2sCuvTayGU8MiCJZgmvhwbcSY=; b=ApXp4HcV5r0fMTBLGVFES0QGFHOWqaImZhNmJwBjUX/vb5lqFaPhRnpeRdN+0vab9WT8wB UHHfSaSHakkhpD69H3O7MqqpUa3oMcrq6WqdX524GHU2yn9VOluxEWXCAZNETgKdN4Io4j saX8heE/kZVzk4I0rQW/fzVwaWusO3U= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1764227452; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SXTHPqtiAo+6bHjyKR2sCuvTayGU8MiCJZgmvhwbcSY=; b=ApXp4HcV5r0fMTBLGVFES0QGFHOWqaImZhNmJwBjUX/vb5lqFaPhRnpeRdN+0vab9WT8wB UHHfSaSHakkhpD69H3O7MqqpUa3oMcrq6WqdX524GHU2yn9VOluxEWXCAZNETgKdN4Io4j saX8heE/kZVzk4I0rQW/fzVwaWusO3U= Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id B5C253EA63; Thu, 27 Nov 2025 07:10:51 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 5mfQKnv5J2mYXgAAD6G6ig (envelope-from ); Thu, 27 Nov 2025 07:10:51 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, kvm@vger.kernel.org Cc: Juergen Gross , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Paolo Bonzini , Vitaly Kuznetsov , Boris Ostrovsky , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v4 21/21] x86/pvlocks: Move paravirt spinlock functions into own header Date: Thu, 27 Nov 2025 08:08:44 +0100 Message-ID: <20251127070844.21919-22-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251127070844.21919-1-jgross@suse.com> References: <20251127070844.21919-1-jgross@suse.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[24]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-Spam-Level: X-Spam-Score: -6.80 X-Spam-Flag: NO Content-Type: text/plain; charset="utf-8" Instead of having the pv spinlock function definitions in paravirt.h, move them into the new header paravirt-spinlock.h. Signed-off-by: Juergen Gross --- V2: - use new header instead of qspinlock.h - use dedicated pv_ops_lock array - move more paravirt related lock code V3: - hide native_pv_lock_init() with CONFIG_SMP (kernel test robot) V4: - don't reference pv_ops_lock without CONFIG_PARAVIRT_SPINLOCKS (kernel test robot) --- arch/x86/hyperv/hv_spinlock.c | 10 +- arch/x86/include/asm/paravirt-spinlock.h | 146 +++++++++++++++++++++++ arch/x86/include/asm/paravirt.h | 61 ---------- arch/x86/include/asm/paravirt_types.h | 17 --- arch/x86/include/asm/qspinlock.h | 89 ++------------ arch/x86/kernel/Makefile | 2 +- arch/x86/kernel/kvm.c | 12 +- arch/x86/kernel/paravirt-spinlocks.c | 26 +++- arch/x86/kernel/paravirt.c | 21 ---- arch/x86/xen/spinlock.c | 10 +- tools/objtool/check.c | 1 + 11 files changed, 196 insertions(+), 199 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-spinlock.h diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c index 2a3c2afb0154..210b494e4de0 100644 --- a/arch/x86/hyperv/hv_spinlock.c +++ b/arch/x86/hyperv/hv_spinlock.c @@ -78,11 +78,11 @@ void __init hv_init_spinlocks(void) pr_info("PV spinlocks enabled\n"); =20 __pv_init_lock_hash(); - pv_ops.lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; - pv_ops.lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock= ); - pv_ops.lock.wait =3D hv_qlock_wait; - pv_ops.lock.kick =3D hv_qlock_kick; - pv_ops.lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(hv_vcpu_is_preempted); + pv_ops_lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; + pv_ops_lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock= ); + pv_ops_lock.wait =3D hv_qlock_wait; + pv_ops_lock.kick =3D hv_qlock_kick; + pv_ops_lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(hv_vcpu_is_preempted); } =20 static __init int hv_parse_nopvspin(char *arg) diff --git a/arch/x86/include/asm/paravirt-spinlock.h b/arch/x86/include/as= m/paravirt-spinlock.h new file mode 100644 index 000000000000..ed3ed343903d --- /dev/null +++ b/arch/x86/include/asm/paravirt-spinlock.h @@ -0,0 +1,146 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_X86_PARAVIRT_SPINLOCK_H +#define _ASM_X86_PARAVIRT_SPINLOCK_H + +#include + +#ifdef CONFIG_SMP +#include +#endif + +struct qspinlock; + +struct pv_lock_ops { + void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); + struct paravirt_callee_save queued_spin_unlock; + + void (*wait)(u8 *ptr, u8 val); + void (*kick)(int cpu); + + struct paravirt_callee_save vcpu_is_preempted; +} __no_randomize_layout; + +extern struct pv_lock_ops pv_ops_lock; + +#ifdef CONFIG_PARAVIRT_SPINLOCKS +void __init paravirt_set_cap(void); +extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al); +extern void __pv_init_lock_hash(void); +extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val= ); +extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lo= ck); +extern bool nopvspin; + +static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock = *lock, + u32 val) +{ + PVOP_VCALL2(pv_ops_lock, queued_spin_lock_slowpath, lock, val); +} + +static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) +{ + PVOP_ALT_VCALLEE1(pv_ops_lock, queued_spin_unlock, lock, + "movb $0, (%%" _ASM_ARG1 ");", + ALT_NOT(X86_FEATURE_PVUNLOCK)); +} + +static __always_inline bool pv_vcpu_is_preempted(long cpu) +{ + return PVOP_ALT_CALLEE1(bool, pv_ops_lock, vcpu_is_preempted, cpu, + "xor %%" _ASM_AX ", %%" _ASM_AX ";", + ALT_NOT(X86_FEATURE_VCPUPREEMPT)); +} + +#define queued_spin_unlock queued_spin_unlock +/** + * queued_spin_unlock - release a queued spinlock + * @lock : Pointer to queued spinlock structure + * + * A smp_store_release() on the least-significant byte. + */ +static inline void native_queued_spin_unlock(struct qspinlock *lock) +{ + smp_store_release(&lock->locked, 0); +} + +static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al) +{ + pv_queued_spin_lock_slowpath(lock, val); +} + +static inline void queued_spin_unlock(struct qspinlock *lock) +{ + kcsan_release(); + pv_queued_spin_unlock(lock); +} + +#define vcpu_is_preempted vcpu_is_preempted +static inline bool vcpu_is_preempted(long cpu) +{ + return pv_vcpu_is_preempted(cpu); +} + +static __always_inline void pv_wait(u8 *ptr, u8 val) +{ + PVOP_VCALL2(pv_ops_lock, wait, ptr, val); +} + +static __always_inline void pv_kick(int cpu) +{ + PVOP_VCALL1(pv_ops_lock, kick, cpu); +} + +void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock); +bool __raw_callee_save___native_vcpu_is_preempted(long cpu); +#endif /* CONFIG_PARAVIRT_SPINLOCKS */ + +void __init native_pv_lock_init(void); +__visible void __native_queued_spin_unlock(struct qspinlock *lock); +bool pv_is_native_spin_unlock(void); +__visible bool __native_vcpu_is_preempted(long cpu); +bool pv_is_native_vcpu_is_preempted(void); + +/* + * virt_spin_lock_key - disables by default the virt_spin_lock() hijack. + * + * Native (and PV wanting native due to vCPU pinning) should keep this key + * disabled. Native does not touch the key. + * + * When in a guest then native_pv_lock_init() enables the key first and + * KVM/XEN might conditionally disable it later in the boot process again. + */ +DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key); + +/* + * Shortcut for the queued_spin_lock_slowpath() function that allows + * virt to hijack it. + * + * Returns: + * true - lock has been negotiated, all done; + * false - queued_spin_lock_slowpath() will do its thing. + */ +#define virt_spin_lock virt_spin_lock +static inline bool virt_spin_lock(struct qspinlock *lock) +{ + int val; + + if (!static_branch_likely(&virt_spin_lock_key)) + return false; + + /* + * On hypervisors without PARAVIRT_SPINLOCKS support we fall + * back to a Test-and-Set spinlock, because fair locks have + * horrible lock 'holder' preemption issues. + */ + + __retry: + val =3D atomic_read(&lock->val); + + if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) { + cpu_relax(); + goto __retry; + } + + return true; +} + +#endif /* _ASM_X86_PARAVIRT_SPINLOCK_H */ diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index ec274d13bae0..b21072af731d 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -19,15 +19,6 @@ #include #include =20 -__visible void __native_queued_spin_unlock(struct qspinlock *lock); -bool pv_is_native_spin_unlock(void); -__visible bool __native_vcpu_is_preempted(long cpu); -bool pv_is_native_vcpu_is_preempted(void); - -#ifdef CONFIG_PARAVIRT_SPINLOCKS -void __init paravirt_set_cap(void); -#endif - /* The paravirtualized I/O functions */ static inline void slow_down_io(void) { @@ -522,46 +513,7 @@ static inline void __set_fixmap(unsigned /* enum fixed= _addresses */ idx, { pv_ops.mmu.set_fixmap(idx, phys, flags); } -#endif - -#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS) - -static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock = *lock, - u32 val) -{ - PVOP_VCALL2(pv_ops, lock.queued_spin_lock_slowpath, lock, val); -} - -static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock) -{ - PVOP_ALT_VCALLEE1(pv_ops, lock.queued_spin_unlock, lock, - "movb $0, (%%" _ASM_ARG1 ");", - ALT_NOT(X86_FEATURE_PVUNLOCK)); -} - -static __always_inline void pv_wait(u8 *ptr, u8 val) -{ - PVOP_VCALL2(pv_ops, lock.wait, ptr, val); -} - -static __always_inline void pv_kick(int cpu) -{ - PVOP_VCALL1(pv_ops, lock.kick, cpu); -} - -static __always_inline bool pv_vcpu_is_preempted(long cpu) -{ - return PVOP_ALT_CALLEE1(bool, pv_ops, lock.vcpu_is_preempted, cpu, - "xor %%" _ASM_AX ", %%" _ASM_AX ";", - ALT_NOT(X86_FEATURE_VCPUPREEMPT)); -} =20 -void __raw_callee_save___native_queued_spin_unlock(struct qspinlock *lock); -bool __raw_callee_save___native_vcpu_is_preempted(long cpu); - -#endif /* SMP && PARAVIRT_SPINLOCKS */ - -#ifdef CONFIG_PARAVIRT_XXL static __always_inline unsigned long arch_local_save_flags(void) { return PVOP_ALT_CALLEE0(unsigned long, pv_ops, irq.save_fl, "pushf; pop %= %rax;", @@ -588,8 +540,6 @@ static __always_inline unsigned long arch_local_irq_sav= e(void) } #endif =20 -void native_pv_lock_init(void) __init; - #else /* __ASSEMBLER__ */ =20 #ifdef CONFIG_X86_64 @@ -613,12 +563,6 @@ void native_pv_lock_init(void) __init; #endif /* __ASSEMBLER__ */ #else /* CONFIG_PARAVIRT */ # define default_banner x86_init_noop - -#ifndef __ASSEMBLER__ -static inline void native_pv_lock_init(void) -{ -} -#endif #endif /* !CONFIG_PARAVIRT */ =20 #ifndef __ASSEMBLER__ @@ -634,10 +578,5 @@ static inline void paravirt_arch_exit_mmap(struct mm_s= truct *mm) } #endif =20 -#ifndef CONFIG_PARAVIRT_SPINLOCKS -static inline void paravirt_set_cap(void) -{ -} -#endif #endif /* __ASSEMBLER__ */ #endif /* _ASM_X86_PARAVIRT_H */ diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 01a485f1a7f1..e2b487d35d14 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -184,22 +184,6 @@ struct pv_mmu_ops { #endif } __no_randomize_layout; =20 -#ifdef CONFIG_SMP -#include -#endif - -struct qspinlock; - -struct pv_lock_ops { - void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); - struct paravirt_callee_save queued_spin_unlock; - - void (*wait)(u8 *ptr, u8 val); - void (*kick)(int cpu); - - struct paravirt_callee_save vcpu_is_preempted; -} __no_randomize_layout; - /* This contains all the paravirt structures: we get a convenient * number for each function using the offset which we use to indicate * what to patch. */ @@ -207,7 +191,6 @@ struct paravirt_patch_template { struct pv_cpu_ops cpu; struct pv_irq_ops irq; struct pv_mmu_ops mmu; - struct pv_lock_ops lock; } __no_randomize_layout; =20 extern struct paravirt_patch_template pv_ops; diff --git a/arch/x86/include/asm/qspinlock.h b/arch/x86/include/asm/qspinl= ock.h index 68da67df304d..a2668bdf4c84 100644 --- a/arch/x86/include/asm/qspinlock.h +++ b/arch/x86/include/asm/qspinlock.h @@ -7,6 +7,9 @@ #include #include #include +#ifdef CONFIG_PARAVIRT +#include +#endif =20 #define _Q_PENDING_LOOPS (1 << 9) =20 @@ -27,89 +30,13 @@ static __always_inline u32 queued_fetch_set_pending_acq= uire(struct qspinlock *lo return val; } =20 -#ifdef CONFIG_PARAVIRT_SPINLOCKS -extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al); -extern void __pv_init_lock_hash(void); -extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val= ); -extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lo= ck); -extern bool nopvspin; - -#define queued_spin_unlock queued_spin_unlock -/** - * queued_spin_unlock - release a queued spinlock - * @lock : Pointer to queued spinlock structure - * - * A smp_store_release() on the least-significant byte. - */ -static inline void native_queued_spin_unlock(struct qspinlock *lock) -{ - smp_store_release(&lock->locked, 0); -} - -static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 v= al) -{ - pv_queued_spin_lock_slowpath(lock, val); -} - -static inline void queued_spin_unlock(struct qspinlock *lock) -{ - kcsan_release(); - pv_queued_spin_unlock(lock); -} - -#define vcpu_is_preempted vcpu_is_preempted -static inline bool vcpu_is_preempted(long cpu) -{ - return pv_vcpu_is_preempted(cpu); -} +#ifndef CONFIG_PARAVIRT_SPINLOCKS +static inline void paravirt_set_cap(void) { } #endif =20 -#ifdef CONFIG_PARAVIRT -/* - * virt_spin_lock_key - disables by default the virt_spin_lock() hijack. - * - * Native (and PV wanting native due to vCPU pinning) should keep this key - * disabled. Native does not touch the key. - * - * When in a guest then native_pv_lock_init() enables the key first and - * KVM/XEN might conditionally disable it later in the boot process again. - */ -DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key); - -/* - * Shortcut for the queued_spin_lock_slowpath() function that allows - * virt to hijack it. - * - * Returns: - * true - lock has been negotiated, all done; - * false - queued_spin_lock_slowpath() will do its thing. - */ -#define virt_spin_lock virt_spin_lock -static inline bool virt_spin_lock(struct qspinlock *lock) -{ - int val; - - if (!static_branch_likely(&virt_spin_lock_key)) - return false; - - /* - * On hypervisors without PARAVIRT_SPINLOCKS support we fall - * back to a Test-and-Set spinlock, because fair locks have - * horrible lock 'holder' preemption issues. - */ - - __retry: - val =3D atomic_read(&lock->val); - - if (val || !atomic_try_cmpxchg(&lock->val, &val, _Q_LOCKED_VAL)) { - cpu_relax(); - goto __retry; - } - - return true; -} - -#endif /* CONFIG_PARAVIRT */ +#ifndef CONFIG_PARAVIRT +static inline void native_pv_lock_init(void) { } +#endif =20 #include =20 diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index bc184dd38d99..e9aeeeafad17 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -126,7 +126,7 @@ obj-$(CONFIG_DEBUG_NMI_SELFTEST) +=3D nmi_selftest.o =20 obj-$(CONFIG_KVM_GUEST) +=3D kvm.o kvmclock.o obj-$(CONFIG_PARAVIRT) +=3D paravirt.o -obj-$(CONFIG_PARAVIRT_SPINLOCKS)+=3D paravirt-spinlocks.o +obj-$(CONFIG_PARAVIRT) +=3D paravirt-spinlocks.o obj-$(CONFIG_PARAVIRT_CLOCK) +=3D pvclock.o obj-$(CONFIG_X86_PMEM_LEGACY_DEVICE) +=3D pmem.o =20 diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index d54fd2bc0402..e767f8ed405a 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -824,8 +824,10 @@ static void __init kvm_guest_init(void) has_steal_clock =3D 1; static_call_update(pv_steal_clock, kvm_steal_clock); =20 - pv_ops.lock.vcpu_is_preempted =3D +#ifdef CONFIG_PARAVIRT_SPINLOCKS + pv_ops_lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(__kvm_vcpu_is_preempted); +#endif } =20 if (kvm_para_has_feature(KVM_FEATURE_PV_EOI)) @@ -1121,11 +1123,11 @@ void __init kvm_spinlock_init(void) pr_info("PV spinlocks enabled\n"); =20 __pv_init_lock_hash(); - pv_ops.lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; - pv_ops.lock.queued_spin_unlock =3D + pv_ops_lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; + pv_ops_lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock); - pv_ops.lock.wait =3D kvm_wait; - pv_ops.lock.kick =3D kvm_kick_cpu; + pv_ops_lock.wait =3D kvm_wait; + pv_ops_lock.kick =3D kvm_kick_cpu; =20 /* * When PV spinlock is enabled which is preferred over diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravir= t-spinlocks.c index 9e1ea99ad9df..95452444868f 100644 --- a/arch/x86/kernel/paravirt-spinlocks.c +++ b/arch/x86/kernel/paravirt-spinlocks.c @@ -3,12 +3,22 @@ * Split spinlock implementation out into its own file, so it can be * compiled in a FTRACE-compatible way. */ +#include #include #include #include =20 -#include +DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); =20 +#ifdef CONFIG_SMP +void __init native_pv_lock_init(void) +{ + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) + static_branch_enable(&virt_spin_lock_key); +} +#endif + +#ifdef CONFIG_PARAVIRT_SPINLOCKS __visible void __native_queued_spin_unlock(struct qspinlock *lock) { native_queued_spin_unlock(lock); @@ -17,7 +27,7 @@ PV_CALLEE_SAVE_REGS_THUNK(__native_queued_spin_unlock); =20 bool pv_is_native_spin_unlock(void) { - return pv_ops.lock.queued_spin_unlock.func =3D=3D + return pv_ops_lock.queued_spin_unlock.func =3D=3D __raw_callee_save___native_queued_spin_unlock; } =20 @@ -29,7 +39,7 @@ PV_CALLEE_SAVE_REGS_THUNK(__native_vcpu_is_preempted); =20 bool pv_is_native_vcpu_is_preempted(void) { - return pv_ops.lock.vcpu_is_preempted.func =3D=3D + return pv_ops_lock.vcpu_is_preempted.func =3D=3D __raw_callee_save___native_vcpu_is_preempted; } =20 @@ -41,3 +51,13 @@ void __init paravirt_set_cap(void) if (!pv_is_native_vcpu_is_preempted()) setup_force_cpu_cap(X86_FEATURE_VCPUPREEMPT); } + +struct pv_lock_ops pv_ops_lock =3D { + .queued_spin_lock_slowpath =3D native_queued_spin_lock_slowpath, + .queued_spin_unlock =3D PV_CALLEE_SAVE(__native_queued_spin_unlock), + .wait =3D paravirt_nop, + .kick =3D paravirt_nop, + .vcpu_is_preempted =3D PV_CALLEE_SAVE(__native_vcpu_is_preempted), +}; +EXPORT_SYMBOL(pv_ops_lock); +#endif diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 5dfbd3f55792..a6ed52cae003 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -57,14 +57,6 @@ DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.te= xt); DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text); #endif =20 -DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key); - -void __init native_pv_lock_init(void) -{ - if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) - static_branch_enable(&virt_spin_lock_key); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); @@ -221,19 +213,6 @@ struct paravirt_patch_template pv_ops =3D { =20 .mmu.set_fixmap =3D native_set_fixmap, #endif /* CONFIG_PARAVIRT_XXL */ - -#if defined(CONFIG_PARAVIRT_SPINLOCKS) - /* Lock ops. */ -#ifdef CONFIG_SMP - .lock.queued_spin_lock_slowpath =3D native_queued_spin_lock_slowpath, - .lock.queued_spin_unlock =3D - PV_CALLEE_SAVE(__native_queued_spin_unlock), - .lock.wait =3D paravirt_nop, - .lock.kick =3D paravirt_nop, - .lock.vcpu_is_preempted =3D - PV_CALLEE_SAVE(__native_vcpu_is_preempted), -#endif /* SMP */ -#endif }; =20 #ifdef CONFIG_PARAVIRT_XXL diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c index fe56646d6919..83ac24ead289 100644 --- a/arch/x86/xen/spinlock.c +++ b/arch/x86/xen/spinlock.c @@ -134,10 +134,10 @@ void __init xen_init_spinlocks(void) printk(KERN_DEBUG "xen: PV spinlocks enabled\n"); =20 __pv_init_lock_hash(); - pv_ops.lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; - pv_ops.lock.queued_spin_unlock =3D + pv_ops_lock.queued_spin_lock_slowpath =3D __pv_queued_spin_lock_slowpath; + pv_ops_lock.queued_spin_unlock =3D PV_CALLEE_SAVE(__pv_queued_spin_unlock); - pv_ops.lock.wait =3D xen_qlock_wait; - pv_ops.lock.kick =3D xen_qlock_kick; - pv_ops.lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(xen_vcpu_stolen); + pv_ops_lock.wait =3D xen_qlock_wait; + pv_ops_lock.kick =3D xen_qlock_kick; + pv_ops_lock.vcpu_is_preempted =3D PV_CALLEE_SAVE(xen_vcpu_stolen); } diff --git a/tools/objtool/check.c b/tools/objtool/check.c index d63d0891924a..36e04988babe 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -550,6 +550,7 @@ static struct { int idx_off; } pv_ops_tables[] =3D { { .name =3D "pv_ops", }, + { .name =3D "pv_ops_lock", }, { .name =3D NULL, .idx_off =3D -1 } }; =20 --=20 2.51.0