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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7d15f080beasm908717b3a.47.2025.11.26.23.45.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Nov 2025 23:45:12 -0800 (PST) From: Wangao Wang Date: Thu, 27 Nov 2025 15:44:35 +0800 Subject: [PATCH 4/4] media: qcom: iris: Add hierarchical coding support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251127-batch2_iris_encoder_enhancements-v1-4-5ea78e2de2ae@oss.qualcomm.com> References: <20251127-batch2_iris_encoder_enhancements-v1-0-5ea78e2de2ae@oss.qualcomm.com> In-Reply-To: <20251127-batch2_iris_encoder_enhancements-v1-0-5ea78e2de2ae@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: quic_qiweil@quicinc.com, Renjiang Han , Wangao Wang , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764229495; l=18109; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=Ea0vDlKU08/F/UtAyGa9XDtAIMTF4SPkrnLxuvmaxBs=; b=/ftO5f3T+NENrgTgohgOujhmUQ4aiOr+YGb29SlbUJr5CMTrCmTEqtvwqE5oatt5Obr0dt0G0 ZXn6KUI1OfyDMPMgn0xZsCfZtj7kR6UkpyHnAxslinbWPL9YKYR6LMy X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Authority-Analysis: v=2.4 cv=E+XAZKdl c=1 sm=1 tr=0 ts=6928018b cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=Y9qDfvMG5m6eF9zHI1sA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI3MDA1NCBTYWx0ZWRfX/mv1/0Oj+NGI xLDIyxYaIdWB+4OU5bZGHbqbWqV2lCLwUZDxUH7xYwG8LctWi9Ima1Ude/991hzsAehOpGfNRr+ IbDmLwOpy4uuo/rA5cEnHCPWKNjmIM/obe870gQqhGGseTxsVPxnnt+m3qr712g7MeM85lfoceV m7qbsiW2sgYdaroccjBoqYrz+1qcATGjtKHUC1Gc49chFl0R3Jbm476NlDTslc2sFfeKtMq6wxa +M/gmvEdQez6I9ZCJCgHu3iNYuqVFt1eZjbt5o1/jlfLNAxfRaDVna7uV63NYwkIZ7qAWVncpY8 UNvE+FbvZMurXEgECBuqRI3yt56kla0x9ODfx/eq6Ym2JY1aIrth0Nr3CxxOBCf5eDhp2F5vnah lJBb+wHJVkzzOt9XIw6cEf/ynucKuw== X-Proofpoint-ORIG-GUID: wbA3K5HcmymrDUHw5olzSxb2-fjeB5zu X-Proofpoint-GUID: wbA3K5HcmymrDUHw5olzSxb2-fjeB5zu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-25_02,2025-11-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 phishscore=0 bulkscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511270054 Add hierarchical coding support for both gen1 and gen2 encoders by enabling the following V4L2 controls: H264: V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER HEVC(gen2 only): V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER Key changes: Added capability IDs for hierarchical coding enable, type, and layer count. Implemented handlers for layer type and layer count (gen1/gen2). Defined new HFI properties and enums for hierarchical coding. Updated platform capability tables and buffer logic to handle hierarchical coding. Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_ctrls.c | 150 +++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 3 + .../platform/qcom/iris/iris_hfi_gen1_command.c | 14 ++ .../platform/qcom/iris/iris_hfi_gen1_defines.h | 2 + .../platform/qcom/iris/iris_hfi_gen2_defines.h | 9 ++ drivers/media/platform/qcom/iris/iris_instance.h | 4 + .../platform/qcom/iris/iris_platform_common.h | 11 ++ .../media/platform/qcom/iris/iris_platform_gen1.c | 26 ++++ .../media/platform/qcom/iris/iris_platform_gen2.c | 48 +++++++ drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 21 +++ 10 files changed, 288 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 9aec8a2006e9f8e545d05e40cb68ef0ae8502f79..99b6cfdd726258f753b3d192014= 4044e5aa76f29 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -116,6 +116,16 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(= u32 id) return MARK_LTR; case V4L2_CID_MPEG_VIDEO_B_FRAMES: return B_FRAME; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING: + return LAYER_ENABLE; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: + return LAYER_TYPE_H264; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: + return LAYER_TYPE_HEVC; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: + return LAYER_COUNT_H264; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: + return LAYER_COUNT_HEVC; default: return INST_FW_CAP_MAX; } @@ -221,6 +231,16 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_= type cap_id) return V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX; case B_FRAME: return V4L2_CID_MPEG_VIDEO_B_FRAMES; + case LAYER_ENABLE: + return V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING; + case LAYER_TYPE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE; + case LAYER_TYPE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE; + case LAYER_COUNT_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER; + case LAYER_COUNT_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER; default: return 0; } @@ -1173,6 +1193,136 @@ int iris_set_intra_period(struct iris_inst *inst, e= num platform_inst_fw_cap_type &intra_period, sizeof(intra_period)); } =20 +int iris_set_layer_type(struct iris_inst *inst, enum platform_inst_fw_cap_= type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 layer_enable =3D inst->fw_caps[LAYER_ENABLE].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 layer_type; + + if (inst->hfi_rc_type =3D=3D HFI_RATE_CONTROL_CQ || + inst->hfi_rc_type =3D=3D HFI_RATE_CONTROL_OFF) + return -EINVAL; + + if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { + if (!layer_enable || !inst->fw_caps[LAYER_COUNT_H264].value) + return -EINVAL; + + if (inst->fw_caps[LAYER_TYPE_H264].value =3D=3D + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P) { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_type =3D HFI_HIER_P_HYBRID_LTR; + else + layer_type =3D HFI_HIER_P_SLIDING_WINDOW; + } else if (inst->fw_caps[LAYER_TYPE_HEVC].value =3D=3D + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_type =3D HFI_HIER_B; + else + return -EINVAL; + } else { + return -EINVAL; + } + } else if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { + if (!inst->fw_caps[LAYER_COUNT_HEVC].value) + return -EINVAL; + + if (inst->fw_caps[LAYER_TYPE_HEVC].value =3D=3D + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P) { + layer_type =3D HFI_HIER_P_SLIDING_WINDOW; + } else if (inst->fw_caps[LAYER_TYPE_HEVC].value =3D=3D + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_type =3D HFI_HIER_B; + else + return -EINVAL; + } else { + return -EINVAL; + } + } + + inst->hfi_layer_type =3D layer_type; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32_ENUM, + &layer_type, sizeof(u32)); +} + +int iris_set_layer_count_gen1(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct vb2_queue *sq =3D v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 layer_enable =3D inst->fw_caps[LAYER_ENABLE].value; + u32 layer_count =3D inst->fw_caps[cap_id].value; + u32 hfi_id; + + if (!layer_enable || !layer_count) + return -EINVAL; + + inst->hfi_layer_count =3D layer_count; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) { + hfi_id =3D HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER; + hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &layer_count, sizeof(u32)); + } + + hfi_id =3D inst->fw_caps[cap_id].hfi_id; + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &layer_count, sizeof(u32)); +} + +int iris_set_layer_count_gen2(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 layer_type =3D inst->hfi_layer_type; + u32 layer_count, layer_count_max; + + layer_count =3D (inst->codec =3D=3D V4L2_PIX_FMT_H264) ? + inst->fw_caps[LAYER_COUNT_H264].value : + inst->fw_caps[LAYER_COUNT_HEVC].value; + + if (!layer_type || !layer_count) + return -EINVAL; + + if (layer_type =3D=3D HFI_HIER_B) { + layer_count_max =3D MAX_LAYER_HB; + } else if (layer_type =3D=3D HFI_HIER_P_HYBRID_LTR) { + layer_count_max =3D MAX_AVC_LAYER_HP_HYBRID_LTR; + } else if (layer_type =3D=3D HFI_HIER_P_SLIDING_WINDOW) { + if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { + layer_count_max =3D MAX_AVC_LAYER_HP_SLIDING_WINDOW; + } else { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_count_max =3D MAX_HEVC_VBR_LAYER_HP_SLIDING_WINDOW; + else + layer_count_max =3D MAX_HEVC_LAYER_HP_SLIDING_WINDOW; + } + } + + if (layer_count > layer_count_max) + layer_count =3D layer_count_max; + + layer_count +=3D 1; /* base layer */ + inst->hfi_layer_count =3D layer_count; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &layer_count, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 609258c81517b71523b682ca994786cdd020b07f..d7db8749273c73348e7dc1c344d= 720a97d571e24 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -42,6 +42,9 @@ int iris_set_use_ltr(struct iris_inst *inst, enum platfor= m_inst_fw_cap_type cap_ int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); int iris_set_intra_period(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id); +int iris_set_layer_type(struct iris_inst *inst, enum platform_inst_fw_cap_= type cap_id); +int iris_set_layer_count_gen1(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); +int iris_set_layer_count_gen2(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index fe51eccb903be146e83a4fb2faf4b4092875dea4..1e001e2639a1d913c81ed643f80= 71cd561767651 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -726,6 +726,20 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_s= ession_set_property_pkt *p packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_period); break; } + case HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER: { + u32 *in =3D pdata; + + packet->data[1] =3D *in; + packet->shdr.hdr.size +=3D sizeof(u32) * 2; + break; + } + case HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER: { + u32 *in =3D pdata; + + packet->data[1] =3D *in; + packet->shdr.hdr.size +=3D sizeof(u32) * 2; + break; + } default: return -EINVAL; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_defines.h index 476177add1ec860d46d85960dd09617ad347f60a..7ecfd23a925c83d82912c1ab4ca= 148e5cc35e142 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h @@ -154,11 +154,13 @@ =20 #define HFI_PROPERTY_PARAM_VENC_LTRMODE 0x200501c #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES 0x2005020 +#define HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER 0x2005026 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE 0x2006001 #define HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD 0x2006003 #define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME 0x2006009 #define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME 0x200600a #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER 0x2006008 +#define HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER 0x200600b =20 struct hfi_pkt_hdr { u32 size; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index 2b8c87c25a066ead30bb1b134bdc3fe1e84e8f05..3a689d3f53b4e8750a33e8bc78a= 8df7a023d7a56 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -74,6 +74,15 @@ enum hfi_rate_control { #define HFI_PROP_LTR_COUNT 0x03000134 #define HFI_PROP_LTR_MARK 0x03000135 #define HFI_PROP_LTR_USE 0x03000136 + +enum hfi_layer_encoding_type { + HFI_HIER_P_SLIDING_WINDOW =3D 0x1, + HFI_HIER_P_HYBRID_LTR =3D 0x2, + HFI_HIER_B =3D 0x3, +}; + +#define HFI_PROP_LAYER_ENCODING_TYPE 0x03000138 +#define HFI_PROP_LAYER_COUNT 0x03000139 #define HFI_PROP_TOTAL_BITRATE 0x0300013b #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 #define HFI_PROP_MAX_B_FRAMES 0x03000147 diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/med= ia/platform/qcom/iris/iris_instance.h index 0a0d4ace0bb6bee6ab11bd47fddb27432cd524f7..f4aa904f94ebb3c87bcdeeb6c37= 32b616d030b96 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -73,6 +73,8 @@ struct iris_fmt { * @enc_raw_height: source image height for encoder instance * @enc_scale_width: scale width for encoder instance * @enc_scale_height: scale height for encoder instance + * @hfi_layer_type: hierarchical coding layer type + * @hfi_layer_count: hierarchical coding layer count */ =20 struct iris_inst { @@ -115,6 +117,8 @@ struct iris_inst { u32 enc_raw_height; u32 enc_scale_width; u32 enc_scale_height; + u32 hfi_layer_type; + u32 hfi_layer_count; }; =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 34deb32eb5be0899fee779ff99b3f4b8bd91529f..db80617dbdc865c5a10708968f3= 4987972d935f7 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -32,6 +32,12 @@ struct iris_inst; #define INVALID_DEFAULT_MARK_OR_USE_LTR -1 #define MAX_LTR_FRAME_COUNT_GEN1 4 #define MAX_LTR_FRAME_COUNT_GEN2 2 +#define MAX_LAYER_HB 3 +#define MAX_AVC_LAYER_HP_HYBRID_LTR 5 +#define MAX_AVC_LAYER_HP_SLIDING_WINDOW 3 +#define MAX_HEVC_LAYER_HP_SLIDING_WINDOW 3 +#define MAX_HEVC_VBR_LAYER_HP_SLIDING_WINDOW 5 +#define MAX_HIER_CODING_LAYER_GEN1 6 =20 enum stage_type { STAGE_1 =3D 1, @@ -156,6 +162,11 @@ enum platform_inst_fw_cap_type { MARK_LTR, B_FRAME, INTRA_PERIOD, + LAYER_ENABLE, + LAYER_TYPE_H264, + LAYER_TYPE_HEVC, + LAYER_COUNT_H264, + LAYER_COUNT_HEVC, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index b76f0ecaa721f3469bc63b7ff4ce5fc6ea19a8e1..ba5d0ddb87f4b3dc21f81027e70= 11a6acda3854d 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -296,6 +296,32 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8250_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_intra_period, }, + { + .cap_id =3D LAYER_ENABLE, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .flags =3D CAP_FLAG_OUTPUT_PORT, + }, + { + .cap_id =3D LAYER_TYPE_H264, + .min =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .max =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + .value =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id =3D LAYER_COUNT_H264, + .min =3D 0, + .max =3D MAX_HIER_CODING_LAYER_GEN1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_layer_count_gen1, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8250 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 7c9a71755685d195a7adc8064523e1c33a572089..e9c4a62a891c34bc0969c0fd4ea= 33a9d9b11c93d 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -677,6 +677,54 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8550_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_u32, }, + { + .cap_id =3D LAYER_ENABLE, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .flags =3D CAP_FLAG_OUTPUT_PORT, + }, + { + .cap_id =3D LAYER_TYPE_H264, + .min =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + .max =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + .value =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .hfi_id =3D HFI_PROP_LAYER_ENCODING_TYPE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id =3D LAYER_TYPE_HEVC, + .min =3D V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + .max =3D V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + .value =3D V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + .hfi_id =3D HFI_PROP_LAYER_ENCODING_TYPE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + .set =3D iris_set_layer_type, + }, + { + .cap_id =3D LAYER_COUNT_H264, + .min =3D 0, + .max =3D 5, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_LAYER_COUNT, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + }, + { + .cap_id =3D LAYER_COUNT_HEVC, + .min =3D 0, + .max =3D 5, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_LAYER_COUNT, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_count_gen2, + } }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index 4a854a4dab322eabb16a52b1cf816c18d78acc81..dfdffcf08b6837936b7be1f1a1f= 109d2bb8203c6 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -670,6 +670,8 @@ static u32 iris_vpu_enc_bin_size(struct iris_inst *inst) =20 static inline u32 hfi_buffer_get_recon_count(struct iris_inst *inst) { + u32 layer_count =3D inst->hfi_layer_count; + u32 layer_type =3D inst->hfi_layer_type; u32 bframe_count, ltr_count; u32 num_ref =3D 1; =20 @@ -679,9 +681,28 @@ static inline u32 hfi_buffer_get_recon_count(struct ir= is_inst *inst) if (bframe_count) num_ref =3D 2; =20 + if (layer_type =3D=3D HFI_HIER_P_HYBRID_LTR) + num_ref =3D (layer_count + 1) >> 1; + + if (layer_type =3D=3D HFI_HIER_P_SLIDING_WINDOW) { + if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) + num_ref =3D (layer_count + 1) >> 1; + else if (inst->codec =3D=3D V4L2_PIX_FMT_H264 && layer_count < 4) + num_ref =3D (layer_count - 1); + else + num_ref =3D layer_count; + } + if (ltr_count) num_ref =3D num_ref + ltr_count; =20 + if (layer_type =3D=3D HFI_HIER_B) { + if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) + num_ref =3D layer_count; + else + num_ref =3D (1 << (layer_count - 2)) + 1; + } + return num_ref + 1; } =20 --=20 2.43.0