From nobody Mon Dec 1 23:06:55 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 492F8217F24; Wed, 26 Nov 2025 13:05:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764162335; cv=none; b=ecAGpJPCrZ1Fg/9o6XyMgGVSw5O/L8fM5MQFEEjX18MdyGdl7V1I6FubreRYwEXnNtfNnXrSq6vQnKX0mviL4vpffsw3ABrKYHOQd7QwdJIdFog/aBhpWLuH6y7skFQFbkoObVV+BgSg7jzEsgY8VYm6e+sKG6a8QxPzGzdJvBs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764162335; c=relaxed/simple; bh=7L7JOzyPcvDo9Od/8Tjg3cCu2Fr61nW5NsWYbOOzMQM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MI1HN5dlX4pFmmcstufM5mHnMzRWqpxHIF2FctJ0l4JZw37/pXL9s4MlfH2KmzM+3MjbcJcU63vAOVDNYI0ZcgGkMLk4+JsWuFN182fK3l0YLSmONQxE+VwtlladqICVTE5UjTL/AmoB7UkcIA5MyeYd/vcXjfmSNSRgwEE5/YM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: r6ppf+1DQA+z5G+d0g4vjw== X-CSE-MsgGUID: cpbLmtScS9azLzf7tQX3bQ== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 26 Nov 2025 22:05:33 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.98]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 4B157400EF74; Wed, 26 Nov 2025 22:05:28 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Philipp Zabel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v3 8/9] arm64: dts: renesas: r9a09g077: add TSU and thermal zones support Date: Wed, 26 Nov 2025 15:03:55 +0200 Message-ID: <20251126130356.2768625-9-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251126130356.2768625-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251126130356.2768625-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) SoC includes a Temperature Sensor Unit (TSU). The device provides real-time temperature measurements for thermal management, utilizing a single dedicated channel for temperature sensing. The TSU loads calibration data via SMC SIP. Signed-off-by: Cosmin Tanislav --- V3: * no changes V2: * no changes arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index ca61f7846c5e..d59f70d9f8a9 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -36,6 +36,7 @@ cpu0: cpu@0 { next-level-cache =3D <&L3_CA55>; enable-method =3D "psci"; clocks =3D <&cpg CPG_CORE R9A09G077_CLK_CA55C0>; + #cooling-cells =3D <2>; operating-points-v2 =3D <&cluster0_opp>; }; =20 @@ -46,6 +47,7 @@ cpu1: cpu@100 { next-level-cache =3D <&L3_CA55>; enable-method =3D "psci"; clocks =3D <&cpg CPG_CORE R9A09G077_CLK_CA55C1>; + #cooling-cells =3D <2>; operating-points-v2 =3D <&cluster0_opp>; }; =20 @@ -56,6 +58,7 @@ cpu2: cpu@200 { next-level-cache =3D <&L3_CA55>; enable-method =3D "psci"; clocks =3D <&cpg CPG_CORE R9A09G077_CLK_CA55C2>; + #cooling-cells =3D <2>; operating-points-v2 =3D <&cluster0_opp>; }; =20 @@ -66,6 +69,7 @@ cpu3: cpu@300 { next-level-cache =3D <&L3_CA55>; enable-method =3D "psci"; clocks =3D <&cpg CPG_CORE R9A09G077_CLK_CA55C3>; + #cooling-cells =3D <2>; operating-points-v2 =3D <&cluster0_opp>; }; =20 @@ -244,6 +248,17 @@ wdt5: watchdog@80083400 { status =3D "disabled"; }; =20 + tsu: thermal@80086000 { + compatible =3D "renesas,r9a09g077-tsu"; + reg =3D <0 0x80086000 0 0x1000>; + interrupts =3D , + ; + interrupt-names =3D "adi", "adcmpi"; + clocks =3D <&cpg CPG_MOD 307>; + power-domains =3D <&cpg>; + #thermal-sensor-cells =3D <0>; + }; + i2c0: i2c@80088000 { compatible =3D "renesas,riic-r9a09g077"; reg =3D <0 0x80088000 0 0x400>; @@ -952,6 +967,37 @@ sdhi1_vqmmc: vqmmc-regulator { }; }; =20 + thermal-zones { + cpu-thermal { + polling-delay =3D <1000>; + polling-delay-passive =3D <250>; + thermal-sensors =3D <&tsu>; + + cooling-maps { + map0 { + trip =3D <&target>; + cooling-device =3D <&cpu0 0 1>, <&cpu1 0 1>, + <&cpu2 0 1>, <&cpu3 0 1>; + contribution =3D <1024>; + }; + }; + + trips { + target: trip-point { + temperature =3D <95000>; + hysteresis =3D <1000>; + type =3D "passive"; + }; + + sensor_crit: sensor-crit { + temperature =3D <120000>; + hysteresis =3D <1000>; + type =3D "critical"; + }; + }; + }; + }; + stmmac_axi_setup: stmmac-axi-config { snps,lpi_en; snps,wr_osr_lmt =3D <0xf>; --=20 2.52.0