From nobody Mon Dec 1 23:06:56 2025 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8B4BA1F9F47; Wed, 26 Nov 2025 13:04:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764162295; cv=none; b=DcHqOlEQG6qoY5oF4P6yTMF3QZVMtisTuMHRUyi5J3PydMTd972VlIr9OewULrBAXrWGACwFbdgcWLj/bPKOC3dJfWICmSZJZMTBHa/cOz15+uMk9Zm/3WE2UWouVg06I851hCZ16I6mWu4lMLkz0gJ+TRKT9xdpgqcalEHtwdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764162295; c=relaxed/simple; bh=M0x5/t/mwATltuD96QkP0RYumSKKZX9WxjovT1nuazE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YABNAwAHRVxqH/b0JHhME1N3pwSvaZoZHk8ClS9Q5Lez+OP0ujt7AI7b5FUipXzrKbGXDfG1iiBn5rXW3QGOaw1ipiGllv4Rt6MlzHWzyzAob5iXKl1hkarZDUhGQn9y69BGOt3lgG6Y0rOhZ58Do84wZ1TcQz4DqFIvkv/HOaY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: xubRuzV/Rw6g9Qz1yzDh3A== X-CSE-MsgGUID: vy0v+ysgSfmYd5PCcaEvUw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 26 Nov 2025 22:04:49 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.98]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 9241F400EF74; Wed, 26 Nov 2025 22:04:44 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Philipp Zabel Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v3 1/9] thermal: renesas: rzg3e: make reset optional Date: Wed, 26 Nov 2025 15:03:48 +0200 Message-ID: <20251126130356.2768625-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251126130356.2768625-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251126130356.2768625-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs do not have a reset line. Prepare for them by making it optional. Signed-off-by: Cosmin Tanislav --- V3: * no changes V2: * no changes drivers/thermal/renesas/rzg3e_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/rene= sas/rzg3e_thermal.c index e66d73ca6752..86c10810e5bf 100644 --- a/drivers/thermal/renesas/rzg3e_thermal.c +++ b/drivers/thermal/renesas/rzg3e_thermal.c @@ -412,7 +412,7 @@ static int rzg3e_thermal_probe(struct platform_device *= pdev) "Clock rate %lu Hz too low (min %u Hz)\n", clk_get_rate(clk), TSU_MIN_CLOCK_RATE); =20 - priv->rstc =3D devm_reset_control_get_exclusive_deasserted(dev, NULL); + priv->rstc =3D devm_reset_control_get_optional_exclusive_deasserted(dev, = NULL); if (IS_ERR(priv->rstc)) return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get/deassert reset control\n"); --=20 2.52.0