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[86.162.200.138]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4790b0c3a28sm36441245e9.9.2025.11.26.02.43.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Nov 2025 02:43:13 -0800 (PST) From: Biju X-Google-Original-From: Biju To: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: Biju Das , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org, stable@kernel.org Subject: [PATCH v6] pwm: rzg2l-gpt: Allow checking period_tick cache value only if sibling channel is enabled Date: Wed, 26 Nov 2025 10:42:48 +0000 Message-ID: <20251126104308.142302-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das The rzg2l_gpt_config() tests the rzg2l_gpt->period_tick variable when both channels of a hardware channel are in use. This check is not valid if rzg2l_gpt_config() is called after disabling all the channels, as it tests against the cached value. Hence, allow checking and setting the cached value only if the sibling channel is enabled. While at it, drop else after return statement to fix the check patch warning. Cc: stable@kernel.org Fixes: 061f087f5d0b ("pwm: Add support for RZ/G2L GPT") Signed-off-by: Biju Das --- v5->v6: * Updated commit header and description. * Added rzg2l_gpt_sibling() for finding sibling channel. * Replaced local variable other_sub_ch->sibling_ch. * Dropped setting rzg2l_gpt->period_ticks[ch] in rzg2l_gpt_disable() as it is not needed. * Dropped else after return statement to fix the check patch warning. v4->v5: * Updated commit description and code comment to give more details on why reinitialising the cached value to zero * Added a check in rzg2l_gpt_config(), to prevent setting the cached value= , if the other channel is not enabled. v3->v4: * Split the patch as separate from [1] for easy merging. * Updated commit description * Added comments about the fix in rzg2l_gpt_disable() v3: * New patch [1] https://lore.kernel.org/all/20250915163637.3572-1-biju.das.jz@bp.renesa= s.com/#t --- drivers/pwm/pwm-rzg2l-gpt.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c index 360c8bf3b190..4856af080e8e 100644 --- a/drivers/pwm/pwm-rzg2l-gpt.c +++ b/drivers/pwm/pwm-rzg2l-gpt.c @@ -96,6 +96,11 @@ static inline unsigned int rzg2l_gpt_subchannel(unsigned= int hwpwm) return hwpwm & 0x1; } =20 +static inline unsigned int rzg2l_gpt_sibling(unsigned int hwpwm) +{ + return hwpwm ^ 0x1; +} + static void rzg2l_gpt_write(struct rzg2l_gpt_chip *rzg2l_gpt, u32 reg, u32= data) { writel(data, rzg2l_gpt->mmio + reg); @@ -271,10 +276,14 @@ static int rzg2l_gpt_config(struct pwm_chip *chip, st= ruct pwm_device *pwm, * in use with different settings. */ if (rzg2l_gpt->channel_request_count[ch] > 1) { - if (period_ticks < rzg2l_gpt->period_ticks[ch]) - return -EBUSY; - else + u8 sibling_ch =3D rzg2l_gpt_sibling(pwm->hwpwm); + + if (rzg2l_gpt_is_ch_enabled(rzg2l_gpt, sibling_ch)) { + if (period_ticks < rzg2l_gpt->period_ticks[ch]) + return -EBUSY; + period_ticks =3D rzg2l_gpt->period_ticks[ch]; + } } =20 prescale =3D rzg2l_gpt_calculate_prescale(rzg2l_gpt, period_ticks); --=20 2.43.0