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charset="utf-8" Add a new compatible string "qcom,kaanapali-fastrpc" to support for Kaanapali SoC. Signed-off-by: Kumari Pallavi --- Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Doc= umentation/devicetree/bindings/misc/qcom,fastrpc.yaml index 3f6199fc9ae6..6c19217d63a6 100644 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -18,7 +18,10 @@ description: | =20 properties: compatible: - const: qcom,fastrpc + items: + - enum: + - qcom,kaanapali-fastrpc + - qcom,fastrpc =20 label: enum: --=20 2.34.1 From nobody Mon Dec 1 23:34:58 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A65C62FF668; Wed, 26 Nov 2025 09:46:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" pdate all references of buf->phys and map->phys to buf->dma_addr and map->dma_addr to accurately represent that these fields store DMA addresses, not physical addresses. This change improves code clarity and aligns with kernel conventions for dma_addr_t usage. Signed-off-by: Kumari Pallavi --- drivers/misc/fastrpc.c | 77 ++++++++++++++++++++++-------------------- 1 file changed, 41 insertions(+), 36 deletions(-) diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c index ee652ef01534..c7ebfb095c4d 100644 --- a/drivers/misc/fastrpc.c +++ b/drivers/misc/fastrpc.c @@ -106,7 +106,7 @@ #define miscdev_to_fdevice(d) container_of(d, struct fastrpc_device, miscd= ev) =20 struct fastrpc_phy_page { - u64 addr; /* physical address */ + dma_addr_t addr; /* dma address */ u64 size; /* size of contiguous region */ }; =20 @@ -171,7 +171,7 @@ struct fastrpc_msg { u64 ctx; /* invoke caller context */ u32 handle; /* handle to invoke */ u32 sc; /* scalars structure describing the data */ - u64 addr; /* physical address */ + dma_addr_t addr; /* dma address */ u64 size; /* size of contiguous region */ }; =20 @@ -194,7 +194,7 @@ struct fastrpc_buf { struct dma_buf *dmabuf; struct device *dev; void *virt; - u64 phys; + dma_addr_t dma_addr; u64 size; /* Lock for dma buf attachments */ struct mutex lock; @@ -217,7 +217,7 @@ struct fastrpc_map { struct dma_buf *buf; struct sg_table *table; struct dma_buf_attachment *attach; - u64 phys; + dma_addr_t dma_addr; u64 size; void *va; u64 len; @@ -320,11 +320,12 @@ static void fastrpc_free_map(struct kref *ref) =20 perm.vmid =3D QCOM_SCM_VMID_HLOS; perm.perm =3D QCOM_SCM_PERM_RWX; - err =3D qcom_scm_assign_mem(map->phys, map->len, + err =3D qcom_scm_assign_mem(map->dma_addr, map->len, &src_perms, &perm, 1); if (err) { - dev_err(map->fl->sctx->dev, "Failed to assign memory phys 0x%llx size = 0x%llx err %d\n", - map->phys, map->len, err); + dev_err(map->fl->sctx->dev, + "Failed to assign memory dma_addr 0x%llx size 0x%llx err %d\n", + map->dma_addr, map->len, err); return; } } @@ -389,7 +390,7 @@ static int fastrpc_map_lookup(struct fastrpc_user *fl, = int fd, static void fastrpc_buf_free(struct fastrpc_buf *buf) { dma_free_coherent(buf->dev, buf->size, buf->virt, - FASTRPC_PHYS(buf->phys)); + FASTRPC_PHYS(buf->dma_addr)); kfree(buf); } =20 @@ -408,12 +409,12 @@ static int __fastrpc_buf_alloc(struct fastrpc_user *f= l, struct device *dev, =20 buf->fl =3D fl; buf->virt =3D NULL; - buf->phys =3D 0; + buf->dma_addr =3D 0; buf->size =3D size; buf->dev =3D dev; buf->raddr =3D 0; =20 - buf->virt =3D dma_alloc_coherent(dev, buf->size, (dma_addr_t *)&buf->phys, + buf->virt =3D dma_alloc_coherent(dev, buf->size, &buf->dma_addr, GFP_KERNEL); if (!buf->virt) { mutex_destroy(&buf->lock); @@ -439,7 +440,7 @@ static int fastrpc_buf_alloc(struct fastrpc_user *fl, s= truct device *dev, buf =3D *obuf; =20 if (fl->sctx && fl->sctx->sid) - buf->phys +=3D ((u64)fl->sctx->sid << 32); + buf->dma_addr +=3D ((u64)fl->sctx->sid << 32); =20 return 0; } @@ -684,7 +685,7 @@ static int fastrpc_dma_buf_attach(struct dma_buf *dmabu= f, return -ENOMEM; =20 ret =3D dma_get_sgtable(buffer->dev, &a->sgt, buffer->virt, - FASTRPC_PHYS(buffer->phys), buffer->size); + FASTRPC_PHYS(buffer->dma_addr), buffer->size); if (ret < 0) { dev_err(buffer->dev, "failed to get scatterlist from DMA API\n"); kfree(a); @@ -733,7 +734,7 @@ static int fastrpc_mmap(struct dma_buf *dmabuf, dma_resv_assert_held(dmabuf->resv); =20 return dma_mmap_coherent(buf->dev, vma, buf->virt, - FASTRPC_PHYS(buf->phys), size); + FASTRPC_PHYS(buf->dma_addr), size); } =20 static const struct dma_buf_ops fastrpc_dma_buf_ops =3D { @@ -785,10 +786,10 @@ static int fastrpc_map_attach(struct fastrpc_user *fl= , int fd, map->table =3D table; =20 if (attr & FASTRPC_ATTR_SECUREMAP) { - map->phys =3D sg_phys(map->table->sgl); + map->dma_addr =3D sg_phys(map->table->sgl); } else { - map->phys =3D sg_dma_address(map->table->sgl); - map->phys +=3D ((u64)fl->sctx->sid << 32); + map->dma_addr =3D sg_dma_address(map->table->sgl); + map->dma_addr +=3D ((u64)fl->sctx->sid << 32); } for_each_sg(map->table->sgl, sgl, map->table->nents, sgl_index) @@ -815,10 +816,11 @@ static int fastrpc_map_attach(struct fastrpc_user *fl= , int fd, dst_perms[1].vmid =3D fl->cctx->vmperms[0].vmid; dst_perms[1].perm =3D QCOM_SCM_PERM_RWX; map->attr =3D attr; - err =3D qcom_scm_assign_mem(map->phys, (u64)map->len, &src_perms, dst_pe= rms, 2); + err =3D qcom_scm_assign_mem(map->dma_addr, (u64)map->len, &src_perms, ds= t_perms, 2); if (err) { - dev_err(sess->dev, "Failed to assign memory with phys 0x%llx size 0x%ll= x err %d\n", - map->phys, map->len, err); + dev_err(sess->dev, + "Failed to assign memory with dma_addr 0x%llx size 0x%llx err %d\n", + map->dma_addr, map->len, err); goto map_err; } } @@ -1009,7 +1011,7 @@ static int fastrpc_get_args(u32 kernel, struct fastrp= c_invoke_ctx *ctx) struct vm_area_struct *vma =3D NULL; =20 rpra[i].buf.pv =3D (u64) ctx->args[i].ptr; - pages[i].addr =3D ctx->maps[i]->phys; + pages[i].addr =3D ctx->maps[i]->dma_addr; =20 mmap_read_lock(current->mm); vma =3D find_vma(current->mm, ctx->args[i].ptr); @@ -1036,7 +1038,7 @@ static int fastrpc_get_args(u32 kernel, struct fastrp= c_invoke_ctx *ctx) goto bail; =20 rpra[i].buf.pv =3D args - ctx->olaps[oix].offset; - pages[i].addr =3D ctx->buf->phys - + pages[i].addr =3D ctx->buf->dma_addr - ctx->olaps[oix].offset + (pkt_size - rlen); pages[i].addr =3D pages[i].addr & PAGE_MASK; @@ -1068,7 +1070,7 @@ static int fastrpc_get_args(u32 kernel, struct fastrp= c_invoke_ctx *ctx) list[i].num =3D ctx->args[i].length ? 1 : 0; list[i].pgidx =3D i; if (ctx->maps[i]) { - pages[i].addr =3D ctx->maps[i]->phys; + pages[i].addr =3D ctx->maps[i]->dma_addr; pages[i].size =3D ctx->maps[i]->size; } rpra[i].dma.fd =3D ctx->args[i].fd; @@ -1150,7 +1152,7 @@ static int fastrpc_invoke_send(struct fastrpc_session= _ctx *sctx, msg->ctx =3D ctx->ctxid | fl->pd; msg->handle =3D handle; msg->sc =3D ctx->sc; - msg->addr =3D ctx->buf ? ctx->buf->phys : 0; + msg->addr =3D ctx->buf ? ctx->buf->dma_addr : 0; msg->size =3D roundup(ctx->msg_sz, PAGE_SIZE); fastrpc_context_get(ctx); =20 @@ -1306,13 +1308,15 @@ static int fastrpc_init_create_static_process(struc= t fastrpc_user *fl, if (fl->cctx->vmcount) { u64 src_perms =3D BIT(QCOM_SCM_VMID_HLOS); =20 - err =3D qcom_scm_assign_mem(fl->cctx->remote_heap->phys, + err =3D qcom_scm_assign_mem(fl->cctx->remote_heap->dma_addr, (u64)fl->cctx->remote_heap->size, &src_perms, fl->cctx->vmperms, fl->cctx->vmcount); if (err) { - dev_err(fl->sctx->dev, "Failed to assign memory with phys 0x%llx size = 0x%llx err %d\n", - fl->cctx->remote_heap->phys, fl->cctx->remote_heap->size, err); + dev_err(fl->sctx->dev, + "Failed to assign memory with dma_addr 0x%llx size 0x%llx err %d\n", + fl->cctx->remote_heap->dma_addr, + fl->cctx->remote_heap->size, err); goto err_map; } scm_done =3D true; @@ -1332,7 +1336,7 @@ static int fastrpc_init_create_static_process(struct = fastrpc_user *fl, args[1].length =3D inbuf.namelen; args[1].fd =3D -1; =20 - pages[0].addr =3D fl->cctx->remote_heap->phys; + pages[0].addr =3D fl->cctx->remote_heap->dma_addr; pages[0].size =3D fl->cctx->remote_heap->size; =20 args[2].ptr =3D (u64)(uintptr_t) pages; @@ -1361,12 +1365,12 @@ static int fastrpc_init_create_static_process(struc= t fastrpc_user *fl, =20 dst_perms.vmid =3D QCOM_SCM_VMID_HLOS; dst_perms.perm =3D QCOM_SCM_PERM_RWX; - err =3D qcom_scm_assign_mem(fl->cctx->remote_heap->phys, + err =3D qcom_scm_assign_mem(fl->cctx->remote_heap->dma_addr, (u64)fl->cctx->remote_heap->size, &src_perms, &dst_perms, 1); if (err) - dev_err(fl->sctx->dev, "Failed to assign memory phys 0x%llx size 0x%llx= err %d\n", - fl->cctx->remote_heap->phys, fl->cctx->remote_heap->size, err); + dev_err(fl->sctx->dev, "Failed to assign memory dma_addr 0x%llx size 0x= %llx err %d\n", + fl->cctx->remote_heap->dma_addr, fl->cctx->remote_heap->size, err); } err_map: fastrpc_buf_free(fl->cctx->remote_heap); @@ -1455,7 +1459,7 @@ static int fastrpc_init_create_process(struct fastrpc= _user *fl, args[2].length =3D inbuf.filelen; args[2].fd =3D init.filefd; =20 - pages[0].addr =3D imem->phys; + pages[0].addr =3D imem->dma_addr; pages[0].size =3D imem->size; =20 args[3].ptr =3D (u64)(uintptr_t) pages; @@ -1913,7 +1917,7 @@ static int fastrpc_req_mmap(struct fastrpc_user *fl, = char __user *argp) args[0].ptr =3D (u64) (uintptr_t) &req_msg; args[0].length =3D sizeof(req_msg); =20 - pages.addr =3D buf->phys; + pages.addr =3D buf->dma_addr; pages.size =3D buf->size; =20 args[1].ptr =3D (u64) (uintptr_t) &pages; @@ -1941,11 +1945,12 @@ static int fastrpc_req_mmap(struct fastrpc_user *fl= , char __user *argp) if (req.flags =3D=3D ADSP_MMAP_REMOTE_HEAP_ADDR && fl->cctx->vmcount) { u64 src_perms =3D BIT(QCOM_SCM_VMID_HLOS); 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charset="utf-8" Implement the new IOVA formatting required by the DSP architecture change on Kaanapali SoC. Place the SID for DSP DMA transactions at bit 56 in the physical address. This placement is necessary for the DSPs to correctly identify streams and operate as intended. To address this, set SID position to bit 56 via OF matching on the fastrpc node; otherwise, default to legacy 32-bit placement. This change ensures consistent SID placement across DSPs. Signed-off-by: Kumari Pallavi --- drivers/misc/fastrpc.c | 48 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 41 insertions(+), 7 deletions(-) diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c index c7ebfb095c4d..9c3860f5716c 100644 --- a/drivers/misc/fastrpc.c +++ b/drivers/misc/fastrpc.c @@ -33,7 +33,6 @@ #define FASTRPC_ALIGN 128 #define FASTRPC_MAX_FDLIST 16 #define FASTRPC_MAX_CRCLIST 64 -#define FASTRPC_PHYS(p) ((p) & 0xffffffff) #define FASTRPC_CTX_MAX (256) #define FASTRPC_INIT_HANDLE 1 #define FASTRPC_DSP_UTILITIES_HANDLE 2 @@ -105,6 +104,17 @@ =20 #define miscdev_to_fdevice(d) container_of(d, struct fastrpc_device, miscd= ev) =20 +/* Extract smmu pa from consolidated iova */ +#define IPA_TO_DMA_ADDR(iova, sid_pos) (iova & ((1ULL << sid_pos) - 1ULL)) +/* + * Prepare the consolidated iova to send to dsp by prepending the sid + * to smmu pa at the appropriate position + */ +static inline u64 fastrpc_compute_sid_offset(u64 sid, u32 sid_pos) +{ + return sid << sid_pos; +} + struct fastrpc_phy_page { dma_addr_t addr; /* dma address */ u64 size; /* size of contiguous region */ @@ -257,6 +267,10 @@ struct fastrpc_session_ctx { bool valid; }; =20 +struct fastrpc_soc_data { + u32 sid_pos; +}; + struct fastrpc_channel_ctx { int domain_id; int sesscount; @@ -278,6 +292,7 @@ struct fastrpc_channel_ctx { bool secure; bool unsigned_support; u64 dma_mask; + const struct fastrpc_soc_data *soc_data; }; =20 struct fastrpc_device { @@ -390,7 +405,7 @@ static int fastrpc_map_lookup(struct fastrpc_user *fl, = int fd, static void fastrpc_buf_free(struct fastrpc_buf *buf) { dma_free_coherent(buf->dev, buf->size, buf->virt, - FASTRPC_PHYS(buf->dma_addr)); + IPA_TO_DMA_ADDR(buf->dma_addr, buf->fl->cctx->soc_data->sid_pos)); kfree(buf); } =20 @@ -440,7 +455,8 @@ static int fastrpc_buf_alloc(struct fastrpc_user *fl, s= truct device *dev, buf =3D *obuf; =20 if (fl->sctx && fl->sctx->sid) - buf->dma_addr +=3D ((u64)fl->sctx->sid << 32); + buf->dma_addr +=3D fastrpc_compute_sid_offset((u64)fl->sctx->sid, + fl->cctx->soc_data->sid_pos); =20 return 0; } @@ -685,7 +701,8 @@ static int fastrpc_dma_buf_attach(struct dma_buf *dmabu= f, return -ENOMEM; =20 ret =3D dma_get_sgtable(buffer->dev, &a->sgt, buffer->virt, - FASTRPC_PHYS(buffer->dma_addr), buffer->size); + IPA_TO_DMA_ADDR(buffer->dma_addr, + buffer->fl->cctx->soc_data->sid_pos), buffer->size); if (ret < 0) { dev_err(buffer->dev, "failed to get scatterlist from DMA API\n"); kfree(a); @@ -734,7 +751,8 @@ static int fastrpc_mmap(struct dma_buf *dmabuf, dma_resv_assert_held(dmabuf->resv); =20 return dma_mmap_coherent(buf->dev, vma, buf->virt, - FASTRPC_PHYS(buf->dma_addr), size); + IPA_TO_DMA_ADDR(buf->dma_addr, + buf->fl->cctx->soc_data->sid_pos), size); } =20 static const struct dma_buf_ops fastrpc_dma_buf_ops =3D { @@ -789,7 +807,8 @@ static int fastrpc_map_attach(struct fastrpc_user *fl, = int fd, map->dma_addr =3D sg_phys(map->table->sgl); } else { map->dma_addr =3D sg_dma_address(map->table->sgl); - map->dma_addr +=3D ((u64)fl->sctx->sid << 32); + map->dma_addr +=3D fastrpc_compute_sid_offset((u64)fl->sctx->sid, + fl->cctx->soc_data->sid_pos); } for_each_sg(map->table->sgl, sgl, map->table->nents, sgl_index) @@ -2290,6 +2309,14 @@ static int fastrpc_get_domain_id(const char *domain) return -EINVAL; } =20 +static const struct fastrpc_soc_data kaanapali_soc_data =3D { + .sid_pos =3D 56, +}; + +static const struct fastrpc_soc_data default_soc_data =3D { + .sid_pos =3D 32, +}; + static int fastrpc_rpmsg_probe(struct rpmsg_device *rpdev) { struct device *rdev =3D &rpdev->dev; @@ -2298,6 +2325,11 @@ static int fastrpc_rpmsg_probe(struct rpmsg_device *= rpdev) const char *domain; bool secure_dsp; unsigned int vmids[FASTRPC_MAX_VMIDS]; + const struct fastrpc_soc_data *soc_data =3D NULL; + + soc_data =3D device_get_match_data(rdev); + if (!soc_data) + soc_data =3D &default_soc_data; =20 err =3D of_property_read_string(rdev->of_node, "label", &domain); if (err) { @@ -2350,6 +2382,7 @@ static int fastrpc_rpmsg_probe(struct rpmsg_device *r= pdev) =20 secure_dsp =3D !(of_property_read_bool(rdev->of_node, "qcom,non-secure-do= main")); data->secure =3D secure_dsp; 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charset="utf-8" DSP currently supports 32-bit IOVA (32-bit PA + 4-bit SID) for both Q6 and user DMA (uDMA) access. This is being upgraded to 34-bit PA + 4-bit SID due to a hardware revision in CDSP for Kaanapali SoC, which expands the DMA addressable range. Update DMA bits configuration in the driver to support CDSP on Kaanapali SoC. Set the default `dma_bits` to 32-bit and update it to 34-bit based on CDSP and OF matching on the fastrpc node. Signed-off-by: Kumari Pallavi --- drivers/misc/fastrpc.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c index 9c3860f5716c..b1315e20f121 100644 --- a/drivers/misc/fastrpc.c +++ b/drivers/misc/fastrpc.c @@ -269,6 +269,8 @@ struct fastrpc_session_ctx { =20 struct fastrpc_soc_data { u32 sid_pos; + u32 dma_addr_bits_extended; + u32 dma_addr_bits_default; }; =20 struct fastrpc_channel_ctx { @@ -2189,6 +2191,7 @@ static int fastrpc_cb_probe(struct platform_device *p= dev) int i, sessions =3D 0; unsigned long flags; int rc; + u32 dma_bits; =20 cctx =3D dev_get_drvdata(dev->parent); if (!cctx) @@ -2202,12 +2205,16 @@ static int fastrpc_cb_probe(struct platform_device = *pdev) spin_unlock_irqrestore(&cctx->lock, flags); return -ENOSPC; } + dma_bits =3D cctx->soc_data->dma_addr_bits_default; sess =3D &cctx->session[cctx->sesscount++]; sess->used =3D false; sess->valid =3D true; sess->dev =3D dev; dev_set_drvdata(dev, sess); =20 + if (cctx->domain_id =3D=3D CDSP_DOMAIN_ID) + dma_bits =3D cctx->soc_data->dma_addr_bits_extended; + if (of_property_read_u32(dev->of_node, "reg", &sess->sid)) dev_info(dev, "FastRPC Session ID not specified in DT\n"); =20 @@ -2222,9 +2229,9 @@ static int fastrpc_cb_probe(struct platform_device *p= dev) } } spin_unlock_irqrestore(&cctx->lock, flags); - rc =3D dma_set_mask(dev, DMA_BIT_MASK(32)); + rc =3D dma_set_mask(dev, DMA_BIT_MASK(dma_bits)); if (rc) { - dev_err(dev, "32-bit DMA enable failed\n"); + dev_err(dev, "%u-bit DMA enable failed\n", dma_bits); return rc; } =20 @@ -2311,10 +2318,14 @@ static int fastrpc_get_domain_id(const char *domain) =20 static const struct fastrpc_soc_data kaanapali_soc_data =3D { .sid_pos =3D 56, + .dma_addr_bits_extended =3D 34, + .dma_addr_bits_default =3D 32, }; =20 static const struct fastrpc_soc_data default_soc_data =3D { .sid_pos =3D 32, + .dma_addr_bits_extended =3D 32, + .dma_addr_bits_default =3D 32, }; =20 static int fastrpc_rpmsg_probe(struct rpmsg_device *rpdev) --=20 2.34.1