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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251126-lcd_pitch_alignment-v1-1-991610a1e369@microchip.com> References: <20251126-lcd_pitch_alignment-v1-0-991610a1e369@microchip.com> In-Reply-To: <20251126-lcd_pitch_alignment-v1-0-991610a1e369@microchip.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Ludovic Desroches" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=995; i=ludovic.desroches@microchip.com; h=from:subject:message-id; bh=Wh5qWNSDKTzzXZXPEH9y3bA7NSZ31m6bdnGJGmdFr0U=; b=kA0DAAoBPjnmE/d7ZC0ByyZiAGknEq/I8/ftr9puw2cw7lYsgNME7mZK5jnOmuMng0sfq/O8O okCMwQAAQoAHRYhBAAwS8mJaaxbjW01TT455hP3e2QtBQJpJxKvAAoJED455hP3e2Qt1DcP+wfF 0NESQJmXE40mTlP34/PzHfl5bkpsMOAzvoRLuay7c0MUOpHzB+r5+Mg2d+v+M71Y5fH1hi5KgQV LJr8AcZhYDGO23gSvBX4TPKwY6utPE1mPn5smzQxm5+GJ0i0Up9u7v7tuTbL4jbPBFAumwEWdHE UdkVxV5jZ96LqrM8me6vhvyX+sSJEfOoAoJ75W3Y54QBGPg8gobeJ7ogk8Ygbx1JErtZOHhoJj7 zHqT7U4ROKW8sp3eS4+r59Mm1/lEtkT3ZgzWDRRmu712WMunBYiibV91Fd28Y1VCLbJcutrD5Vz hmVoydIMNJUYMTJ3A4MijsRFeIUaV8TgW/ukbZeNVm4IIATPe7/OO4EK6ZhDVAks5O/UxX1wTYV 1zNaM2M7AJWI+taYm6AonI9qddLZjZ5SMxODk78VFDPKVpgdJHGUDRlkT3XyDWeb2e9JAYrE+vJ dMTYvdVF3zH+8P6YuZGjiw71d1CoxTQGvgcwXEnO+XeKGNuE+xozFzkD0uO8QFyPmSSR0+ISad+ FME8IGjcJ4qpR8/SxVbUSLup6skzHxQ+jLftSYXJiHa9EzLVcglCvk8tzhSkvxpRgXvVuOOhlPg ThcQ4vW2ngzAhebr+/Oaly7ud7iQhhvvpxM6scrZkTI4hcIs4YvkP72hO1B5rkPlYHASYfKtYaC SgS1K X-Developer-Key: i=ludovic.desroches@microchip.com; a=openpgp; fpr=665BAA7297BE089A28B77696E332995F09DCC11A Using drm_mode_size_dumb() to compute the size of dumb buffers introduced an 8-byte alignment constraint on the pitch that wasn=E2=80=99t present bef= ore. Let=E2=80=99s remove this constraint, which isn=E2=80=99t necessarily requi= red and may cause buffers to be allocated larger than needed. Signed-off-by: Ludovic Desroches --- drivers/gpu/drm/drm_gem_dma_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem= _dma_helper.c index 12d8307997a0a90a9b5c0469bd742130fa6722d5..eb56ba2347966040a3c7fd27e09= c8b81bc797daa 100644 --- a/drivers/gpu/drm/drm_gem_dma_helper.c +++ b/drivers/gpu/drm/drm_gem_dma_helper.c @@ -308,7 +308,7 @@ int drm_gem_dma_dumb_create(struct drm_file *file_priv, struct drm_gem_dma_object *dma_obj; int ret; =20 - ret =3D drm_mode_size_dumb(drm, args, SZ_8, 0); + ret =3D drm_mode_size_dumb(drm, args, 0, 0); if (ret) return ret; =20 --=20 2.51.0 From nobody Mon Dec 1 22:35:43 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A27FC305068 for ; Wed, 26 Nov 2025 14:46:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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d="scan'208";a="56295470" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 26 Nov 2025 07:46:33 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 26 Nov 2025 07:46:12 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 26 Nov 2025 07:46:10 -0700 From: Ludovic Desroches Date: Wed, 26 Nov 2025 15:44:45 +0100 Subject: [PATCH 2/3] drm/gem-shmem: revert the 8-byte alignment constraint Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251126-lcd_pitch_alignment-v1-2-991610a1e369@microchip.com> References: <20251126-lcd_pitch_alignment-v1-0-991610a1e369@microchip.com> In-Reply-To: <20251126-lcd_pitch_alignment-v1-0-991610a1e369@microchip.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Ludovic Desroches" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=665BAA7297BE089A28B77696E332995F09DCC11A Using drm_mode_size_dumb() to compute the size of dumb buffers introduced an 8-byte alignment constraint on the pitch that wasn=E2=80=99t present bef= ore. Let=E2=80=99s remove this constraint, which isn=E2=80=99t necessarily requi= red and may cause buffers to be allocated larger than needed. Signed-off-by: Ludovic Desroches --- drivers/gpu/drm/drm_gem_shmem_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c b/drivers/gpu/drm/drm_g= em_shmem_helper.c index dc94a27710e5f48839a5d2e9e9ea5152ff22e438..93b9cff89080f94e5d6e4663ef6= 42b4c36e93c71 100644 --- a/drivers/gpu/drm/drm_gem_shmem_helper.c +++ b/drivers/gpu/drm/drm_gem_shmem_helper.c @@ -559,7 +559,7 @@ int drm_gem_shmem_dumb_create(struct drm_file *file, st= ruct drm_device *dev, { int ret; =20 - ret =3D drm_mode_size_dumb(dev, args, SZ_8, 0); + ret =3D drm_mode_size_dumb(dev, args, 0, 0); if (ret) return ret; =20 --=20 2.51.0 From nobody Mon Dec 1 22:35:43 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66A88305044 for ; Wed, 26 Nov 2025 14:46:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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d="scan'208";a="281082112" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Nov 2025 07:46:53 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.29; Wed, 26 Nov 2025 07:46:15 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 26 Nov 2025 07:46:13 -0700 From: Ludovic Desroches Date: Wed, 26 Nov 2025 15:44:46 +0100 Subject: [PATCH 3/3] drm/gem-vram: revert the 8-byte alignment constraint Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251126-lcd_pitch_alignment-v1-3-991610a1e369@microchip.com> References: <20251126-lcd_pitch_alignment-v1-0-991610a1e369@microchip.com> In-Reply-To: <20251126-lcd_pitch_alignment-v1-0-991610a1e369@microchip.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Ludovic Desroches" X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=665BAA7297BE089A28B77696E332995F09DCC11A Using drm_mode_size_dumb() to compute the size of dumb buffers introduced an 8-byte alignment constraint on the pitch that wasn=E2=80=99t present bef= ore. Let=E2=80=99s remove this constraint, which isn=E2=80=99t necessarily requi= red and may cause buffers to be allocated larger than needed. Signed-off-by: Ludovic Desroches --- drivers/gpu/drm/drm_gem_vram_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_ge= m_vram_helper.c index f40f6e167f126681201b13d60be9c508f25d481f..3ab91965ec6f8fa275b9556079d= fb335a02664bb 100644 --- a/drivers/gpu/drm/drm_gem_vram_helper.c +++ b/drivers/gpu/drm/drm_gem_vram_helper.c @@ -553,7 +553,7 @@ int drm_gem_vram_driver_dumb_create(struct drm_file *fi= le, if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized")) return -EINVAL; =20 - ret =3D drm_mode_size_dumb(dev, args, SZ_8, 0); + ret =3D drm_mode_size_dumb(dev, args, 0, 0); if (ret) return ret; =20 --=20 2.51.0